From: Medad CChien <[email protected]>
Support memory controller for Nuvoton NPCM SoC.
Addressed comments from:
- Rob Herring : https://lkml.org/lkml/2022/2/25/1103
- Krzysztof Kozlowski : https://lkml.org/lkml/2022/2/27/63
- Rob Herring : https://lkml.org/lkml/2022/3/2/828
- Krzysztof Kozlowski : https://lkml.org/lkml/2022/3/11/294
- Jonathan Neuschäfer : https://lkml.org/lkml/2022/3/11/1167
- Krzysztof Kozlowski : https://lkml.org/lkml/2022/3/11/293
- Rob Herring : https://lkml.org/lkml/2022/3/11/575
- Krzysztof Kozlowski : https://lkml.org/lkml/2022/3/11/305
- Avi Fishman : https://lkml.org/lkml/2022/3/13/339
- Krzysztof Kozlowski : https://lkml.org/lkml/2022/3/14/93
- Krzysztof Kozlowski : https://lkml.org/lkml/2022/3/14/95
- Krzysztof Kozlowski : https://lkml.org/lkml/2022/3/15/378
- Boris Petkov : https://lkml.org/lkml/2022/3/17/561
- Paul Menzel : https://lkml.org/lkml/2022/4/9/47
- Paul Menzel : https://lkml.org/lkml/2022/4/11/182
- Borislav Petkov : https://lkml.org/lkml/2022/4/8/871
- Paul Menzel : https://lkml.org/lkml/2022/4/9/51
- Paul Menzel : https://lkml.org/lkml/2022/4/9/65
- Rob Herring : https://lkml.org/lkml/2022/4/21/681
- Paul Menzel : https://lkml.org/lkml/2022/5/3/307
- Paul Menzel : https://lkml.org/lkml/2022/5/3/304
- Borislav Petkov : https://lkml.org/lkml/2022/5/3/343
- Paul Menzel https://lkml.org/lkml/2022/5/10/47
- Paul Menzel https://lkml.org/lkml/2022/5/10/127
Changes since version 12:
- Pass ecc event count to edac_mc_handle_error.
Changes since version 11:
- Update MAINTAINERS file
Changes since version 10:
- Add one more maintainer.
- Correct indentation in npcm_edac.c.
- Add datasheet information in commit message.
Changes since version 9:
- Add a necessary blank line in Kconfig for EDAC_NPCM.
- Reflow for 75 characters per line in commit message of devicetree file.
- Remove wrong tags in all the commit message.
- Reorder content in commit message of NPCM memory controller driver.
Changes since version 8:
- Add new line character at the end of file of yaml file
Changes since version 7:
- Refactor npcm_edac.c.
- Sort strings in npcm_edac.c.
- Reflow code for 75 characters per line.
- Summarize errors and warnings reported by kernel test robot.
- Shorten name of values to make them become more readable in npcm_edac.c.
- Put spaces between the * and the text in npcm_edac.c.
Changes since version 6:
- Fix warnings in npcm_edac.c.
- Add information reported by kernel test robot <[email protected]>.
Changes since version 5:
- Update commit message for NPCM memory controller driver.
Changes since version 4:
- Update filename in nuvoton,npcm-memory-controller.yaml.
- Add COMPILE_TEST in Kconfig.
- Fix errors in npcm_edac.c.
- Remove unnecessary checking after of_match_device() and of_device_get_match_data().
Changes since version 3:
- Rename npcm-edac.yaml as nuvoton,npcm-memory-controller.yaml.
- Drop 'EDAC' in title of nuvoton,npcm-memory-controller.yaml.
- Update compatible in nuvoton,npcm-memory-controller.yaml.
Changes since version 2:
- Update description and compatible in npcm-edac.yaml.
- Remove address-cells and size-cells in npcm-edac.yaml.
- Reorder the items of examples in npcm-edac.yaml.
- Reorder header file in driver.
Changes since version 1:
- Add nuvoton,npcm750-memory-controller property in NPCM devicetree.
- Add new property in edac binding document.
- Add new driver for nuvoton NPCM memory controller.
Medad CChien (3):
dt-bindings: edac: nuvoton: add NPCM memory controller
ARM: dts: nuvoton: Add memory controller node
EDAC: nuvoton: Add NPCM memory controller driver
.../edac/nuvoton,npcm-memory-controller.yaml | 62 ++
MAINTAINERS | 2 +
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +
drivers/edac/Kconfig | 17 +
drivers/edac/Makefile | 1 +
drivers/edac/npcm_edac.c | 680 ++++++++++++++++++
6 files changed, 769 insertions(+)
create mode 100644 Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml
create mode 100644 drivers/edac/npcm_edac.c
--
2.17.1
From: Medad CChien <[email protected]>
Document devicetree bindings for the Nuvoton BMC NPCM memory controller.
Signed-off-by: Medad CChien <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
---
.../edac/nuvoton,npcm-memory-controller.yaml | 62 +++++++++++++++++++
MAINTAINERS | 2 +
2 files changed, 64 insertions(+)
create mode 100644 Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml
diff --git a/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml b/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml
new file mode 100644
index 000000000000..a5c8d332d1c1
--- /dev/null
+++ b/Documentation/devicetree/bindings/edac/nuvoton,npcm-memory-controller.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/edac/nuvoton,npcm-memory-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton NPCM Memory Controller
+
+maintainers:
+ - Medad CChien <[email protected]>
+ - Stanley Chu <[email protected]>
+
+description: |
+ The Nuvoton BMC SoC supports DDR4 memory with and without ECC (error
+ correction check).
+
+ The memory controller supports single bit error correction, double bit
+ error detection (in-line ECC in which a section (1/8th) of the memory
+ device used to store data is used for ECC storage).
+
+ Note, the bootloader must configure ECC mode for the memory controller.
+
+properties:
+ compatible:
+ enum:
+ - nuvoton,npcm750-memory-controller
+ - nuvoton,npcm845-memory-controller
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ minItems: 1
+ items:
+ - description: uncorrectable error interrupt
+ - description: correctable error interrupt
+
+ interrupt-names:
+ minItems: 1
+ items:
+ - const: ue
+ - const: ce
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ ahb {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ mc: memory-controller@f0824000 {
+ compatible = "nuvoton,npcm750-memory-controller";
+ reg = <0x0 0xf0824000 0x0 0x1000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 4383949ff654..7f832e6ed4e5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2367,12 +2367,14 @@ L: [email protected] (moderated for non-subscribers)
S: Supported
F: Documentation/devicetree/bindings/*/*/*npcm*
F: Documentation/devicetree/bindings/*/*npcm*
+F: Documentation/devicetree/bindings/*/npcm-memory-controller.yaml
F: arch/arm/boot/dts/nuvoton-npcm*
F: arch/arm/mach-npcm/
F: drivers/*/*npcm*
F: drivers/*/*/*npcm*
F: include/dt-bindings/clock/nuvoton,npcm7xx-clock.h
+
ARM/NUVOTON WPCM450 ARCHITECTURE
M: Jonathan Neuschäfer <[email protected]>
L: [email protected] (moderated for non-subscribers)
--
2.17.1
From: Medad CChien <[email protected]>
ECC must be configured in the BootBlock header.
Then, you can read error counts via the EDAC kernel framework.
Signed-off-by: Medad CChien <[email protected]>
---
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
index 3696980a3da1..ba542b26941e 100644
--- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
@@ -106,6 +106,13 @@
interrupt-parent = <&gic>;
ranges;
+ mc: memory-controller@f0824000 {
+ compatible = "nuvoton,npcm750-memory-controller";
+ reg = <0x0 0xf0824000 0x0 0x1000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
rstc: rstc@f0801000 {
compatible = "nuvoton,npcm750-reset";
reg = <0xf0801000 0x70>;
--
2.17.1
On Fri, Jun 10, 2022 at 04:43:38PM +0800, [email protected] wrote:
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4383949ff654..7f832e6ed4e5 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2367,12 +2367,14 @@ L: [email protected] (moderated for non-subscribers)
> S: Supported
> F: Documentation/devicetree/bindings/*/*/*npcm*
> F: Documentation/devicetree/bindings/*/*npcm*
> +F: Documentation/devicetree/bindings/*/npcm-memory-controller.yaml
> F: arch/arm/boot/dts/nuvoton-npcm*
> F: arch/arm/mach-npcm/
> F: drivers/*/*npcm*
> F: drivers/*/*/*npcm*
> F: include/dt-bindings/clock/nuvoton,npcm7xx-clock.h
>
> +
That looks like it went in when committing. You can remove it in case
you have to resend v13.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
On Fri, Jun 10, 2022 at 04:43:39PM +0800, [email protected] wrote:
> From: Medad CChien <[email protected]>
>
> ECC must be configured in the BootBlock header.
> Then, you can read error counts via the EDAC kernel framework.
>
> Signed-off-by: Medad CChien <[email protected]>
> ---
> arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> index 3696980a3da1..ba542b26941e 100644
> --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> @@ -106,6 +106,13 @@
> interrupt-parent = <&gic>;
> ranges;
>
> + mc: memory-controller@f0824000 {
> + compatible = "nuvoton,npcm750-memory-controller";
> + reg = <0x0 0xf0824000 0x0 0x1000>;
> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + };
> +
> rstc: rstc@f0801000 {
> compatible = "nuvoton,npcm750-reset";
> reg = <0xf0801000 0x70>;
> --
This one needs an Ack from DT folks.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
Hello Borislav,
Thanks for your comments.
I add [email protected] into this mail thread,
and he is going to follow up this EDAC driver.
He will be in charge of maintaining this driver.
thanks
Borislav Petkov <[email protected]> 於 2022年6月21日 週二 凌晨12:40寫道：
>
> On Fri, Jun 10, 2022 at 04:43:38PM +0800, [email protected] wrote:
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 4383949ff654..7f832e6ed4e5 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -2367,12 +2367,14 @@ L: [email protected] (moderated for non-subscribers)
> > S: Supported
> > F: Documentation/devicetree/bindings/*/*/*npcm*
> > F: Documentation/devicetree/bindings/*/*npcm*
> > +F: Documentation/devicetree/bindings/*/npcm-memory-controller.yaml
> > F: arch/arm/boot/dts/nuvoton-npcm*
> > F: arch/arm/mach-npcm/
> > F: drivers/*/*npcm*
> > F: drivers/*/*/*npcm*
> > F: include/dt-bindings/clock/nuvoton,npcm7xx-clock.h
> >
> > +
>
> That looks like it went in when committing. You can remove it in case
> you have to resend v13.
>
> --
> Regards/Gruss,
> Boris.
>
> https://people.kernel.org/tglx/notes-about-netiquette
B.R.
Medad
Hi Borislav,
Thanks for the review. I'll address the problems you have mentioned
and send v13.
Regards,
Marvin