2024-04-26 13:39:21

by Peter Griffin

Subject: [PATCH v3 3/4] arm64: dts: exynos: gs101: Add ufs and ufs-phy dt nodes

Add the ufs controller node and phy node for gs101.

Signed-off-by: Peter Griffin <[email protected]>
Acked-by: André Draszik <[email protected]>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 36 ++++++++++++++++++++
1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 09044deede63..4679ca33c6a0 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -1277,6 +1277,42 @@ pinctrl_hsi2: pinctrl@14440000 {
interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>;
};

+ ufs_0_phy: phy@17e04000 {
+ compatible = "google,gs101-ufs-phy";
+ reg = <0x14704000 0x3000>;
+ reg-names = "phy-pma";
+ samsung,pmu-syscon = <&pmu_system_controller>;
+ #phy-cells = <0>;
+ clocks = <&ext_24_5m>;
+ clock-names = "ref_clk";
+ status = "disabled";
+ };
+
+ ufs_0: ufs@14700000 {
+ compatible = "google,gs101-ufs";
+ reg = <0x14700000 0x200>,
+ <0x14701100 0x200>,
+ <0x14780000 0xa000>,
+ <0x14600000 0x100>;
+ reg-names = "hci", "vs_hci", "unipro", "ufsp";
+ interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_ACLK>,
+ <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_CLK_UNIPRO>,
+ <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_FMP_CLK>,
+ <&cmu_hsi2 CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_ACLK>,
+ <&cmu_hsi2 CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_PCLK>,
+ <&cmu_hsi2 CLK_GOUT_HSI2_SYSREG_HSI2_PCLK>;
+ clock-names = "core_clk", "sclk_unipro_main", "fmp",
+ "aclk", "pclk", "sysreg";
+ freq-table-hz = <0 0>, <0 0>, <0 0>, <0 0>, <0 0>, <0 0>;
+ pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
+ pinctrl-names = "default";
+ phys = <&ufs_0_phy>;
+ phy-names = "ufs-phy";
+ samsung,sysreg = <&sysreg_hsi2 0x710>;
+ status = "disabled";
+ };
+
cmu_apm: clock-controller@17400000 {
compatible = "google,gs101-cmu-apm";
reg = <0x17400000 0x8000>;
--
2.44.0.769.g3c40516874-goog

2024-04-28 15:50:30

by Krzysztof Kozlowski

Subject: Re: [PATCH v3 3/4] arm64: dts: exynos: gs101: Add ufs and ufs-phy dt nodes

On 26/04/2024 15:38, Peter Griffin wrote:
> Add the ufs controller node and phy node for gs101.
>
> Signed-off-by: Peter Griffin <[email protected]>
> Acked-by: André Draszik <[email protected]>
> ---
> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 36 ++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> index 09044deede63..4679ca33c6a0 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -1277,6 +1277,42 @@ pinctrl_hsi2: pinctrl@14440000 {
> interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>;
> };
>
> + ufs_0_phy: phy@17e04000 {
> + compatible = "google,gs101-ufs-phy";
> + reg = <0x14704000 0x3000>;
> + reg-names = "phy-pma";
> + samsung,pmu-syscon = <&pmu_system_controller>;
> + #phy-cells = <0>;
> + clocks = <&ext_24_5m>;
> + clock-names = "ref_clk";
> + status = "disabled";
> + };
> +
> + ufs_0: ufs@14700000 {

Unit-address order got broken here.



Best regards,
Krzysztof

2024-04-29 11:13:16

by Peter Griffin

Subject: Re: [PATCH v3 3/4] arm64: dts: exynos: gs101: Add ufs and ufs-phy dt nodes

Hi Krzysztof,

On Sun, 28 Apr 2024 at 16:50, Krzysztof Kozlowski <[email protected]> wrote:
>
> On 26/04/2024 15:38, Peter Griffin wrote:
> > Add the ufs controller node and phy node for gs101.
> >
> > Signed-off-by: Peter Griffin <[email protected]>
> > Acked-by: André Draszik <[email protected]>
> > ---
> > arch/arm64/boot/dts/exynos/google/gs101.dtsi | 36 ++++++++++++++++++++
> > 1 file changed, 36 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> > index 09044deede63..4679ca33c6a0 100644
> > --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> > +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> > @@ -1277,6 +1277,42 @@ pinctrl_hsi2: pinctrl@14440000 {
> > interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>;
> > };
> >
> > + ufs_0_phy: phy@17e04000 {
> > + compatible = "google,gs101-ufs-phy";
> > + reg = <0x14704000 0x3000>;
> > + reg-names = "phy-pma";
> > + samsung,pmu-syscon = <&pmu_system_controller>;
> > + #phy-cells = <0>;
> > + clocks = <&ext_24_5m>;
> > + clock-names = "ref_clk";
> > + status = "disabled";
> > + };
> > +
> > + ufs_0: ufs@14700000 {
>
> Unit-address order got broken here.

Thanks for the review. Will fix

regards,

Peter