Satya Priya (1):
arm64: dts: qcom: sc7280: Cleanup the lpasscc node
Taniya Das (1):
arm64: dts: qcom: sc7280: Update lpassaudio clock controller for
resets
arch/arm64/boot/dts/qcom/sc7280.dtsi | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
--
2.7.4
From: Taniya Das <[email protected]>
The lpass audio supports TX/RX/WSA block resets. Also to keep
consistency update lpasscore to lpass_core.
Fixes: 9499240d15f2 ("arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers")
Signed-off-by: Taniya Das <[email protected]>
Signed-off-by: Satya Priya <[email protected]>
---
Changes since v3:
- Remove the status="disabled" from lpasscc node.
arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 71735bb..c641f0b 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2184,6 +2184,7 @@
power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
#clock-cells = <1>;
#power-domain-cells = <1>;
+ #reset-cells = <1>;
};
lpass_aon: clock-controller@3380000 {
@@ -2191,13 +2192,13 @@
reg = <0 0x03380000 0 0x30000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>,
- <&lpasscore LPASS_CORE_CC_CORE_CLK>;
+ <&lpass_core LPASS_CORE_CC_CORE_CLK>;
clock-names = "bi_tcxo", "bi_tcxo_ao", "iface";
#clock-cells = <1>;
#power-domain-cells = <1>;
};
- lpasscore: clock-controller@3900000 {
+ lpass_core: clock-controller@3900000 {
compatible = "qcom,sc7280-lpasscorecc";
reg = <0 0x03900000 0 0x50000>;
clocks = <&rpmhcc RPMH_CXO_CLK>;
--
2.7.4
Remove "cc" regmap from lpasscc node which is overlapping
with the lpass_aon regmap.
Fixes: 422a295221bb ("arm64: dts: qcom: sc7280: Add clock controller nodes")
Signed-off-by: Satya Priya <[email protected]>
Signed-off-by: Taniya Das <[email protected]>
---
Changes since v2:
- Cleanup the lpasscc node to handle regmap overlap with lpass_aon
instead of disabling the lpasscc node.
- This patch is added in v3.
arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 13d7f26..71735bb 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2168,9 +2168,8 @@
lpasscc: lpasscc@3000000 {
compatible = "qcom,sc7280-lpasscc";
reg = <0 0x03000000 0 0x40>,
- <0 0x03c04000 0 0x4>,
- <0 0x03389000 0 0x24>;
- reg-names = "qdsp6ss", "top_cc", "cc";
+ <0 0x03c04000 0 0x4>;
+ reg-names = "qdsp6ss", "top_cc";
clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>;
clock-names = "iface";
#clock-cells = <1>;
--
2.7.4
Quoting Satya Priya (2022-07-20 04:22:24)
> From: Taniya Das <[email protected]>
>
> The lpass audio supports TX/RX/WSA block resets. Also to keep
> consistency update lpasscore to lpass_core.
Consistency with what?
>
> Fixes: 9499240d15f2 ("arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers")
> Signed-off-by: Taniya Das <[email protected]>
> Signed-off-by: Satya Priya <[email protected]>
> ---
> Changes since v3:
> - Remove the status="disabled" from lpasscc node.
>
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 71735bb..c641f0b 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2184,6 +2184,7 @@
> power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
> #clock-cells = <1>;
> #power-domain-cells = <1>;
> + #reset-cells = <1>;
Is there a binding update for qcom,sc7280-lpassaudiocc?
> };
>
> lpass_aon: clock-controller@3380000 {
> @@ -2191,13 +2192,13 @@
> reg = <0 0x03380000 0 0x30000>;
> clocks = <&rpmhcc RPMH_CXO_CLK>,
> <&rpmhcc RPMH_CXO_CLK_A>,
> - <&lpasscore LPASS_CORE_CC_CORE_CLK>;
> + <&lpass_core LPASS_CORE_CC_CORE_CLK>;
Is this really necessary?
> clock-names = "bi_tcxo", "bi_tcxo_ao", "iface";
> #clock-cells = <1>;
> #power-domain-cells = <1>;
> };
>
> - lpasscore: clock-controller@3900000 {
> + lpass_core: clock-controller@3900000 {
Is this really necessary?
> compatible = "qcom,sc7280-lpasscorecc";
> reg = <0 0x03900000 0 0x50000>;
> clocks = <&rpmhcc RPMH_CXO_CLK>;
Quoting Satya Priya (2022-07-20 04:22:23)
> Remove "cc" regmap from lpasscc node which is overlapping
> with the lpass_aon regmap.
Is there a binding update for qcom,sc7280-lpasscc?
On 7/27/2022 6:52 AM, Stephen Boyd wrote:
> Quoting Satya Priya (2022-07-20 04:22:24)
>> From: Taniya Das <[email protected]>
>>
>> The lpass audio supports TX/RX/WSA block resets. Also to keep
>> consistency update lpasscore to lpass_core.
> Consistency with what?
Hi Stephen,
We got a comment to change this on previous posts, to keep consistency
with the other nodes like lpass_aon etc
https://patchwork.kernel.org/project/linux-arm-msm/patch/[email protected]/#24842497
>> Fixes: 9499240d15f2 ("arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers")
>> Signed-off-by: Taniya Das <[email protected]>
>> Signed-off-by: Satya Priya <[email protected]>
>> ---
>> Changes since v3:
>> - Remove the status="disabled" from lpasscc node.
>>
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 71735bb..c641f0b 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -2184,6 +2184,7 @@
>> power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
>> #clock-cells = <1>;
>> #power-domain-cells = <1>;
>> + #reset-cells = <1>;
> Is there a binding update for qcom,sc7280-lpassaudiocc?
>
>> };
>>
>> lpass_aon: clock-controller@3380000 {
>> @@ -2191,13 +2192,13 @@
>> reg = <0 0x03380000 0 0x30000>;
>> clocks = <&rpmhcc RPMH_CXO_CLK>,
>> <&rpmhcc RPMH_CXO_CLK_A>,
>> - <&lpasscore LPASS_CORE_CC_CORE_CLK>;
>> + <&lpass_core LPASS_CORE_CC_CORE_CLK>;
> Is this really necessary?
>
>> clock-names = "bi_tcxo", "bi_tcxo_ao", "iface";
>> #clock-cells = <1>;
>> #power-domain-cells = <1>;
>> };
>>
>> - lpasscore: clock-controller@3900000 {
>> + lpass_core: clock-controller@3900000 {
> Is this really necessary?
>
>> compatible = "qcom,sc7280-lpasscorecc";
>> reg = <0 0x03900000 0 0x50000>;
>> clocks = <&rpmhcc RPMH_CXO_CLK>;
Quoting Satya Priya Kakitapalli (Temp) (2022-07-26 22:51:08)
>
> On 7/27/2022 6:52 AM, Stephen Boyd wrote:
> > Quoting Satya Priya (2022-07-20 04:22:24)
> >> From: Taniya Das <[email protected]>
> >>
> >> The lpass audio supports TX/RX/WSA block resets. Also to keep
> >> consistency update lpasscore to lpass_core.
> > Consistency with what?
>
>
> Hi Stephen,
>
>
> We got a comment to change this on previous posts, to keep consistency
> with the other nodes like lpass_aon etc
Can you make that change in a different patch? Then the focus can be on
what the patch subject is about. You're not changing the same lines,
right?
On 8/9/2022 5:43 AM, Stephen Boyd wrote:
> Quoting Satya Priya Kakitapalli (Temp) (2022-07-26 22:51:08)
>> On 7/27/2022 6:52 AM, Stephen Boyd wrote:
>>> Quoting Satya Priya (2022-07-20 04:22:24)
>>>> From: Taniya Das <[email protected]>
>>>>
>>>> The lpass audio supports TX/RX/WSA block resets. Also to keep
>>>> consistency update lpasscore to lpass_core.
>>> Consistency with what?
>>
>> Hi Stephen,
>>
>>
>> We got a comment to change this on previous posts, to keep consistency
>> with the other nodes like lpass_aon etc
> Can you make that change in a different patch? Then the focus can be on
> what the patch subject is about. You're not changing the same lines,
> right?
No, I will move this change to separate patch.