Currently we only support Vector for SMP platforms, that is, all SMP
cores have the same vlenb. If we happen to detect a mismatching vlen, it
is better to just fail bootting it up to prevent further race/scheduling
issues.
Also, move .Lsecondary_park forward and chage `tail smp_callin` into a
regular call in the early assembly. So a core would be parked right
after a return from smp_callin. Note that a successful smp_callin
does not return.
Fixes: 7017858eb2d7 ("riscv: Introduce riscv_v_vsize to record size of Vector context")
Reported-by: Conor Dooley <[email protected]>
Closes: https://lore.kernel.org/linux-riscv/20240228-vicinity-cornstalk-4b8eb5fe5730@spud/
Signed-off-by: Andy Chiu <[email protected]>
---
Changelog v2:
- update commit message to explain asm code change (Conor)
---
arch/riscv/kernel/head.S | 14 +++++++-------
arch/riscv/kernel/smpboot.c | 14 +++++++++-----
2 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 4236a69c35cb..a158fa9f2656 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -165,9 +165,15 @@ secondary_start_sbi:
#endif
call .Lsetup_trap_vector
scs_load_current
- tail smp_callin
+ call smp_callin
#endif /* CONFIG_SMP */
+.align 2
+.Lsecondary_park:
+ /* We lack SMP support or have too many harts, so park this hart */
+ wfi
+ j .Lsecondary_park
+
.align 2
.Lsetup_trap_vector:
/* Set trap vector to exception handler */
@@ -181,12 +187,6 @@ secondary_start_sbi:
csrw CSR_SCRATCH, zero
ret
-.align 2
-.Lsecondary_park:
- /* We lack SMP support or have too many harts, so park this hart */
- wfi
- j .Lsecondary_park
-
SYM_CODE_END(_start)
SYM_CODE_START(_start_kernel)
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index cfbe4b840d42..1f86ee10192f 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -218,6 +218,15 @@ asmlinkage __visible void smp_callin(void)
struct mm_struct *mm = &init_mm;
unsigned int curr_cpuid = smp_processor_id();
+ if (has_vector()) {
+ /*
+ * Return as early as possible so the hart with a mismatching
+ * vlen won't boot.
+ */
+ if (riscv_v_setup_vsize())
+ return;
+ }
+
/* All kernel threads share the same mm context. */
mmgrab(mm);
current->active_mm = mm;
@@ -230,11 +239,6 @@ asmlinkage __visible void smp_callin(void)
numa_add_cpu(curr_cpuid);
set_cpu_online(curr_cpuid, 1);
- if (has_vector()) {
- if (riscv_v_setup_vsize())
- elf_hwcap &= ~COMPAT_HWCAP_ISA_V;
- }
-
riscv_user_isa_enable();
/*
--
2.44.0.rc2
Hi Andy,
On Mon, Mar 18, 2024 at 6:40 PM Andy Chiu <[email protected]> wrote:
>
> Currently we only support Vector for SMP platforms, that is, all SMP
> cores have the same vlenb. If we happen to detect a mismatching vlen, it
> is better to just fail bootting it up to prevent further race/scheduling
> issues.
>
> Also, move .Lsecondary_park forward and chage `tail smp_callin` into a
> regular call in the early assembly. So a core would be parked right
> after a return from smp_callin. Note that a successful smp_callin
> does not return.
>
> Fixes: 7017858eb2d7 ("riscv: Introduce riscv_v_vsize to record size of Vector context")
> Reported-by: Conor Dooley <[email protected]>
> Closes: https://lore.kernel.org/linux-riscv/20240228-vicinity-cornstalk-4b8eb5fe5730@spud/
> Signed-off-by: Andy Chiu <[email protected]>
> ---
> Changelog v2:
> - update commit message to explain asm code change (Conor)
> ---
> arch/riscv/kernel/head.S | 14 +++++++-------
> arch/riscv/kernel/smpboot.c | 14 +++++++++-----
> 2 files changed, 16 insertions(+), 12 deletions(-)
>
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index 4236a69c35cb..a158fa9f2656 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -165,9 +165,15 @@ secondary_start_sbi:
> #endif
> call .Lsetup_trap_vector
> scs_load_current
> - tail smp_callin
> + call smp_callin
> #endif /* CONFIG_SMP */
>
> +.align 2
> +.Lsecondary_park:
> + /* We lack SMP support or have too many harts, so park this hart */
It is best to modify the comments here, instead of "lack SMP support..."
> + wfi
> + j .Lsecondary_park
> +
> .align 2
> .Lsetup_trap_vector:
> /* Set trap vector to exception handler */
> @@ -181,12 +187,6 @@ secondary_start_sbi:
> csrw CSR_SCRATCH, zero
> ret
>
> -.align 2
> -.Lsecondary_park:
> - /* We lack SMP support or have too many harts, so park this hart */
> - wfi
> - j .Lsecondary_park
> -
> SYM_CODE_END(_start)
>
> SYM_CODE_START(_start_kernel)
> diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> index cfbe4b840d42..1f86ee10192f 100644
> --- a/arch/riscv/kernel/smpboot.c
> +++ b/arch/riscv/kernel/smpboot.c
> @@ -218,6 +218,15 @@ asmlinkage __visible void smp_callin(void)
> struct mm_struct *mm = &init_mm;
> unsigned int curr_cpuid = smp_processor_id();
>
> + if (has_vector()) {
> + /*
> + * Return as early as possible so the hart with a mismatching
> + * vlen won't boot.
> + */
> + if (riscv_v_setup_vsize())
> + return;
> + }
> +
> /* All kernel threads share the same mm context. */
> mmgrab(mm);
> current->active_mm = mm;
> @@ -230,11 +239,6 @@ asmlinkage __visible void smp_callin(void)
> numa_add_cpu(curr_cpuid);
> set_cpu_online(curr_cpuid, 1);
>
> - if (has_vector()) {
> - if (riscv_v_setup_vsize())
> - elf_hwcap &= ~COMPAT_HWCAP_ISA_V;
> - }
> -
> riscv_user_isa_enable();
>
> /*
>
> --
> 2.44.0.rc2
>
>
Thanks,
Yunhui