The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on
the 1.5 version of the i.Core MX6 cpu module. The 1.5 version
differs from the original one for a few details, including the
ethernet PHY interface clock provider.
With this commit, the ethernet interface works properly:
SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver
While before using the 1.5 version, ethernet failed to startup
do to un-clocked PHY interface:
fec 2188000.ethernet eth0: could not attach to PHY
Similar fix has merged for i.Core MX6Q but missed to update for DL.
Fixes: a8039f2dd089 ("ARM: dts: imx6dl: Add Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit support")
Cc: Jacopo Mondi <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v2:
- Add Michael s-o-b
arch/arm/boot/dts/imx6dl-icore-mipi.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6dl-icore-mipi.dts b/arch/arm/boot/dts/imx6dl-icore-mipi.dts
index e43bccb78ab2..d8f3821a0ffd 100644
--- a/arch/arm/boot/dts/imx6dl-icore-mipi.dts
+++ b/arch/arm/boot/dts/imx6dl-icore-mipi.dts
@@ -8,7 +8,7 @@
/dts-v1/;
#include "imx6dl.dtsi"
-#include "imx6qdl-icore.dtsi"
+#include "imx6qdl-icore-1.5.dtsi"
/ {
model = "Engicam i.CoreM6 DualLite/Solo MIPI Starter Kit";
--
2.18.0.321.gffc6fa0e3
From: Michael Trimarchi <[email protected]>
Engicam i.CoreM6 1.5 Quad/Dual MIPI dtsi is reusing fec node
from Engicam i.CoreM6 dtsi but have sampe copy of phy-reset-gpio
and phy-mode properties.
So, drop this phy reset methods from imx6qdl-icore-1.5 dsti file.
Cc: Jacopo Mondi <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v2:
- new patch.
arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi b/arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi
index d91d46b5898f..0fd7f2e24d9c 100644
--- a/arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi
@@ -25,10 +25,8 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
- phy-reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
clocks = <&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET_REF>;
- phy-mode = "rmii";
status = "okay";
};
--
2.18.0.321.gffc6fa0e3
From: Michael Trimarchi <[email protected]>
LAN8720 needs a reset of every clock enable. The reset needs
to be done at device level, due the flag PHY_RST_AFTER_CLK_EN.
So, add phy-handle by creating mdio child node inside fec.
This will eventually move the phy-reset-gpio which is defined
in fec node.
Signed-off-by: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v2:
- new patch.
arch/arm/boot/dts/imx6qdl-icore.dtsi | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6qdl-icore.dtsi b/arch/arm/boot/dts/imx6qdl-icore.dtsi
index 7814f1ef0804..756f3a9f1b4f 100644
--- a/arch/arm/boot/dts/imx6qdl-icore.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-icore.dtsi
@@ -150,10 +150,23 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
- phy-reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
clocks = <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET>, <&rmii_clk>;
phy-mode = "rmii";
+ phy-handle = <ð_phy>;
status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eth_phy: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <4000>;
+ reset-deassert-us = <4000>;
+ };
+ };
};
&gpmi {
--
2.18.0.321.gffc6fa0e3
Hi Jagan,
On Mon, Dec 30, 2019 at 05:30:19PM +0530, Jagan Teki wrote:
> The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on
> the 1.5 version of the i.Core MX6 cpu module. The 1.5 version
> differs from the original one for a few details, including the
> ethernet PHY interface clock provider.
>
> With this commit, the ethernet interface works properly:
> SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver
>
> While before using the 1.5 version, ethernet failed to startup
> do to un-clocked PHY interface:
> fec 2188000.ethernet eth0: could not attach to PHY
>
> Similar fix has merged for i.Core MX6Q but missed to update for DL.
>
> Fixes: a8039f2dd089 ("ARM: dts: imx6dl: Add Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit support")
> Cc: Jacopo Mondi <[email protected]>
> Signed-off-by: Michael Trimarchi <[email protected]>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> Changes for v2:
> - Add Michael s-o-b
>
> arch/arm/boot/dts/imx6dl-icore-mipi.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx6dl-icore-mipi.dts b/arch/arm/boot/dts/imx6dl-icore-mipi.dts
> index e43bccb78ab2..d8f3821a0ffd 100644
> --- a/arch/arm/boot/dts/imx6dl-icore-mipi.dts
> +++ b/arch/arm/boot/dts/imx6dl-icore-mipi.dts
> @@ -8,7 +8,7 @@
> /dts-v1/;
>
> #include "imx6dl.dtsi"
> -#include "imx6qdl-icore.dtsi"
> +#include "imx6qdl-icore-1.5.dtsi"
>
> / {
> model = "Engicam i.CoreM6 DualLite/Solo MIPI Starter Kit";
In
09ad741b7ece ("ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6")>
I also changed this line to
- model = "Engicam i.CoreM6 Quad/Dual MIPI Starter Kit";
+ model = "Engicam i.CoreM6 1.5 Quad/Dual MIPI Starter Kit";
Maybe you want the same here.
With or without this change:
Reviewed-by: Jacopo Mondi <[email protected]>
Thanks
j
> --
> 2.18.0.321.gffc6fa0e3
Hi Jagan,
small detail, this should come -after= 3/3 in the series, am I
wrong ?
On Mon, Dec 30, 2019 at 05:30:20PM +0530, Jagan Teki wrote:
> From: Michael Trimarchi <[email protected]>
>
> Engicam i.CoreM6 1.5 Quad/Dual MIPI dtsi is reusing fec node
> from Engicam i.CoreM6 dtsi but have sampe copy of phy-reset-gpio
> and phy-mode properties.
>
> So, drop this phy reset methods from imx6qdl-icore-1.5 dsti file.
>
> Cc: Jacopo Mondi <[email protected]>
> Signed-off-by: Michael Trimarchi <[email protected]>
> Signed-off-by: Jagan Teki <[email protected]>
Anyway, I've tested on my iCore 1.5 Quad starter kit and things are
still working.
Pending acceptance of 3/3, which seem correct to me but I cannot
really judge knowing very few things about net:
Tested-by: Jacopo Mondi <[email protected]>
Thanks
j
> ---
> Changes for v2:
> - new patch.
>
> arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi b/arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi
> index d91d46b5898f..0fd7f2e24d9c 100644
> --- a/arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi
> @@ -25,10 +25,8 @@
> &fec {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_enet>;
> - phy-reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
> clocks = <&clks IMX6QDL_CLK_ENET>,
> <&clks IMX6QDL_CLK_ENET>,
> <&clks IMX6QDL_CLK_ENET_REF>;
> - phy-mode = "rmii";
> status = "okay";
> };
> --
> 2.18.0.321.gffc6fa0e3
>
On Mon, Dec 30, 2019 at 05:30:19PM +0530, Jagan Teki wrote:
> The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on
> the 1.5 version of the i.Core MX6 cpu module. The 1.5 version
> differs from the original one for a few details, including the
> ethernet PHY interface clock provider.
>
> With this commit, the ethernet interface works properly:
> SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver
>
> While before using the 1.5 version, ethernet failed to startup
> do to un-clocked PHY interface:
> fec 2188000.ethernet eth0: could not attach to PHY
>
> Similar fix has merged for i.Core MX6Q but missed to update for DL.
>
> Fixes: a8039f2dd089 ("ARM: dts: imx6dl: Add Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit support")
> Cc: Jacopo Mondi <[email protected]>
> Signed-off-by: Michael Trimarchi <[email protected]>
> Signed-off-by: Jagan Teki <[email protected]>
Applied all 3, thanks.
The following dtbs build error noticed for arm build on stable rc 4.19 branch.
# make -sk KBUILD_BUILD_USER=KernelCI -C/linux ARCH=arm
CROSS_COMPILE=arm-linux-gnueabihf- HOSTCC=gcc O=build dtbs
#
../arch/arm/boot/dts/imx6dl-icore-mipi.dts:11:10: fatal error:
imx6qdl-icore-1.5.dtsi: No such file or directory
11 | #include "imx6qdl-icore-1.5.dtsi"
| ^~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[2]: *** [scripts/Makefile.lib:294:
arch/arm/boot/dts/imx6dl-icore-mipi.dtb] Error 1
On Thu, 9 Jan 2020 at 13:16, Shawn Guo <[email protected]> wrote:
>
> On Mon, Dec 30, 2019 at 05:30:19PM +0530, Jagan Teki wrote:
> > The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on
> > the 1.5 version of the i.Core MX6 cpu module. The 1.5 version
> > differs from the original one for a few details, including the
> > ethernet PHY interface clock provider.
> >
> > With this commit, the ethernet interface works properly:
> > SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver
> >
> > While before using the 1.5 version, ethernet failed to startup
> > do to un-clocked PHY interface:
> > fec 2188000.ethernet eth0: could not attach to PHY
> >
> > Similar fix has merged for i.Core MX6Q but missed to update for DL.
> >
> > Fixes: a8039f2dd089 ("ARM: dts: imx6dl: Add Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit support")
> > Cc: Jacopo Mondi <[email protected]>
> > Signed-off-by: Michael Trimarchi <[email protected]>
> > Signed-off-by: Jagan Teki <[email protected]>
>
> Applied all 3, thanks.
Hello!
On Mon, 20 Jan 2020 at 23:22, Naresh Kamboju <[email protected]> wrote:
> The following dtbs build error noticed for arm build on stable rc 4.19 branch.
>
> # make -sk KBUILD_BUILD_USER=KernelCI -C/linux ARCH=arm
> CROSS_COMPILE=arm-linux-gnueabihf- HOSTCC=gcc O=build dtbs
> #
> ../arch/arm/boot/dts/imx6dl-icore-mipi.dts:11:10: fatal error:
> imx6qdl-icore-1.5.dtsi: No such file or directory
> 11 | #include "imx6qdl-icore-1.5.dtsi"
> | ^~~~~~~~~~~~~~~~~~~~~~~~
> compilation terminated.
> make[2]: *** [scripts/Makefile.lib:294:
> arch/arm/boot/dts/imx6dl-icore-mipi.dtb] Error 1
This failed again on the latest 4.19.98-rc1 from
linux-stable-rc/4.19.y. Looks like it's missing 37c045d25e900 ("ARM:
dts: imx6qdl: Add Engicam i.Core 1.5 MX6") from mainline.
Greetings!
Daniel Díaz
[email protected]
> On Thu, 9 Jan 2020 at 13:16, Shawn Guo <[email protected]> wrote:
> >
> > On Mon, Dec 30, 2019 at 05:30:19PM +0530, Jagan Teki wrote:
> > > The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on
> > > the 1.5 version of the i.Core MX6 cpu module. The 1.5 version
> > > differs from the original one for a few details, including the
> > > ethernet PHY interface clock provider.
> > >
> > > With this commit, the ethernet interface works properly:
> > > SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver
> > >
> > > While before using the 1.5 version, ethernet failed to startup
> > > do to un-clocked PHY interface:
> > > fec 2188000.ethernet eth0: could not attach to PHY
> > >
> > > Similar fix has merged for i.Core MX6Q but missed to update for DL.
> > >
> > > Fixes: a8039f2dd089 ("ARM: dts: imx6dl: Add Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit support")
> > > Cc: Jacopo Mondi <[email protected]>
> > > Signed-off-by: Michael Trimarchi <[email protected]>
> > > Signed-off-by: Jagan Teki <[email protected]>
> >
> > Applied all 3, thanks.
On Tue, Jan 21, 2020 at 05:07:41PM -0600, Daniel D?az wrote:
> Hello!
>
> On Mon, 20 Jan 2020 at 23:22, Naresh Kamboju <[email protected]> wrote:
> > The following dtbs build error noticed for arm build on stable rc 4.19 branch.
> >
> > # make -sk KBUILD_BUILD_USER=KernelCI -C/linux ARCH=arm
> > CROSS_COMPILE=arm-linux-gnueabihf- HOSTCC=gcc O=build dtbs
> > #
> > ../arch/arm/boot/dts/imx6dl-icore-mipi.dts:11:10: fatal error:
> > imx6qdl-icore-1.5.dtsi: No such file or directory
> > 11 | #include "imx6qdl-icore-1.5.dtsi"
> > | ^~~~~~~~~~~~~~~~~~~~~~~~
> > compilation terminated.
> > make[2]: *** [scripts/Makefile.lib:294:
> > arch/arm/boot/dts/imx6dl-icore-mipi.dtb] Error 1
>
> This failed again on the latest 4.19.98-rc1 from
> linux-stable-rc/4.19.y. Looks like it's missing 37c045d25e900 ("ARM:
> dts: imx6qdl: Add Engicam i.Core 1.5 MX6") from mainline.
Now fixed up, thanks.
greg k-h