2014-06-20 08:17:46

by Weike Chen

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Subject: [PATCH] mmc: sdhci-pci: Add support for Intel Quark SDIO host controller

From: "Alvin (Weike) Chen" <[email protected]>

Hi,
Intel Quark consists of one SDIO host controller which can be PCI enumerated.
SDHCI-PCI layer doesn't support it. Thus, we add support for Intel Quark SDIO as well.

Derek Browne (1):
Quark SDIO host controller

drivers/mmc/host/sdhci-pci.c | 12 ++++++++++++
include/linux/pci_ids.h | 2 ++
2 files changed, 14 insertions(+)

--
1.7.9.5


2014-06-20 08:17:48

by Weike Chen

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Subject: [PATCH] mmc: sdhci-pci: Quark SDIO host controller supporting

From: Derek Browne <[email protected]>

On Intel Quark, there is a SDIO host controller. This patch is added to
enable the SDIO host controller.

Signed-off-by: Derek Browne <[email protected]>
Signed-off-by: Alvin (Weike) Chen <[email protected]>
---
drivers/mmc/host/sdhci-pci.c | 12 ++++++++++++
include/linux/pci_ids.h | 2 ++
2 files changed, 14 insertions(+)

diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index 52c42fc..1aeeefc 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -103,6 +103,10 @@ static const struct sdhci_pci_fixes sdhci_cafe = {
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
};

+static const struct sdhci_pci_fixes sdhci_intel_qrk = {
+ .quirks = SDHCI_QUIRK_NO_HISPD_BIT,
+};
+
static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
{
slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
@@ -753,6 +757,14 @@ static const struct pci_device_id pci_ids[] = {

{
.vendor = PCI_VENDOR_ID_INTEL,
+ .device = PCI_DEVICE_ID_INTEL_QRK_SD,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (kernel_ulong_t)&sdhci_intel_qrk,
+ },
+
+ {
+ .vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_MRST_SD0,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d4de24b..5bba2c3 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2557,6 +2557,7 @@
#define PCI_DEVICE_ID_INTEL_MFD_EMMC0 0x0823
#define PCI_DEVICE_ID_INTEL_MFD_EMMC1 0x0824
#define PCI_DEVICE_ID_INTEL_MRST_SD2 0x084F
+#define PCI_DEVICE_ID_INTEL_QUARK_ILB 0x095E
#define PCI_DEVICE_ID_INTEL_I960 0x0960
#define PCI_DEVICE_ID_INTEL_I960RM 0x0962
#define PCI_DEVICE_ID_INTEL_CENTERTON_ILB 0x0c60
@@ -2579,6 +2580,7 @@
#define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21
#define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30
#define PCI_DEVICE_ID_INTEL_IOAT 0x1a38
+#define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f
#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0 0x1d40
--
1.7.9.5

2014-06-23 20:08:12

by Bjorn Helgaas

[permalink] [raw]
Subject: Re: [PATCH] mmc: sdhci-pci: Quark SDIO host controller supporting

On Fri, Jun 20, 2014 at 10:13 AM, Chen, Alvin <[email protected]> wrote:
> From: Derek Browne <[email protected]>
>
> On Intel Quark, there is a SDIO host controller. This patch is added to
> enable the SDIO host controller.
>
> Signed-off-by: Derek Browne <[email protected]>
> Signed-off-by: Alvin (Weike) Chen <[email protected]>
> ---
> drivers/mmc/host/sdhci-pci.c | 12 ++++++++++++
> include/linux/pci_ids.h | 2 ++

Please read the comment at the top of pci_ids.h:

* Do not add new entries to this file unless the definitions
* are shared between multiple drivers.

If the ID you're adding is shared, please mention the sharing in your changelog.

> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -2557,6 +2557,7 @@
> #define PCI_DEVICE_ID_INTEL_MFD_EMMC0 0x0823
> #define PCI_DEVICE_ID_INTEL_MFD_EMMC1 0x0824
> #define PCI_DEVICE_ID_INTEL_MRST_SD2 0x084F
> +#define PCI_DEVICE_ID_INTEL_QUARK_ILB 0x095E

This ID doesn't appear to be used at all.

> #define PCI_DEVICE_ID_INTEL_I960 0x0960
> #define PCI_DEVICE_ID_INTEL_I960RM 0x0962
> #define PCI_DEVICE_ID_INTEL_CENTERTON_ILB 0x0c60
> @@ -2579,6 +2580,7 @@
> #define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21
> #define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30
> #define PCI_DEVICE_ID_INTEL_IOAT 0x1a38
> +#define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7
> #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41
> #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f
> #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0 0x1d40
> --
> 1.7.9.5
>