This series adds support for all "older" SoCs to the meson-ee-pwrc
driver. I wanted to compare as much as I could between my Meson8b EC-100
(Endless Mini) and the Le Potato board so I added support for GXBB, GXL
and GXM as well as for the SoCs that I'm actually working on. I will
send the ARM64 dts patches once all of this is reviewed and merged.
@Neil: I would like you to review especially the GX dt-binding patch.
The old GX driver seems to include the same reset lines as G12A *plus*
"dvin". You probably know best whether that's needed or not - for now
I decided to keep it (as this is what "works" with the old pwrc driver).
Also I decided to use your copyright in meson-gxbb-power.h since it's
a shameless copy of meson-g12a-power.h with s/G12A/GXBB/g
I successfully tested the Meson8b part on EC-100 where u-boot does not
initialize the VPU controller. So this the board where I have been
struggling most.
Martin Blumenstingl (4):
dt-bindings: power: meson-ee-pwrc: add support for Meson8/8b/8m2
dt-bindings: power: meson-ee-pwrc: add support for the Meson GX SoCs
soc: amlogic: meson-ee-pwrc: add support for Meson8/Meson8b/Meson8m2
soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCs
.../bindings/power/amlogic,meson-ee-pwrc.yaml | 102 +++++++++++++++---
drivers/soc/amlogic/meson-ee-pwrc.c | 98 ++++++++++++++++-
include/dt-bindings/power/meson-gxbb-power.h | 13 +++
include/dt-bindings/power/meson8-power.h | 13 +++
4 files changed, 204 insertions(+), 22 deletions(-)
create mode 100644 include/dt-bindings/power/meson-gxbb-power.h
create mode 100644 include/dt-bindings/power/meson8-power.h
--
2.26.0
The power domains on the GX SoCs are very similar to G12A. The only
known differences so far are:
- The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the
VPU power-domain)
- The GX SoCs have an additional reset line called "dvin"
Add a new compatible string and adjust the reset line expectations for
these SoCs.
Signed-off-by: Martin Blumenstingl <[email protected]>
---
.../bindings/power/amlogic,meson-ee-pwrc.yaml | 27 +++++++++++++++++++
include/dt-bindings/power/meson-gxbb-power.h | 13 +++++++++
2 files changed, 40 insertions(+)
create mode 100644 include/dt-bindings/power/meson-gxbb-power.h
diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml
index a0e4cf143b9c..15a29ed19327 100644
--- a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml
+++ b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml
@@ -26,6 +26,7 @@ properties:
- amlogic,meson8-pwrc
- amlogic,meson8b-pwrc
- amlogic,meson8m2-pwrc
+ - amlogic,meson-gxbb-pwrc
- amlogic,meson-g12a-pwrc
- amlogic,meson-sm1-pwrc
@@ -42,6 +43,7 @@ properties:
resets:
minItems: 11
+ maxItems: 12
"#power-domain-cells":
const: 1
@@ -77,6 +79,31 @@ allOf:
- resets
- reset-names
+ - if:
+ properties:
+ compatible:
+ enum:
+ - amlogic,meson-gxbb-pwrc
+ then:
+ properties:
+ reset-names:
+ items:
+ - const: viu
+ - const: venc
+ - const: vcbus
+ - const: bt656
+ - const: dvin
+ - const: rdma
+ - const: venci
+ - const: vencp
+ - const: vdac
+ - const: vdi6
+ - const: vencl
+ - const: vid_lock
+ required:
+ - resets
+ - reset-names
+
- if:
properties:
compatible:
diff --git a/include/dt-bindings/power/meson-gxbb-power.h b/include/dt-bindings/power/meson-gxbb-power.h
new file mode 100644
index 000000000000..57ab38dcb6bb
--- /dev/null
+++ b/include/dt-bindings/power/meson-gxbb-power.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong <[email protected]>
+ */
+
+#ifndef _DT_BINDINGS_MESON_GXBB_POWER_H
+#define _DT_BINDINGS_MESON_GXBB_POWER_H
+
+#define PWRC_GXBB_VPU_ID 0
+#define PWRC_GXBB_ETH_ID 1
+
+#endif
--
2.26.0
On 14/04/2020 22:14, Martin Blumenstingl wrote:
> The power domains on the GX SoCs are very similar to G12A. The only
> known differences so far are:
> - The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the
> VPU power-domain)
> - The GX SoCs have an additional reset line called "dvin"
>
> Add a new compatible string and adjust the reset line expectations for
> these SoCs.
>
> Signed-off-by: Martin Blumenstingl <[email protected]>
> ---
> .../bindings/power/amlogic,meson-ee-pwrc.yaml | 27 +++++++++++++++++++
> include/dt-bindings/power/meson-gxbb-power.h | 13 +++++++++
> 2 files changed, 40 insertions(+)
> create mode 100644 include/dt-bindings/power/meson-gxbb-power.h
>
> diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml
> index a0e4cf143b9c..15a29ed19327 100644
> --- a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml
> +++ b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml
> @@ -26,6 +26,7 @@ properties:
> - amlogic,meson8-pwrc
> - amlogic,meson8b-pwrc
> - amlogic,meson8m2-pwrc
> + - amlogic,meson-gxbb-pwrc
> - amlogic,meson-g12a-pwrc
> - amlogic,meson-sm1-pwrc
>
> @@ -42,6 +43,7 @@ properties:
>
> resets:
> minItems: 11
> + maxItems: 12
>
> "#power-domain-cells":
> const: 1
> @@ -77,6 +79,31 @@ allOf:
> - resets
> - reset-names
>
> + - if:
> + properties:
> + compatible:
> + enum:
> + - amlogic,meson-gxbb-pwrc
> + then:
> + properties:
> + reset-names:
> + items:
> + - const: viu
> + - const: venc
> + - const: vcbus
> + - const: bt656
> + - const: dvin
> + - const: rdma
> + - const: venci
> + - const: vencp
> + - const: vdac
> + - const: vdi6
> + - const: vencl
> + - const: vid_lock
> + required:
> + - resets
> + - reset-names
> +
> - if:
> properties:
> compatible:
> diff --git a/include/dt-bindings/power/meson-gxbb-power.h b/include/dt-bindings/power/meson-gxbb-power.h
> new file mode 100644
> index 000000000000..57ab38dcb6bb
> --- /dev/null
> +++ b/include/dt-bindings/power/meson-gxbb-power.h
> @@ -0,0 +1,13 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
> +/*
> + * Copyright (c) 2019 BayLibre, SAS
> + * Author: Neil Armstrong <[email protected]>
> + */
> +
> +#ifndef _DT_BINDINGS_MESON_GXBB_POWER_H
> +#define _DT_BINDINGS_MESON_GXBB_POWER_H
> +
> +#define PWRC_GXBB_VPU_ID 0
> +#define PWRC_GXBB_ETH_ID 1
Should be PWRC_GXBB_ETHERNET_MEM_ID like meson8 bindings.
> +
> +#endif
>
Apart that, itlooks ok.
Neil
Hi Neil,
On Wed, Apr 15, 2020 at 10:51 AM Neil Armstrong <[email protected]> wrote:
[...]
> > + - const: dvin
before I resend, can you please double-check this reset line?
it's the only difference compared to G12A so I thought it would make
sense to check if this is really related to the VPU when we're
switching from one binding to the other anyways (as now is the time to
sort out pending issues - in case there is an issue here)
> > +#define PWRC_GXBB_VPU_ID 0
> > +#define PWRC_GXBB_ETH_ID 1
>
> Should be PWRC_GXBB_ETHERNET_MEM_ID like meson8 bindings.
I can do that, thank you for looking into this!
Martin
Hi Martin,
On 15/04/2020 20:31, Martin Blumenstingl wrote:
> Hi Neil,
>
> On Wed, Apr 15, 2020 at 10:51 AM Neil Armstrong <[email protected]> wrote:
> [...]
>>> + - const: dvin
Yes I rechecked, and it's part of the VPU.
> before I resend, can you please double-check this reset line?
> it's the only difference compared to G12A so I thought it would make
> sense to check if this is really related to the VPU when we're
> switching from one binding to the other anyways (as now is the time to
> sort out pending issues - in case there is an issue here)
>
>>> +#define PWRC_GXBB_VPU_ID 0
>>> +#define PWRC_GXBB_ETH_ID 1
>>
>> Should be PWRC_GXBB_ETHERNET_MEM_ID like meson8 bindings.
> I can do that, thank you for looking into this!
Neil
>
>
> Martin
>