Hi Anand,
On Mon, May 3, 2021 at 4:58 PM Anand Moon <[email protected]> wrote:
>
> As per the S922X datasheet add hdmi power domain
> controller for Meson g12a and g12b SoCs.
>
> Cc: Neil Armstrong <[email protected]>
> Signed-off-by: Anand Moon <[email protected]>
> ---
> drivers/soc/amlogic/meson-ee-pwrc.c | 5 +++++
> include/dt-bindings/power/meson-g12a-power.h | 1 +
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/soc/amlogic/meson-ee-pwrc.c b/drivers/soc/amlogic/meson-ee-pwrc.c
> index 2e07ddf2d6a6..ec402c4ab931 100644
> --- a/drivers/soc/amlogic/meson-ee-pwrc.c
> +++ b/drivers/soc/amlogic/meson-ee-pwrc.c
> @@ -154,6 +154,10 @@ static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = {
> VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
> };
>
> +static struct meson_ee_pwrc_mem_domain meson_pwrc_mem_hdmi[] = {
> + { HHI_MEM_PD_REG0, GENMASK(15, 8) },
> +};
> +
the VPU power domain already includes:
VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
whereas VPU_HHI_MEMPD is bits[15:8]
Having two power domains which are managing the same registers sounds
like it'll be causing some trouble
So for now this is (as I am not even sure what the goal here is):
NACKed-by: Martin Blumenstingl <[email protected]>
Best regards,
Martin
Hi Martin,
On Mon, 3 May 2021 at 20:37, Martin Blumenstingl
<[email protected]> wrote:
>
> Hi Anand,
>
> On Mon, May 3, 2021 at 4:58 PM Anand Moon <[email protected]> wrote:
> >
> > As per the S922X datasheet add hdmi power domain
> > controller for Meson g12a and g12b SoCs.
> >
> > Cc: Neil Armstrong <[email protected]>
> > Signed-off-by: Anand Moon <[email protected]>
> > ---
> > drivers/soc/amlogic/meson-ee-pwrc.c | 5 +++++
> > include/dt-bindings/power/meson-g12a-power.h | 1 +
> > 2 files changed, 6 insertions(+)
> >
> > diff --git a/drivers/soc/amlogic/meson-ee-pwrc.c b/drivers/soc/amlogic/meson-ee-pwrc.c
> > index 2e07ddf2d6a6..ec402c4ab931 100644
> > --- a/drivers/soc/amlogic/meson-ee-pwrc.c
> > +++ b/drivers/soc/amlogic/meson-ee-pwrc.c
> > @@ -154,6 +154,10 @@ static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = {
> > VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
> > };
> >
> > +static struct meson_ee_pwrc_mem_domain meson_pwrc_mem_hdmi[] = {
> > + { HHI_MEM_PD_REG0, GENMASK(15, 8) },
> > +};
> > +
> the VPU power domain already includes:
> VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
> whereas VPU_HHI_MEMPD is bits[15:8]
>
> Having two power domains which are managing the same registers sounds
> like it'll be causing some trouble
> So for now this is (as I am not even sure what the goal here is):
> NACKed-by: Martin Blumenstingl <[email protected]>
>
Ok, thanks. On the line of Ethernet PD, I tried to add this accordingly.
whenever I try something new it fails. Please ignore this series.
> Best regards,
> Martin
Thanks
-Anand