This patch adds GPIO interrupt support for Amloigc-C3 SoC (C308L and C302X)
V1 -> V2: Added driver changes
Huqiang Qin (2):
dt-bindings: interrupt-controller: Add support for Amlogic-C3 SoCs
irqchip: Add support for Amlogic-C3 SoCs
.../interrupt-controller/amlogic,meson-gpio-intc.yaml | 1 +
drivers/irqchip/irq-meson-gpio.c | 5 +++++
2 files changed, 6 insertions(+)
--
2.37.1
Update dt-binding document for GPIO interrupt controller of Amlogic-C3 SoCs
Signed-off-by: Huqiang Qin <[email protected]>
---
.../bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
index e84e4f33b358..3d06db98e978 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
@@ -35,6 +35,7 @@ properties:
- amlogic,meson-sm1-gpio-intc
- amlogic,meson-a1-gpio-intc
- amlogic,meson-s4-gpio-intc
+ - amlogic,c3-gpio-intc
- const: amlogic,meson-gpio-intc
reg:
--
2.37.1
The Amlogic-C3 SoCs support 12 GPIO IRQ lines compared with previous
serial chips and have something different, details are as below.
IRQ Number:
- 54 1 pins on bank TESTN
- 53:40 14 pins on bank X
- 39:33 7 pins on bank D
- 32:27 6 pins on bank A
- 26:22 5 pins on bank E
- 21:15 7 pins on bank C
- 14:0 15 pins on bank B
Signed-off-by: Huqiang Qin <[email protected]>
---
drivers/irqchip/irq-meson-gpio.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/irqchip/irq-meson-gpio.c b/drivers/irqchip/irq-meson-gpio.c
index 7da18ef95211..f88df39f4129 100644
--- a/drivers/irqchip/irq-meson-gpio.c
+++ b/drivers/irqchip/irq-meson-gpio.c
@@ -150,6 +150,10 @@ static const struct meson_gpio_irq_params s4_params = {
INIT_MESON_S4_COMMON_DATA(82)
};
+static const struct meson_gpio_irq_params c3_params = {
+ INIT_MESON_S4_COMMON_DATA(55)
+};
+
static const struct of_device_id meson_irq_gpio_matches[] __maybe_unused = {
{ .compatible = "amlogic,meson8-gpio-intc", .data = &meson8_params },
{ .compatible = "amlogic,meson8b-gpio-intc", .data = &meson8b_params },
@@ -160,6 +164,7 @@ static const struct of_device_id meson_irq_gpio_matches[] __maybe_unused = {
{ .compatible = "amlogic,meson-sm1-gpio-intc", .data = &sm1_params },
{ .compatible = "amlogic,meson-a1-gpio-intc", .data = &a1_params },
{ .compatible = "amlogic,meson-s4-gpio-intc", .data = &s4_params },
+ { .compatible = "amlogic,c3-gpio-intc", .data = &c3_params },
{ }
};
--
2.37.1
On Wed, Jun 28, 2023 at 05:15:32PM +0800, Huqiang Qin wrote:
> Update dt-binding document for GPIO interrupt controller of Amlogic-C3 SoCs
>
> Signed-off-by: Huqiang Qin <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Cheers,
Conor.
> ---
> .../bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
> index e84e4f33b358..3d06db98e978 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
> @@ -35,6 +35,7 @@ properties:
> - amlogic,meson-sm1-gpio-intc
> - amlogic,meson-a1-gpio-intc
> - amlogic,meson-s4-gpio-intc
> + - amlogic,c3-gpio-intc
> - const: amlogic,meson-gpio-intc
>
> reg:
> --
> 2.37.1
>
On Wed, Jun 28, 2023 at 11:16 AM Huqiang Qin <[email protected]> wrote:
>
> Update dt-binding document for GPIO interrupt controller of Amlogic-C3 SoCs
>
> Signed-off-by: Huqiang Qin <[email protected]>
Acked-by: Martin Blumenstingl <[email protected]>
On Wed, Jun 28, 2023 at 11:16 AM Huqiang Qin <[email protected]> wrote:
>
> The Amlogic-C3 SoCs support 12 GPIO IRQ lines compared with previous
> serial chips and have something different, details are as below.
>
> IRQ Number:
> - 54 1 pins on bank TESTN
> - 53:40 14 pins on bank X
> - 39:33 7 pins on bank D
> - 32:27 6 pins on bank A
> - 26:22 5 pins on bank E
> - 21:15 7 pins on bank C
> - 14:0 15 pins on bank B
>
> Signed-off-by: Huqiang Qin <[email protected]>
Acked-by: Martin Blumenstingl <[email protected]>
Hi Thomas, Marc
Friendly ping.
On 2023/6/28 17:15, Huqiang Qin wrote:
> This patch adds GPIO interrupt support for Amloigc-C3 SoC (C308L and C302X)
>
> V1 -> V2: Added driver changes
>
> Huqiang Qin (2):
> dt-bindings: interrupt-controller: Add support for Amlogic-C3 SoCs
> irqchip: Add support for Amlogic-C3 SoCs
>
> .../interrupt-controller/amlogic,meson-gpio-intc.yaml | 1 +
> drivers/irqchip/irq-meson-gpio.c | 5 +++++
> 2 files changed, 6 insertions(+)
>
Best Regards,
Huqiang Qin