2018-07-12 03:14:35

by Andrey Smirnov

[permalink] [raw]
Subject: [PATCH 0/2] Follow up fixes for SCU3 ESB

Shawn:

Here's a couple of fixes for things I missed in the
[original-submission]. Sorry about the inconvenience.

Thanks,
Andrey Smirnov

[original-submission] lkml.kernel.org/r/[email protected]

Andrey Smirnov (2):
ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
ARM: dts: imx51-zii-scu3-esb: Fix RAVE SP watchdog compatible string

arch/arm/boot/dts/imx51-zii-scu3-esb.dts | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)

--
2.17.1



2018-07-12 03:13:58

by Andrey Smirnov

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Subject: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config

Add DT code to explicitly configure PAD_AUD3_BB_CK and avoid relying
on defaults.

Cc: Fabio Estevam <[email protected]>
Cc: Nikita Yushchenko <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: [email protected]
Cc: Shawn Guo <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: Andrew Lunn <[email protected]>
Signed-off-by: Andrey Smirnov <[email protected]>
---
arch/arm/boot/dts/imx51-zii-scu3-esb.dts | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
index 2941a92d40f1..0bb42c00d72b 100644
--- a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
+++ b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
@@ -221,6 +221,8 @@
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_switch>;

ports {
#address-cells = <1>;
@@ -426,6 +428,12 @@
>;
};

+ pinctrl_switch: switchgrp {
+ fsl,pins = <
+ MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
--
2.17.1


2018-07-12 03:14:44

by Andrey Smirnov

[permalink] [raw]
Subject: [PATCH 2/2] ARM: dts: imx51-zii-scu3-esb: Fix RAVE SP watchdog compatible string

It looks like I made a nasty typo in the original patch which resulted
in missing watchdog device. Fix it.

Cc: Fabio Estevam <[email protected]>
Cc: Nikita Yushchenko <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: [email protected]
Cc: Shawn Guo <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: Andrew Lunn <[email protected]>
Signed-off-by: Andrey Smirnov <[email protected]>
---
arch/arm/boot/dts/imx51-zii-scu3-esb.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
index 0bb42c00d72b..dffb761a1cc8 100644
--- a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
+++ b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
@@ -325,7 +325,7 @@
#size-cells = <1>;

watchdog {
- compatible = "zii,rave-sp-watchodg-legacy";
+ compatible = "zii,rave-sp-watchdog-legacy";
};

eeprom@a4 {
--
2.17.1


2018-07-12 13:32:45

by Andrew Lunn

[permalink] [raw]
Subject: Re: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config

On Wed, Jul 11, 2018 at 07:33:36PM -0700, Andrey Smirnov wrote:
> Add DT code to explicitly configure PAD_AUD3_BB_CK and avoid relying
> on defaults.
>
> Cc: Fabio Estevam <[email protected]>
> Cc: Nikita Yushchenko <[email protected]>
> Cc: Lucas Stach <[email protected]>
> Cc: [email protected]
> Cc: Shawn Guo <[email protected]>
> Cc: Rob Herring <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: Andrew Lunn <[email protected]>
> Signed-off-by: Andrey Smirnov <[email protected]>

Thanks for adding this.

Reviewed-by: Andrew Lunn <[email protected]>

Andrew

2018-07-12 13:39:24

by Fabio Estevam

[permalink] [raw]
Subject: Re: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config

Hi Andrey,

On Wed, Jul 11, 2018 at 11:33 PM, Andrey Smirnov
<[email protected]> wrote:

> + pinctrl_switch: switchgrp {
> + fsl,pins = <
> + MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5

The i.MX51 Reference Manual states that 0xa5 is the default reset
value for the register IOMUXC_SW_PAD_CTL_PAD_AUD3_BB_CK.

By reading your commit log I had the impression you wanted to provide
the default value explicitly.

Please clarify.

2018-07-12 17:17:13

by Chris Healy

[permalink] [raw]
Subject: Re: [PATCH 2/2] ARM: dts: imx51-zii-scu3-esb: Fix RAVE SP watchdog compatible string

Tested-by: Chris Healy <[email protected]>

watchdog driver loads and works now.

On Wed, Jul 11, 2018 at 7:33 PM, Andrey Smirnov
<[email protected]> wrote:
> It looks like I made a nasty typo in the original patch which resulted
> in missing watchdog device. Fix it.
>
> Cc: Fabio Estevam <[email protected]>
> Cc: Nikita Yushchenko <[email protected]>
> Cc: Lucas Stach <[email protected]>
> Cc: [email protected]
> Cc: Shawn Guo <[email protected]>
> Cc: Rob Herring <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: Andrew Lunn <[email protected]>
> Signed-off-by: Andrey Smirnov <[email protected]>
> ---
> arch/arm/boot/dts/imx51-zii-scu3-esb.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
> index 0bb42c00d72b..dffb761a1cc8 100644
> --- a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
> +++ b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
> @@ -325,7 +325,7 @@
> #size-cells = <1>;
>
> watchdog {
> - compatible = "zii,rave-sp-watchodg-legacy";
> + compatible = "zii,rave-sp-watchdog-legacy";
> };
>
> eeprom@a4 {
> --
> 2.17.1
>

2018-07-13 05:16:32

by Andrey Smirnov

[permalink] [raw]
Subject: Re: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config

On Thu, Jul 12, 2018 at 6:37 AM Fabio Estevam <[email protected]> wrote:
>
> Hi Andrey,
>
> On Wed, Jul 11, 2018 at 11:33 PM, Andrey Smirnov
> <[email protected]> wrote:
>
> > + pinctrl_switch: switchgrp {
> > + fsl,pins = <
> > + MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5
>
> The i.MX51 Reference Manual states that 0xa5 is the default reset
> value for the register IOMUXC_SW_PAD_CTL_PAD_AUD3_BB_CK.
>
> By reading your commit log I had the impression you wanted to provide
> the default value explicitly.
>
> Please clarify.

I wanted to avoid relying on defaults be it register reset values or
settings that bootloader left us with. Default value of 0xa5 works,
but, given how the pin is IRQ_TYPE_LEVEL_HIGH, I though it would be
better to configure it to have a pulldown. Do you want me to add that
to commit log?

Thanks,
Andrey Smirnov

2018-07-13 11:03:02

by Fabio Estevam

[permalink] [raw]
Subject: Re: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config

On Fri, Jul 13, 2018 at 2:15 AM, Andrey Smirnov
<[email protected]> wrote:

> I wanted to avoid relying on defaults be it register reset values or
> settings that bootloader left us with. Default value of 0xa5 works,
> but, given how the pin is IRQ_TYPE_LEVEL_HIGH, I though it would be
> better to configure it to have a pulldown. Do you want me to add that
> to commit log?

Yes, that would be nice. Thanks