2022-10-27 13:43:54

by Robert Foss

Subject: [PATCH v1 4/5] clk: qcom: dispcc-sm8250: Add missing EDP clocks for sm8350

SM8350 supports embedded displayport, but the clocks for this
were previously not enabled.

Signed-off-by: Robert Foss <[email protected]>
---
drivers/clk/qcom/dispcc-sm8250.c | 22 +++++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c
index a7606580cf22..d2aaa44ed3d4 100644
--- a/drivers/clk/qcom/dispcc-sm8250.c
+++ b/drivers/clk/qcom/dispcc-sm8250.c
@@ -462,6 +462,20 @@ static struct clk_branch disp_cc_mdss_edp_link_clk = {
},
};

+static struct clk_regmap_div disp_cc_mdss_edp_link_div_clk_src = {
+ .reg = 0x2288,
+ .shift = 0,
+ .width = 2,
+ .clkr.hw.init = &(struct clk_init_data) {
+ .name = "disp_cc_mdss_edp_link_div_clk_src",
+ .parent_hws = (const struct clk_hw*[]){
+ &disp_cc_mdss_edp_link_clk_src.clkr.hw,
+ },
+ .num_parents = 1,
+ .ops = &clk_regmap_div_ro_ops,
+ },
+};
+
static struct clk_branch disp_cc_mdss_edp_link_intf_clk = {
.halt_reg = 0x2074,
.halt_check = BRANCH_HALT,
@@ -471,7 +485,7 @@ static struct clk_branch disp_cc_mdss_edp_link_intf_clk = {
.hw.init = &(struct clk_init_data){
.name = "disp_cc_mdss_edp_link_intf_clk",
.parent_hws = (const struct clk_hw*[]){
- &disp_cc_mdss_edp_link_clk_src.clkr.hw,
+ &disp_cc_mdss_edp_link_div_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_GET_RATE_NOCACHE,
@@ -1175,6 +1189,7 @@ static struct clk_regmap *disp_cc_sm8250_clocks[] = {
[DISP_CC_MDSS_EDP_GTC_CLK_SRC] = &disp_cc_mdss_edp_gtc_clk_src.clkr,
[DISP_CC_MDSS_EDP_LINK_CLK] = &disp_cc_mdss_edp_link_clk.clkr,
[DISP_CC_MDSS_EDP_LINK_CLK_SRC] = &disp_cc_mdss_edp_link_clk_src.clkr,
+ [DISP_CC_MDSS_EDP_LINK_DIV_CLK_SRC] = &disp_cc_mdss_edp_link_div_clk_src.clkr,
[DISP_CC_MDSS_EDP_LINK_INTF_CLK] = &disp_cc_mdss_edp_link_intf_clk.clkr,
[DISP_CC_MDSS_EDP_PIXEL_CLK] = &disp_cc_mdss_edp_pixel_clk.clkr,
[DISP_CC_MDSS_EDP_PIXEL_CLK_SRC] = &disp_cc_mdss_edp_pixel_clk_src.clkr,
@@ -1285,7 +1300,11 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev)
&disp_cc_mdss_dp_pixel1_clk_src,
&disp_cc_mdss_dp_pixel2_clk_src,
&disp_cc_mdss_dp_pixel_clk_src,
+ &disp_cc_mdss_edp_aux_clk_src,
+ &disp_cc_mdss_edp_link_clk_src,
+ &disp_cc_mdss_edp_pixel_clk_src,
&disp_cc_mdss_esc0_clk_src,
+ &disp_cc_mdss_esc1_clk_src,
&disp_cc_mdss_mdp_clk_src,
&disp_cc_mdss_pclk0_clk_src,
&disp_cc_mdss_pclk1_clk_src,
@@ -1297,6 +1316,7 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev)
&disp_cc_mdss_byte1_div_clk_src,
&disp_cc_mdss_dp_link1_div_clk_src,
&disp_cc_mdss_dp_link_div_clk_src,
+ &disp_cc_mdss_edp_link_div_clk_src,
};
unsigned int i;
static bool offset_applied;
--
2.34.1

2022-10-27 13:57:36

by Dmitry Baryshkov

Subject: Re: [PATCH v1 4/5] clk: qcom: dispcc-sm8250: Add missing EDP clocks for sm8350

On 27/10/2022 15:34, Robert Foss wrote:
> SM8350 supports embedded displayport, but the clocks for this
> were previously not enabled.

I'd say 'not accounted for' instead. Bjorn has added eDP clocks, but
they were following the 8150 (no div_clk_src) and the offsets were not
updated.

>
> Signed-off-by: Robert Foss <[email protected]>
> ---
> drivers/clk/qcom/dispcc-sm8250.c | 22 +++++++++++++++++++++-
> 1 file changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c
> index a7606580cf22..d2aaa44ed3d4 100644
> --- a/drivers/clk/qcom/dispcc-sm8250.c
> +++ b/drivers/clk/qcom/dispcc-sm8250.c
> @@ -462,6 +462,20 @@ static struct clk_branch disp_cc_mdss_edp_link_clk = {
> },
> };
>
> +static struct clk_regmap_div disp_cc_mdss_edp_link_div_clk_src = {
> + .reg = 0x2288,
> + .shift = 0,
> + .width = 2,
> + .clkr.hw.init = &(struct clk_init_data) {
> + .name = "disp_cc_mdss_edp_link_div_clk_src",
> + .parent_hws = (const struct clk_hw*[]){
> + &disp_cc_mdss_edp_link_clk_src.clkr.hw,
> + },
> + .num_parents = 1,
> + .ops = &clk_regmap_div_ro_ops,
> + },
> +};
> +
> static struct clk_branch disp_cc_mdss_edp_link_intf_clk = {
> .halt_reg = 0x2074,
> .halt_check = BRANCH_HALT,
> @@ -471,7 +485,7 @@ static struct clk_branch disp_cc_mdss_edp_link_intf_clk = {
> .hw.init = &(struct clk_init_data){
> .name = "disp_cc_mdss_edp_link_intf_clk",
> .parent_hws = (const struct clk_hw*[]){
> - &disp_cc_mdss_edp_link_clk_src.clkr.hw,
> + &disp_cc_mdss_edp_link_div_clk_src.clkr.hw,
> },
> .num_parents = 1,
> .flags = CLK_GET_RATE_NOCACHE,
> @@ -1175,6 +1189,7 @@ static struct clk_regmap *disp_cc_sm8250_clocks[] = {
> [DISP_CC_MDSS_EDP_GTC_CLK_SRC] = &disp_cc_mdss_edp_gtc_clk_src.clkr,
> [DISP_CC_MDSS_EDP_LINK_CLK] = &disp_cc_mdss_edp_link_clk.clkr,
> [DISP_CC_MDSS_EDP_LINK_CLK_SRC] = &disp_cc_mdss_edp_link_clk_src.clkr,
> + [DISP_CC_MDSS_EDP_LINK_DIV_CLK_SRC] = &disp_cc_mdss_edp_link_div_clk_src.clkr,
> [DISP_CC_MDSS_EDP_LINK_INTF_CLK] = &disp_cc_mdss_edp_link_intf_clk.clkr,
> [DISP_CC_MDSS_EDP_PIXEL_CLK] = &disp_cc_mdss_edp_pixel_clk.clkr,
> [DISP_CC_MDSS_EDP_PIXEL_CLK_SRC] = &disp_cc_mdss_edp_pixel_clk_src.clkr,
> @@ -1285,7 +1300,11 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev)
> &disp_cc_mdss_dp_pixel1_clk_src,
> &disp_cc_mdss_dp_pixel2_clk_src,
> &disp_cc_mdss_dp_pixel_clk_src,
> + &disp_cc_mdss_edp_aux_clk_src,
> + &disp_cc_mdss_edp_link_clk_src,
> + &disp_cc_mdss_edp_pixel_clk_src,
> &disp_cc_mdss_esc0_clk_src,
> + &disp_cc_mdss_esc1_clk_src,
> &disp_cc_mdss_mdp_clk_src,
> &disp_cc_mdss_pclk0_clk_src,
> &disp_cc_mdss_pclk1_clk_src,
> @@ -1297,6 +1316,7 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev)
> &disp_cc_mdss_byte1_div_clk_src,
> &disp_cc_mdss_dp_link1_div_clk_src,
> &disp_cc_mdss_dp_link_div_clk_src,
> + &disp_cc_mdss_edp_link_div_clk_src,
> };
> unsigned int i;
> static bool offset_applied;

--
With best wishes
Dmitry

2022-11-02 08:49:13

by Robert Foss

Subject: Re: [PATCH v1 4/5] clk: qcom: dispcc-sm8250: Add missing EDP clocks for sm8350

On Thu, 27 Oct 2022 at 14:42, Dmitry Baryshkov
<[email protected]> wrote:
>
> On 27/10/2022 15:34, Robert Foss wrote:
> > SM8350 supports embedded displayport, but the clocks for this
> > were previously not enabled.
>
> I'd say 'not accounted for' instead. Bjorn has added eDP clocks, but
> they were following the 8150 (no div_clk_src) and the offsets were not
> updated.

Ack.

>
> >
> > Signed-off-by: Robert Foss <[email protected]>
> > ---
> > drivers/clk/qcom/dispcc-sm8250.c | 22 +++++++++++++++++++++-
> > 1 file changed, 21 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c
> > index a7606580cf22..d2aaa44ed3d4 100644
> > --- a/drivers/clk/qcom/dispcc-sm8250.c
> > +++ b/drivers/clk/qcom/dispcc-sm8250.c
> > @@ -462,6 +462,20 @@ static struct clk_branch disp_cc_mdss_edp_link_clk = {
> > },
> > };
> >
> > +static struct clk_regmap_div disp_cc_mdss_edp_link_div_clk_src = {
> > + .reg = 0x2288,
> > + .shift = 0,
> > + .width = 2,
> > + .clkr.hw.init = &(struct clk_init_data) {
> > + .name = "disp_cc_mdss_edp_link_div_clk_src",
> > + .parent_hws = (const struct clk_hw*[]){
> > + &disp_cc_mdss_edp_link_clk_src.clkr.hw,
> > + },
> > + .num_parents = 1,
> > + .ops = &clk_regmap_div_ro_ops,
> > + },
> > +};
> > +
> > static struct clk_branch disp_cc_mdss_edp_link_intf_clk = {
> > .halt_reg = 0x2074,
> > .halt_check = BRANCH_HALT,
> > @@ -471,7 +485,7 @@ static struct clk_branch disp_cc_mdss_edp_link_intf_clk = {
> > .hw.init = &(struct clk_init_data){
> > .name = "disp_cc_mdss_edp_link_intf_clk",
> > .parent_hws = (const struct clk_hw*[]){
> > - &disp_cc_mdss_edp_link_clk_src.clkr.hw,
> > + &disp_cc_mdss_edp_link_div_clk_src.clkr.hw,
> > },
> > .num_parents = 1,
> > .flags = CLK_GET_RATE_NOCACHE,
> > @@ -1175,6 +1189,7 @@ static struct clk_regmap *disp_cc_sm8250_clocks[] = {
> > [DISP_CC_MDSS_EDP_GTC_CLK_SRC] = &disp_cc_mdss_edp_gtc_clk_src.clkr,
> > [DISP_CC_MDSS_EDP_LINK_CLK] = &disp_cc_mdss_edp_link_clk.clkr,
> > [DISP_CC_MDSS_EDP_LINK_CLK_SRC] = &disp_cc_mdss_edp_link_clk_src.clkr,
> > + [DISP_CC_MDSS_EDP_LINK_DIV_CLK_SRC] = &disp_cc_mdss_edp_link_div_clk_src.clkr,
> > [DISP_CC_MDSS_EDP_LINK_INTF_CLK] = &disp_cc_mdss_edp_link_intf_clk.clkr,
> > [DISP_CC_MDSS_EDP_PIXEL_CLK] = &disp_cc_mdss_edp_pixel_clk.clkr,
> > [DISP_CC_MDSS_EDP_PIXEL_CLK_SRC] = &disp_cc_mdss_edp_pixel_clk_src.clkr,
> > @@ -1285,7 +1300,11 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev)
> > &disp_cc_mdss_dp_pixel1_clk_src,
> > &disp_cc_mdss_dp_pixel2_clk_src,
> > &disp_cc_mdss_dp_pixel_clk_src,
> > + &disp_cc_mdss_edp_aux_clk_src,
> > + &disp_cc_mdss_edp_link_clk_src,
> > + &disp_cc_mdss_edp_pixel_clk_src,
> > &disp_cc_mdss_esc0_clk_src,
> > + &disp_cc_mdss_esc1_clk_src,
> > &disp_cc_mdss_mdp_clk_src,
> > &disp_cc_mdss_pclk0_clk_src,
> > &disp_cc_mdss_pclk1_clk_src,
> > @@ -1297,6 +1316,7 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev)
> > &disp_cc_mdss_byte1_div_clk_src,
> > &disp_cc_mdss_dp_link1_div_clk_src,
> > &disp_cc_mdss_dp_link_div_clk_src,
> > + &disp_cc_mdss_edp_link_div_clk_src,
> > };
> > unsigned int i;
> > static bool offset_applied;
>
> --
> With best wishes
> Dmitry
>