2018-08-21 06:54:45

by Agrawal, Akshu

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Subject: [PATCH] clk: x86: Set default parent to 48Mhz

System clk provided in ST soc can be set to:
48Mhz, non-spread
25Mhz, spread
To get accurate rate, we need it to set it at non-spread
option which is 48Mhz.

Signed-off-by: Akshu Agrawal <[email protected]>
---
drivers/clk/x86/clk-st.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/x86/clk-st.c b/drivers/clk/x86/clk-st.c
index fb62f39..3a0996f 100644
--- a/drivers/clk/x86/clk-st.c
+++ b/drivers/clk/x86/clk-st.c
@@ -46,7 +46,7 @@ static int st_clk_probe(struct platform_device *pdev)
clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents),
0, st_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL);

- clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_25M]->clk);
+ clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_48M]->clk);

hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", "oscout1_mux",
0, st_data->base + MISCCLKCNTL1, OSCCLKENB,
--
1.9.1



2018-08-27 23:02:09

by Daniel Kurtz

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Subject: Re: [PATCH] clk: x86: Set default parent to 48Mhz

On Tue, Aug 21, 2018 at 12:53 AM Akshu Agrawal <[email protected]> wrote:
>
> System clk provided in ST soc can be set to:
> 48Mhz, non-spread
> 25Mhz, spread
> To get accurate rate, we need it to set it at non-spread
> option which is 48Mhz.
>
> Signed-off-by: Akshu Agrawal <[email protected]>

Reviewed-by: Daniel Kurtz <[email protected]>

> ---
> drivers/clk/x86/clk-st.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/x86/clk-st.c b/drivers/clk/x86/clk-st.c
> index fb62f39..3a0996f 100644
> --- a/drivers/clk/x86/clk-st.c
> +++ b/drivers/clk/x86/clk-st.c
> @@ -46,7 +46,7 @@ static int st_clk_probe(struct platform_device *pdev)
> clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents),
> 0, st_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL);
>
> - clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_25M]->clk);
> + clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_48M]->clk);
>
> hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", "oscout1_mux",
> 0, st_data->base + MISCCLKCNTL1, OSCCLKENB,
> --
> 1.9.1
>

2018-08-28 22:30:56

by Stephen Boyd

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Subject: Re: [PATCH] clk: x86: Set default parent to 48Mhz

Quoting Akshu Agrawal (2018-08-20 23:51:57)
> System clk provided in ST soc can be set to:
> 48Mhz, non-spread
> 25Mhz, spread
> To get accurate rate, we need it to set it at non-spread
> option which is 48Mhz.
>
> Signed-off-by: Akshu Agrawal <[email protected]>

Does this need to go to 4.18 stable trees? I don't see a fixes tag so
I'm trying to understand merge priority of this patch.


2018-08-29 04:26:36

by Agrawal, Akshu

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Subject: Re: [PATCH] clk: x86: Set default parent to 48Mhz



On 8/29/2018 3:59 AM, Stephen Boyd wrote:
> Quoting Akshu Agrawal (2018-08-20 23:51:57)
>> System clk provided in ST soc can be set to:
>> 48Mhz, non-spread
>> 25Mhz, spread
>> To get accurate rate, we need it to set it at non-spread
>> option which is 48Mhz.
>>
>> Signed-off-by: Akshu Agrawal <[email protected]>
>
> Does this need to go to 4.18 stable trees? I don't see a fixes tag so
> I'm trying to understand merge priority of this patch.
>
Yes, and its a fix, as it fixes the in accuracy in the bclk which is
derived from this clk.

Thanks,
Akshu

2018-08-30 21:48:59

by Stephen Boyd

[permalink] [raw]
Subject: Re: [PATCH] clk: x86: Set default parent to 48Mhz

Quoting Akshu Agrawal (2018-08-20 23:51:57)
> System clk provided in ST soc can be set to:
> 48Mhz, non-spread
> 25Mhz, spread
> To get accurate rate, we need it to set it at non-spread
> option which is 48Mhz.
>
> Signed-off-by: Akshu Agrawal <[email protected]>
> ---

Applied to clk-fixes