This series is based on matthias github v6.3-tmp. Since there is a
dependence in the following series, I resend a series for them.
patchwork.kernel.org/project/linux-mediatek/list/?series=702423
patchwork.kernel.org/project/linux-mediatek/list/?series=702078
Allen-KH Cheng (3):
media: dt-bindings: media: mediatek: Rename child node names for
decoder
media: dt-bindings: media: mediatek: Remove "dma-ranges" property for
decoder
arm64: dts: mt8192: Add video-codec nodes
Yunfei Dong (3):
media: dt-bindings: media: mediatek: vcodec: adapt to the
'clock-names' of different platforms
media: dt-bindings: media: mediatek: vcodec: Change the max reg value
to 2
arm64: dts: mt8195: Add video decoder node
.../media/mediatek,vcodec-subdev-decoder.yaml | 113 +++++++-----------
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 59 +++++++++
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 70 +++++++++++
3 files changed, 173 insertions(+), 69 deletions(-)
--
2.18.0
From: Yunfei Dong <[email protected]>
mt8195 and mt8192 have different clock numbers, separate 'clock-names'
according to compatible name.
Signed-off-by: Yunfei Dong <[email protected]>
Signed-off-by: Allen-KH Cheng <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
Tested-by: Chen-Yu Tsai <[email protected]>
---
.../media/mediatek,vcodec-subdev-decoder.yaml | 41 ++++++++++++++++---
1 file changed, 35 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
index 7efc70ae4406..51c0ff7baa52 100644
--- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
@@ -110,15 +110,12 @@ patternProperties:
Refer to bindings/iommu/mediatek,iommu.yaml.
clocks:
+ minItems: 4
maxItems: 5
clock-names:
- items:
- - const: sel
- - const: soc-vdec
- - const: soc-lat
- - const: vdec
- - const: top
+ minItems: 4
+ maxItems: 5
assigned-clocks:
maxItems: 1
@@ -160,6 +157,38 @@ then:
required:
- interrupts
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - mediatek,mt8192-vcodec-dec
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: sel
+ - const: soc-vdec
+ - const: soc-lat
+ - const: vdec
+ - const: top
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - mediatek,mt8195-vcodec-dec
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: sel
+ - const: vdec
+ - const: lat
+ - const: top
+
additionalProperties: false
examples:
--
2.18.0
Because the decoder nodes already make use of the iommus property to
configure the IOMMU for address translations, having a dma-ranges
property makes no sense.
In fact, after commit f1ad5338a4d5 ("of: Fix "dma-ranges" handling for
bus controllers"), having a dma-ranges property causes IOMMU faults.
Remove the dma-ranges property and update the example.
Signed-off-by: Allen-KH Cheng <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Acked-by: Rob Herring <[email protected]>
Reviewed-by: Nícolas F. R. A. Prado <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
Tested-by: Chen-Yu Tsai <[email protected]>
---
.../bindings/media/mediatek,vcodec-subdev-decoder.yaml | 7 -------
1 file changed, 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
index 46308cdaacc0..7efc70ae4406 100644
--- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
@@ -76,11 +76,6 @@ properties:
The node of system control processor (SCP), using
the remoteproc & rpmsg framework.
- dma-ranges:
- maxItems: 1
- description: |
- Describes the physical address space of IOMMU maps to memory.
-
"#address-cells":
const: 2
@@ -151,7 +146,6 @@ required:
- reg
- iommus
- mediatek,scp
- - dma-ranges
- ranges
if:
@@ -185,7 +179,6 @@ examples:
compatible = "mediatek,mt8192-vcodec-dec";
mediatek,scp = <&scp>;
iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>;
- dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0 0 0 0x16000000 0 0x40000>;
--
2.18.0
From: Yunfei Dong <[email protected]>
Need to add racing control register base in device node for mt8195 support
inner racing mode. Changing the max reg value from 1 to 2.
Adding the description for VDEC_SYS and VDEC_MISC.
Signed-off-by: Yunfei Dong <[email protected]>
Signed-off-by: Allen-KH Cheng <[email protected]>
Acked-by: Rob Herring <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
Tested-by: Chen-Yu Tsai <[email protected]>
---
.../bindings/media/mediatek,vcodec-subdev-decoder.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
index 51c0ff7baa52..cfd13a6b6b68 100644
--- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
@@ -61,7 +61,10 @@ properties:
- mediatek,mt8195-vcodec-dec
reg:
- maxItems: 1
+ minItems: 1
+ items:
+ - description: VDEC_SYS register space
+ - description: VDEC_RACING_CTRL register space
iommus:
minItems: 1
@@ -98,6 +101,7 @@ patternProperties:
reg:
maxItems: 1
+ description: VDEC_MISC register space
interrupts:
maxItems: 1
--
2.18.0
In order to make the names of the child nodes more generic, we rename
"vcodec-lat" and "vcodec-core" to "video-codec" for decoder in
patternProperties and example.
Signed-off-by: Allen-KH Cheng <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
Tested-by: Chen-Yu Tsai <[email protected]>
---
.../media/mediatek,vcodec-subdev-decoder.yaml | 61 ++-----------------
1 file changed, 5 insertions(+), 56 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
index c4f20acdc1f8..46308cdaacc0 100644
--- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
@@ -91,12 +91,13 @@ properties:
# Required child node:
patternProperties:
- '^vcodec-lat@[0-9a-f]+$':
+ '^video-codec@[0-9a-f]+$':
type: object
properties:
compatible:
enum:
+ - mediatek,mtk-vcodec-core
- mediatek,mtk-vcodec-lat
- mediatek,mtk-vcodec-lat-soc
@@ -145,59 +146,6 @@ patternProperties:
additionalProperties: false
- '^vcodec-core@[0-9a-f]+$':
- type: object
-
- properties:
- compatible:
- const: mediatek,mtk-vcodec-core
-
- reg:
- maxItems: 1
-
- interrupts:
- maxItems: 1
-
- iommus:
- minItems: 1
- maxItems: 32
- description: |
- List of the hardware port in respective IOMMU block for current Socs.
- Refer to bindings/iommu/mediatek,iommu.yaml.
-
- clocks:
- maxItems: 5
-
- clock-names:
- items:
- - const: sel
- - const: soc-vdec
- - const: soc-lat
- - const: vdec
- - const: top
-
- assigned-clocks:
- maxItems: 1
-
- assigned-clock-parents:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- required:
- - compatible
- - reg
- - interrupts
- - iommus
- - clocks
- - clock-names
- - assigned-clocks
- - assigned-clock-parents
- - power-domains
-
- additionalProperties: false
-
required:
- compatible
- reg
@@ -211,6 +159,7 @@ if:
compatible:
contains:
enum:
+ - mediatek,mtk-vcodec-core
- mediatek,mtk-vcodec-lat
then:
@@ -241,7 +190,7 @@ examples:
#size-cells = <2>;
ranges = <0 0 0 0x16000000 0 0x40000>;
reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */
- vcodec-lat@10000 {
+ video-codec@10000 {
compatible = "mediatek,mtk-vcodec-lat";
reg = <0 0x10000 0 0x800>;
interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -264,7 +213,7 @@ examples:
power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>;
};
- vcodec-core@25000 {
+ video-codec@25000 {
compatible = "mediatek,mtk-vcodec-core";
reg = <0 0x25000 0 0x1000>;
interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 0>;
--
2.18.0
Add video-codec lat and core nodes for mt8192 SoC.
Signed-off-by: Allen-KH Cheng <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Nícolas F. R. A. Prado <[email protected]>
Tested-by: Nícolas F. R. A. Prado <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
Tested-by: Chen-Yu Tsai <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 59 ++++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 87b91c8feaf9..f0dc7a943a90 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -1517,6 +1517,65 @@
power-domains = <&spm MT8192_POWER_DOMAIN_ISP2>;
};
+ vcodec_dec: video-codec@16000000 {
+ compatible = "mediatek,mt8192-vcodec-dec";
+ reg = <0 0x16000000 0 0x1000>;
+ mediatek,scp = <&scp>;
+ iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0 0 0 0x16000000 0 0x26000>;
+
+ video-codec@10000 {
+ compatible = "mediatek,mtk-vcodec-lat";
+ reg = <0x0 0x10000 0 0x800>;
+ interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 0>;
+ iommus = <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD2_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_LAT0_AVC_MV_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_LAT0_PRED_RD_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_LAT0_TILE_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_LAT0_WDMA_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_LAT0_RG_CTRL_DMA_EXT>,
+ <&iommu0 M4U_PORT_L5_VDEC_UFO_ENC_EXT>;
+ clocks = <&topckgen CLK_TOP_VDEC_SEL>,
+ <&vdecsys_soc CLK_VDEC_SOC_VDEC>,
+ <&vdecsys_soc CLK_VDEC_SOC_LAT>,
+ <&vdecsys_soc CLK_VDEC_SOC_LARB1>,
+ <&topckgen CLK_TOP_MAINPLL_D4>;
+ clock-names = "sel", "soc-vdec", "soc-lat", "vdec", "top";
+ assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>;
+ };
+
+ video-codec@25000 {
+ compatible = "mediatek,mtk-vcodec-core";
+ reg = <0 0x25000 0 0x1000>;
+ interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 0>;
+ iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_UFO_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_PP_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_PRED_RD_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_PRED_WR_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_PPWRAP_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_TILE_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_VLD_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_VLD2_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_AVC_MV_EXT>,
+ <&iommu0 M4U_PORT_L4_VDEC_RG_CTRL_DMA_EXT>;
+ clocks = <&topckgen CLK_TOP_VDEC_SEL>,
+ <&vdecsys CLK_VDEC_VDEC>,
+ <&vdecsys CLK_VDEC_LAT>,
+ <&vdecsys CLK_VDEC_LARB1>,
+ <&topckgen CLK_TOP_MAINPLL_D4>;
+ clock-names = "sel", "soc-vdec", "soc-lat", "vdec", "top";
+ assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_VDEC2>;
+ };
+ };
+
larb5: larb@1600d000 {
compatible = "mediatek,mt8192-smi-larb";
reg = <0 0x1600d000 0 0x1000>;
--
2.18.0
From: Yunfei Dong <[email protected]>
Add video decoder node to mt8195 device tree.
Signed-off-by: Yunfei Dong <[email protected]>
Signed-off-by: Allen-KH Cheng <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
Tested-by: Chen-Yu Tsai <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 70 ++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 8fc527570791..d0d53e0bfbfc 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -2211,6 +2211,76 @@
power-domains = <&spm MT8195_POWER_DOMAIN_CAM>;
};
+ video-codec@18000000 {
+ compatible = "mediatek,mt8195-vcodec-dec";
+ mediatek,scp = <&scp>;
+ iommus = <&iommu_vdo M4U_PORT_L21_VDEC_MC_EXT>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ reg = <0 0x18000000 0 0x1000>,
+ <0 0x18004000 0 0x1000>;
+ ranges = <0 0 0 0x18000000 0 0x26000>;
+
+ video-codec@2000 {
+ compatible = "mediatek,mtk-vcodec-lat-soc";
+ reg = <0 0x2000 0 0x800>;
+ iommus = <&iommu_vpp M4U_PORT_L23_VDEC_UFO_ENC_EXT>,
+ <&iommu_vpp M4U_PORT_L23_VDEC_RDMA_EXT>;
+ clocks = <&topckgen CLK_TOP_VDEC>,
+ <&vdecsys_soc CLK_VDEC_SOC_VDEC>,
+ <&vdecsys_soc CLK_VDEC_SOC_LAT>,
+ <&topckgen CLK_TOP_UNIVPLL_D4>;
+ clock-names = "sel", "vdec", "lat", "top";
+ assigned-clocks = <&topckgen CLK_TOP_VDEC>;
+ assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
+ power-domains = <&spm MT8195_POWER_DOMAIN_VDEC0>;
+ };
+
+ video-codec@10000 {
+ compatible = "mediatek,mtk-vcodec-lat";
+ reg = <0 0x10000 0 0x800>;
+ interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
+ iommus = <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_VLD_EXT>,
+ <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_VLD2_EXT>,
+ <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_AVC_MC_EXT>,
+ <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_PRED_RD_EXT>,
+ <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_TILE_EXT>,
+ <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_WDMA_EXT>;
+ clocks = <&topckgen CLK_TOP_VDEC>,
+ <&vdecsys_soc CLK_VDEC_SOC_VDEC>,
+ <&vdecsys_soc CLK_VDEC_SOC_LAT>,
+ <&topckgen CLK_TOP_UNIVPLL_D4>;
+ clock-names = "sel", "vdec", "lat", "top";
+ assigned-clocks = <&topckgen CLK_TOP_VDEC>;
+ assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
+ power-domains = <&spm MT8195_POWER_DOMAIN_VDEC0>;
+ };
+
+ video-codec@25000 {
+ compatible = "mediatek,mtk-vcodec-core";
+ reg = <0 0x25000 0 0x1000>; /* VDEC_CORE_MISC */
+ interrupts = <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0>;
+ iommus = <&iommu_vdo M4U_PORT_L21_VDEC_MC_EXT>,
+ <&iommu_vdo M4U_PORT_L21_VDEC_UFO_EXT>,
+ <&iommu_vdo M4U_PORT_L21_VDEC_PP_EXT>,
+ <&iommu_vdo M4U_PORT_L21_VDEC_PRED_RD_EXT>,
+ <&iommu_vdo M4U_PORT_L21_VDEC_PRED_WR_EXT>,
+ <&iommu_vdo M4U_PORT_L21_VDEC_PPWRAP_EXT>,
+ <&iommu_vdo M4U_PORT_L21_VDEC_TILE_EXT>,
+ <&iommu_vdo M4U_PORT_L21_VDEC_VLD_EXT>,
+ <&iommu_vdo M4U_PORT_L21_VDEC_VLD2_EXT>,
+ <&iommu_vdo M4U_PORT_L21_VDEC_AVC_MV_EXT>;
+ clocks = <&topckgen CLK_TOP_VDEC>,
+ <&vdecsys CLK_VDEC_VDEC>,
+ <&vdecsys CLK_VDEC_LAT>,
+ <&topckgen CLK_TOP_UNIVPLL_D4>;
+ clock-names = "sel", "vdec", "lat", "top";
+ assigned-clocks = <&topckgen CLK_TOP_VDEC>;
+ assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
+ power-domains = <&spm MT8195_POWER_DOMAIN_VDEC1>;
+ };
+ };
+
larb24: larb@1800d000 {
compatible = "mediatek,mt8195-smi-larb";
reg = <0 0x1800d000 0 0x1000>;
--
2.18.0
On Fri, Mar 03, 2023 at 09:38:36AM +0800, Allen-KH Cheng wrote:
> This series is based on matthias github v6.3-tmp. Since there is a
> dependence in the following series, I resend a series for them.
>
> patchwork.kernel.org/project/linux-mediatek/list/?series=702423
> patchwork.kernel.org/project/linux-mediatek/list/?series=702078
Hi Matthias,
this series has been completely reviewed and tested for a while, and the
bindings patches were already picked up by Hans and are on their way to 6.4 [1].
So could you please pick the devicetree patches?
Thanks,
N?colas
[1] https://lore.kernel.org/all/[email protected]/
>
> Allen-KH Cheng (3):
> media: dt-bindings: media: mediatek: Rename child node names for
> decoder
> media: dt-bindings: media: mediatek: Remove "dma-ranges" property for
> decoder
> arm64: dts: mt8192: Add video-codec nodes
>
> Yunfei Dong (3):
> media: dt-bindings: media: mediatek: vcodec: adapt to the
> 'clock-names' of different platforms
> media: dt-bindings: media: mediatek: vcodec: Change the max reg value
> to 2
> arm64: dts: mt8195: Add video decoder node
>
> .../media/mediatek,vcodec-subdev-decoder.yaml | 113 +++++++-----------
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 59 +++++++++
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 70 +++++++++++
> 3 files changed, 173 insertions(+), 69 deletions(-)
>
> --
> 2.18.0
>
On Tue, Apr 4, 2023 at 6:19 AM Nícolas F. R. A. Prado
<[email protected]> wrote:
>
> On Fri, Mar 03, 2023 at 09:38:36AM +0800, Allen-KH Cheng wrote:
> > This series is based on matthias github v6.3-tmp. Since there is a
> > dependence in the following series, I resend a series for them.
> >
> > patchwork.kernel.org/project/linux-mediatek/list/?series=702423
> > patchwork.kernel.org/project/linux-mediatek/list/?series=702078
>
> Hi Matthias,
>
> this series has been completely reviewed and tested for a while, and the
> bindings patches were already picked up by Hans and are on their way to 6.4 [1].
> So could you please pick the devicetree patches?
Ping again on this series.
The device tree patches can be picked up.
> Thanks,
> Nícolas
>
> [1] https://lore.kernel.org/all/[email protected]/
>
> >
> > Allen-KH Cheng (3):
> > media: dt-bindings: media: mediatek: Rename child node names for
> > decoder
> > media: dt-bindings: media: mediatek: Remove "dma-ranges" property for
> > decoder
> > arm64: dts: mt8192: Add video-codec nodes
> >
> > Yunfei Dong (3):
> > media: dt-bindings: media: mediatek: vcodec: adapt to the
> > 'clock-names' of different platforms
> > media: dt-bindings: media: mediatek: vcodec: Change the max reg value
> > to 2
> > arm64: dts: mt8195: Add video decoder node
> >
> > .../media/mediatek,vcodec-subdev-decoder.yaml | 113 +++++++-----------
> > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 59 +++++++++
> > arch/arm64/boot/dts/mediatek/mt8195.dtsi | 70 +++++++++++
> > 3 files changed, 173 insertions(+), 69 deletions(-)
> >
> > --
> > 2.18.0
> >
On 30/05/2023 09:28, Chen-Yu Tsai wrote:
> On Tue, Apr 4, 2023 at 6:19 AM Nícolas F. R. A. Prado
> <[email protected]> wrote:
>>
>> On Fri, Mar 03, 2023 at 09:38:36AM +0800, Allen-KH Cheng wrote:
>>> This series is based on matthias github v6.3-tmp. Since there is a
>>> dependence in the following series, I resend a series for them.
>>>
>>> patchwork.kernel.org/project/linux-mediatek/list/?series=702423
>>> patchwork.kernel.org/project/linux-mediatek/list/?series=702078
>>
>> Hi Matthias,
>>
>> this series has been completely reviewed and tested for a while, and the
>> bindings patches were already picked up by Hans and are on their way to 6.4 [1].
>> So could you please pick the devicetree patches?
>
> Ping again on this series.
>
> The device tree patches can be picked up.
>
Nicolas, Chen, thanks for the ping. It's unfortunate that there are no email
send by the maintainer to the mailinglist to confirm that the patches got
accepted. So it's very helpful if you help me on that.
Patches are applied now.
Regards,
Matthias