The NanoPi R1 is a complete open source board developed
by FriendlyElec for makers, hobbyists, fans and etc.
NanoPi R1 key features
- Allwinner H3, Quad-core [email protected]
- 512MB/1GB DDR3 RAM
- 8GB eMMC
- microSD slot
- 10/100/1000M Ethernet x 1
- 10/100 Ethernet x 1
- Wifi 802.11b/g/n
- Bluetooth 4.0
- Serial Debug Port
- 5V 2A DC power-supply
Signed-off-by: Yu-Tung Chang <[email protected]>
---
.../devicetree/bindings/arm/sunxi.yaml | 5 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts | 169 ++++++++++++++++++
3 files changed, 175 insertions(+)
create mode 100644 arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
index 0f23133672a3..54a1aaee7e22 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -251,6 +251,11 @@ properties:
- const: friendlyarm,nanopi-neo-plus2
- const: allwinner,sun50i-h5
+ - description: FriendlyARM NanoPi R1
+ items:
+ - const: friendlyarm,nanopi-r1
+ - const: allwinner,sun8i-h3
+
- description: FriendlyARM ZeroPi
items:
- const: friendlyarm,zeropi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4f0adfead547..aabaf67f86ed 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1192,6 +1192,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h3-nanopi-m1-plus.dtb \
sun8i-h3-nanopi-neo.dtb \
sun8i-h3-nanopi-neo-air.dtb \
+ sun8i-h3-nanopi-r1.dtb \
sun8i-h3-orangepi-2.dtb \
sun8i-h3-orangepi-lite.dtb \
sun8i-h3-orangepi-one.dtb \
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
new file mode 100644
index 000000000000..204a39f93f4e
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Igor Pecovnik <[email protected]>
+ * Copyright (C) 2020 Jayantajit Gogoi <[email protected]>
+ * Copyright (C) 2020 Yu-Tung Chang <[email protected]>
+*/
+
+#include "sun8i-h3-nanopi.dtsi"
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "FriendlyARM NanoPi R1";
+ compatible = "friendlyarm,nanopi-r1", "allwinner,sun8i-h3";
+
+ aliases {
+ serial1 = &uart1;
+ ethernet0 = &emac;
+ ethernet1 = &wifi;
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
+ };
+
+ reg_vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>;
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ clocks = <&rtc 1>;
+ clock-names = "ext_clock";
+ };
+
+ leds {
+ led-2 {
+ function = LED_FUNCTION_WAN;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
+ };
+
+ led-3 {
+ function = LED_FUNCTION_LAN;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>; /* PA9 */
+ };
+ };
+};
+
+&cpu0 {
+ cpu-supply = <®_vdd_cpux>;
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ wifi: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+®_usb0_vbus {
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>, <&uart3_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = <&rtc 1>;
+ clock-names = "lpo";
+ vbat-supply = <®_vcc3v3>;
+ vddio-supply = <®_vcc3v3>;
+ device-wakeup-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
+ host-wakeup-gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
+ shutdown-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
+ };
+};
+
+&usb_otg {
+ status = "okay";
+ dr_mode = "otg";
+};
+
+&usbphy {
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <®_usb0_vbus>;
+ status = "okay";
+};
--
2.29.0
Hi!
On Mon, Nov 02, 2020 at 06:01:57PM +0800, Yu-Tung Chang wrote:
> The NanoPi R1 is a complete open source board developed
> by FriendlyElec for makers, hobbyists, fans and etc.
>
> NanoPi R1 key features
> - Allwinner H3, Quad-core [email protected]
> - 512MB/1GB DDR3 RAM
> - 8GB eMMC
> - microSD slot
> - 10/100/1000M Ethernet x 1
> - 10/100 Ethernet x 1
> - Wifi 802.11b/g/n
> - Bluetooth 4.0
> - Serial Debug Port
> - 5V 2A DC power-supply
>
> Signed-off-by: Yu-Tung Chang <[email protected]>
> ---
> .../devicetree/bindings/arm/sunxi.yaml | 5 +
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts | 169 ++++++++++++++++++
> 3 files changed, 175 insertions(+)
> create mode 100644 arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
>
> diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
> index 0f23133672a3..54a1aaee7e22 100644
> --- a/Documentation/devicetree/bindings/arm/sunxi.yaml
> +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
> @@ -251,6 +251,11 @@ properties:
> - const: friendlyarm,nanopi-neo-plus2
> - const: allwinner,sun50i-h5
>
> + - description: FriendlyARM NanoPi R1
> + items:
> + - const: friendlyarm,nanopi-r1
> + - const: allwinner,sun8i-h3
> +
> - description: FriendlyARM ZeroPi
> items:
> - const: friendlyarm,zeropi
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 4f0adfead547..aabaf67f86ed 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1192,6 +1192,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
> sun8i-h3-nanopi-m1-plus.dtb \
> sun8i-h3-nanopi-neo.dtb \
> sun8i-h3-nanopi-neo-air.dtb \
> + sun8i-h3-nanopi-r1.dtb \
> sun8i-h3-orangepi-2.dtb \
> sun8i-h3-orangepi-lite.dtb \
> sun8i-h3-orangepi-one.dtb \
> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> new file mode 100644
> index 000000000000..204a39f93f4e
> --- /dev/null
> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> @@ -0,0 +1,169 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2019 Igor Pecovnik <[email protected]>
> + * Copyright (C) 2020 Jayantajit Gogoi <[email protected]>
> + * Copyright (C) 2020 Yu-Tung Chang <[email protected]>
> +*/
> +
> +#include "sun8i-h3-nanopi.dtsi"
> +#include <dt-bindings/leds/common.h>
> +
> +/ {
> + model = "FriendlyARM NanoPi R1";
> + compatible = "friendlyarm,nanopi-r1", "allwinner,sun8i-h3";
> +
> + aliases {
> + serial1 = &uart1;
> + ethernet0 = &emac;
> + ethernet1 = &wifi;
> + };
> +
> + reg_gmac_3v3: gmac-3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "gmac-3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + startup-delay-us = <100000>;
> + enable-active-high;
> + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
> + };
> +
> + reg_vdd_cpux: gpio-regulator {
> + compatible = "regulator-gpio";
> + regulator-name = "vdd-cpux";
> + regulator-type = "voltage";
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-ramp-delay = <50>;
> + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
> + gpios-states = <0x1>;
> + states = <1100000 0x0
> + 1300000 0x1>;
> + };
> +
> + wifi_pwrseq: wifi_pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
> + clocks = <&rtc 1>;
> + clock-names = "ext_clock";
> + };
> +
> + leds {
> + led-2 {
> + function = LED_FUNCTION_WAN;
> + color = <LED_COLOR_ID_GREEN>;
> + gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
> + };
> +
> + led-3 {
> + function = LED_FUNCTION_LAN;
> + color = <LED_COLOR_ID_GREEN>;
> + gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>; /* PA9 */
> + };
> + };
> +};
> +
> +&cpu0 {
> + cpu-supply = <®_vdd_cpux>;
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +&ehci2 {
> + status = "okay";
> +};
> +
> +&emac {
> + pinctrl-names = "default";
> + pinctrl-0 = <&emac_rgmii_pins>;
> + phy-supply = <®_gmac_3v3>;
> + phy-handle = <&ext_rgmii_phy>;
> + phy-mode = "rgmii-id";
> + status = "okay";
> +};
> +
> +&external_mdio {
> + ext_rgmii_phy: ethernet-phy@7 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <7>;
> + };
> +};
> +
> +&mmc1 {
> + vmmc-supply = <®_vcc3v3>;
> + vqmmc-supply = <®_vcc3v3>;
> + mmc-pwrseq = <&wifi_pwrseq>;
> + bus-width = <4>;
> + non-removable;
> + status = "okay";
> +
> + wifi: wifi@1 {
> + reg = <1>;
> + compatible = "brcm,bcm4329-fmac";
> + interrupt-parent = <&pio>;
> + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
> + interrupt-names = "host-wake";
> + };
> +};
> +
> +&mmc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc2_8bit_pins>;
> + vmmc-supply = <®_vcc3v3>;
> + vqmmc-supply = <®_vcc3v3>;
> + bus-width = <8>;
> + non-removable;
> + status = "okay";
> +};
> +
> +&ohci1 {
> + status = "okay";
> +};
> +
> +&ohci2 {
> + status = "okay";
> +};
> +
> +®_usb0_vbus {
> + gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart1_pins>;
This should be already set in the DTSI
> + status = "okay";
> +};
What is this UART used for?
Thanks!
Maxime
Maxime Ripard <[email protected]> 于2020年11月3日周二 下午7:37写道：
>
> Hi!
>
> On Mon, Nov 02, 2020 at 06:01:57PM +0800, Yu-Tung Chang wrote:
> > The NanoPi R1 is a complete open source board developed
> > by FriendlyElec for makers, hobbyists, fans and etc.
> >
> > NanoPi R1 key features
> > - Allwinner H3, Quad-core [email protected]
> > - 512MB/1GB DDR3 RAM
> > - 8GB eMMC
> > - microSD slot
> > - 10/100/1000M Ethernet x 1
> > - 10/100 Ethernet x 1
> > - Wifi 802.11b/g/n
> > - Bluetooth 4.0
> > - Serial Debug Port
> > - 5V 2A DC power-supply
> >
> > Signed-off-by: Yu-Tung Chang <[email protected]>
> > ---
> > .../devicetree/bindings/arm/sunxi.yaml | 5 +
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts | 169 ++++++++++++++++++
> > 3 files changed, 175 insertions(+)
> > create mode 100644 arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> >
> > diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
> > index 0f23133672a3..54a1aaee7e22 100644
> > --- a/Documentation/devicetree/bindings/arm/sunxi.yaml
> > +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
> > @@ -251,6 +251,11 @@ properties:
> > - const: friendlyarm,nanopi-neo-plus2
> > - const: allwinner,sun50i-h5
> >
> > + - description: FriendlyARM NanoPi R1
> > + items:
> > + - const: friendlyarm,nanopi-r1
> > + - const: allwinner,sun8i-h3
> > +
> > - description: FriendlyARM ZeroPi
> > items:
> > - const: friendlyarm,zeropi
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 4f0adfead547..aabaf67f86ed 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -1192,6 +1192,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
> > sun8i-h3-nanopi-m1-plus.dtb \
> > sun8i-h3-nanopi-neo.dtb \
> > sun8i-h3-nanopi-neo-air.dtb \
> > + sun8i-h3-nanopi-r1.dtb \
> > sun8i-h3-orangepi-2.dtb \
> > sun8i-h3-orangepi-lite.dtb \
> > sun8i-h3-orangepi-one.dtb \
> > diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> > new file mode 100644
> > index 000000000000..204a39f93f4e
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> > @@ -0,0 +1,169 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (C) 2019 Igor Pecovnik <[email protected]>
> > + * Copyright (C) 2020 Jayantajit Gogoi <[email protected]>
> > + * Copyright (C) 2020 Yu-Tung Chang <[email protected]>
> > +*/
> > +
> > +#include "sun8i-h3-nanopi.dtsi"
> > +#include <dt-bindings/leds/common.h>
> > +
> > +/ {
> > + model = "FriendlyARM NanoPi R1";
> > + compatible = "friendlyarm,nanopi-r1", "allwinner,sun8i-h3";
> > +
> > + aliases {
> > + serial1 = &uart1;
> > + ethernet0 = &emac;
> > + ethernet1 = &wifi;
> > + };
> > +
> > + reg_gmac_3v3: gmac-3v3 {
> > + compatible = "regulator-fixed";
> > + regulator-name = "gmac-3v3";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + startup-delay-us = <100000>;
> > + enable-active-high;
> > + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
> > + };
> > +
> > + reg_vdd_cpux: gpio-regulator {
> > + compatible = "regulator-gpio";
> > + regulator-name = "vdd-cpux";
> > + regulator-type = "voltage";
> > + regulator-boot-on;
> > + regulator-always-on;
> > + regulator-min-microvolt = <1100000>;
> > + regulator-max-microvolt = <1300000>;
> > + regulator-ramp-delay = <50>;
> > + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
> > + gpios-states = <0x1>;
> > + states = <1100000 0x0
> > + 1300000 0x1>;
> > + };
> > +
> > + wifi_pwrseq: wifi_pwrseq {
> > + compatible = "mmc-pwrseq-simple";
> > + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
> > + clocks = <&rtc 1>;
> > + clock-names = "ext_clock";
> > + };
> > +
> > + leds {
> > + led-2 {
> > + function = LED_FUNCTION_WAN;
> > + color = <LED_COLOR_ID_GREEN>;
> > + gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
> > + };
> > +
> > + led-3 {
> > + function = LED_FUNCTION_LAN;
> > + color = <LED_COLOR_ID_GREEN>;
> > + gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>; /* PA9 */
> > + };
> > + };
> > +};
> > +
> > +&cpu0 {
> > + cpu-supply = <®_vdd_cpux>;
> > +};
> > +
> > +&ehci1 {
> > + status = "okay";
> > +};
> > +
> > +&ehci2 {
> > + status = "okay";
> > +};
> > +
> > +&emac {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&emac_rgmii_pins>;
> > + phy-supply = <®_gmac_3v3>;
> > + phy-handle = <&ext_rgmii_phy>;
> > + phy-mode = "rgmii-id";
> > + status = "okay";
> > +};
> > +
> > +&external_mdio {
> > + ext_rgmii_phy: ethernet-phy@7 {
> > + compatible = "ethernet-phy-ieee802.3-c22";
> > + reg = <7>;
> > + };
> > +};
> > +
> > +&mmc1 {
> > + vmmc-supply = <®_vcc3v3>;
> > + vqmmc-supply = <®_vcc3v3>;
> > + mmc-pwrseq = <&wifi_pwrseq>;
> > + bus-width = <4>;
> > + non-removable;
> > + status = "okay";
> > +
> > + wifi: wifi@1 {
> > + reg = <1>;
> > + compatible = "brcm,bcm4329-fmac";
> > + interrupt-parent = <&pio>;
> > + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
> > + interrupt-names = "host-wake";
> > + };
> > +};
> > +
> > +&mmc2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&mmc2_8bit_pins>;
> > + vmmc-supply = <®_vcc3v3>;
> > + vqmmc-supply = <®_vcc3v3>;
> > + bus-width = <8>;
> > + non-removable;
> > + status = "okay";
> > +};
> > +
> > +&ohci1 {
> > + status = "okay";
> > +};
> > +
> > +&ohci2 {
> > + status = "okay";
> > +};
> > +
> > +®_usb0_vbus {
> > + gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
> > + status = "okay";
> > +};
> > +
> > +&uart1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&uart1_pins>;
>
> This should be already set in the DTSI
>
uart0 as the debugging interface, uart1 as the external uart port,
uart3 as the bluetooth.
> > + status = "okay";
> > +};
>
> What is this UART used for?
>
uart1 as the external uart port, use a separate physical interface.
> Thanks!
> Maxime
Maxime Ripard <[email protected]> 于2020年11月3日周二 下午7:37写道：
>
> Hi!
>
> On Mon, Nov 02, 2020 at 06:01:57PM +0800, Yu-Tung Chang wrote:
> > The NanoPi R1 is a complete open source board developed
> > by FriendlyElec for makers, hobbyists, fans and etc.
> >
> > NanoPi R1 key features
> > - Allwinner H3, Quad-core [email protected]
> > - 512MB/1GB DDR3 RAM
> > - 8GB eMMC
> > - microSD slot
> > - 10/100/1000M Ethernet x 1
> > - 10/100 Ethernet x 1
> > - Wifi 802.11b/g/n
> > - Bluetooth 4.0
> > - Serial Debug Port
> > - 5V 2A DC power-supply
> >
> > Signed-off-by: Yu-Tung Chang <[email protected]>
> > ---
> > .../devicetree/bindings/arm/sunxi.yaml | 5 +
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts | 169 ++++++++++++++++++
> > 3 files changed, 175 insertions(+)
> > create mode 100644 arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> >
> > diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
> > index 0f23133672a3..54a1aaee7e22 100644
> > --- a/Documentation/devicetree/bindings/arm/sunxi.yaml
> > +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
> > @@ -251,6 +251,11 @@ properties:
> > - const: friendlyarm,nanopi-neo-plus2
> > - const: allwinner,sun50i-h5
> >
> > + - description: FriendlyARM NanoPi R1
> > + items:
> > + - const: friendlyarm,nanopi-r1
> > + - const: allwinner,sun8i-h3
> > +
> > - description: FriendlyARM ZeroPi
> > items:
> > - const: friendlyarm,zeropi
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 4f0adfead547..aabaf67f86ed 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -1192,6 +1192,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
> > sun8i-h3-nanopi-m1-plus.dtb \
> > sun8i-h3-nanopi-neo.dtb \
> > sun8i-h3-nanopi-neo-air.dtb \
> > + sun8i-h3-nanopi-r1.dtb \
> > sun8i-h3-orangepi-2.dtb \
> > sun8i-h3-orangepi-lite.dtb \
> > sun8i-h3-orangepi-one.dtb \
> > diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> > new file mode 100644
> > index 000000000000..204a39f93f4e
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> > @@ -0,0 +1,169 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (C) 2019 Igor Pecovnik <[email protected]>
> > + * Copyright (C) 2020 Jayantajit Gogoi <[email protected]>
> > + * Copyright (C) 2020 Yu-Tung Chang <[email protected]>
> > +*/
> > +
> > +#include "sun8i-h3-nanopi.dtsi"
> > +#include <dt-bindings/leds/common.h>
> > +
> > +/ {
> > + model = "FriendlyARM NanoPi R1";
> > + compatible = "friendlyarm,nanopi-r1", "allwinner,sun8i-h3";
> > +
> > + aliases {
> > + serial1 = &uart1;
> > + ethernet0 = &emac;
> > + ethernet1 = &wifi;
> > + };
> > +
> > + reg_gmac_3v3: gmac-3v3 {
> > + compatible = "regulator-fixed";
> > + regulator-name = "gmac-3v3";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + startup-delay-us = <100000>;
> > + enable-active-high;
> > + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
> > + };
> > +
> > + reg_vdd_cpux: gpio-regulator {
> > + compatible = "regulator-gpio";
> > + regulator-name = "vdd-cpux";
> > + regulator-type = "voltage";
> > + regulator-boot-on;
> > + regulator-always-on;
> > + regulator-min-microvolt = <1100000>;
> > + regulator-max-microvolt = <1300000>;
> > + regulator-ramp-delay = <50>;
> > + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
> > + gpios-states = <0x1>;
> > + states = <1100000 0x0
> > + 1300000 0x1>;
> > + };
> > +
> > + wifi_pwrseq: wifi_pwrseq {
> > + compatible = "mmc-pwrseq-simple";
> > + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
> > + clocks = <&rtc 1>;
> > + clock-names = "ext_clock";
> > + };
> > +
> > + leds {
> > + led-2 {
> > + function = LED_FUNCTION_WAN;
> > + color = <LED_COLOR_ID_GREEN>;
> > + gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
> > + };
> > +
> > + led-3 {
> > + function = LED_FUNCTION_LAN;
> > + color = <LED_COLOR_ID_GREEN>;
> > + gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>; /* PA9 */
> > + };
> > + };
> > +};
> > +
> > +&cpu0 {
> > + cpu-supply = <®_vdd_cpux>;
> > +};
> > +
> > +&ehci1 {
> > + status = "okay";
> > +};
> > +
> > +&ehci2 {
> > + status = "okay";
> > +};
> > +
> > +&emac {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&emac_rgmii_pins>;
> > + phy-supply = <®_gmac_3v3>;
> > + phy-handle = <&ext_rgmii_phy>;
> > + phy-mode = "rgmii-id";
> > + status = "okay";
> > +};
> > +
> > +&external_mdio {
> > + ext_rgmii_phy: ethernet-phy@7 {
> > + compatible = "ethernet-phy-ieee802.3-c22";
> > + reg = <7>;
> > + };
> > +};
> > +
> > +&mmc1 {
> > + vmmc-supply = <®_vcc3v3>;
> > + vqmmc-supply = <®_vcc3v3>;
> > + mmc-pwrseq = <&wifi_pwrseq>;
> > + bus-width = <4>;
> > + non-removable;
> > + status = "okay";
> > +
> > + wifi: wifi@1 {
> > + reg = <1>;
> > + compatible = "brcm,bcm4329-fmac";
> > + interrupt-parent = <&pio>;
> > + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
> > + interrupt-names = "host-wake";
> > + };
> > +};
> > +
> > +&mmc2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&mmc2_8bit_pins>;
> > + vmmc-supply = <®_vcc3v3>;
> > + vqmmc-supply = <®_vcc3v3>;
> > + bus-width = <8>;
> > + non-removable;
> > + status = "okay";
> > +};
> > +
> > +&ohci1 {
> > + status = "okay";
> > +};
> > +
> > +&ohci2 {
> > + status = "okay";
> > +};
> > +
> > +®_usb0_vbus {
> > + gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
> > + status = "okay";
> > +};
> > +
> > +&uart1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&uart1_pins>;
>
> This should be already set in the DTSI
>
> > + status = "okay";
> > +};
>
> What is this UART used for?
>
> Thanks!
> Maxime
On Wed, Nov 04, 2020 at 04:07:48PM +0800, Yu-Tung Chang wrote:
> > > +&uart1 {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&uart1_pins>;
> >
> > This should be already set in the DTSI
> >
> uart0 as the debugging interface, uart1 as the external uart port,
> uart3 as the bluetooth.
What I mean is that since it's the only muxing option, the pinctrl
properties should already be set in the DTSI, so it's redundant to put
them in the DTS.
Maxime
Maxime Ripard <[email protected]> 于2020年11月6日周五 上午1:10写道：
>
> On Wed, Nov 04, 2020 at 04:07:48PM +0800, Yu-Tung Chang wrote:
> > > > +&uart1 {
> > > > + pinctrl-names = "default";
> > > > + pinctrl-0 = <&uart1_pins>;
> > >
> > > This should be already set in the DTSI
> > >
> > uart0 as the debugging interface, uart1 as the external uart port,
> > uart3 as the bluetooth.
>
> What I mean is that since it's the only muxing option, the pinctrl
> properties should already be set in the DTSI, so it's redundant to put
> them in the DTS.
>
I can only see the definition of uart0 in the DTSI,
because uart1 as the extension interface is exclusive to NanoPi R1.
> Maxime
On Fri, Nov 6, 2020 at 10:03 AM Yu-Tung Chang <[email protected]> wrote:
>
> Maxime Ripard <[email protected]> 于2020年11月6日周五 上午1:10写道：
> >
> > On Wed, Nov 04, 2020 at 04:07:48PM +0800, Yu-Tung Chang wrote:
> > > > > +&uart1 {
> > > > > + pinctrl-names = "default";
> > > > > + pinctrl-0 = <&uart1_pins>;
> > > >
> > > > This should be already set in the DTSI
> > > >
> > > uart0 as the debugging interface, uart1 as the external uart port,
> > > uart3 as the bluetooth.
> >
> > What I mean is that since it's the only muxing option, the pinctrl
> > properties should already be set in the DTSI, so it's redundant to put
> > them in the DTS.
> >
> I can only see the definition of uart0 in the DTSI,
> because uart1 as the extension interface is exclusive to NanoPi R1.
Maxime, to clarify, UART1 can be used with or without RTS/CTS,
so there is no default muxing in the DTSI.
ChenYu
On Fri, Nov 06, 2020 at 10:10:10AM +0800, Chen-Yu Tsai wrote:
> On Fri, Nov 6, 2020 at 10:03 AM Yu-Tung Chang <[email protected]> wrote:
> >
> > Maxime Ripard <[email protected]> 于2020年11月6日周五 上午1:10写道：
> > >
> > > On Wed, Nov 04, 2020 at 04:07:48PM +0800, Yu-Tung Chang wrote:
> > > > > > +&uart1 {
> > > > > > + pinctrl-names = "default";
> > > > > > + pinctrl-0 = <&uart1_pins>;
> > > > >
> > > > > This should be already set in the DTSI
> > > > >
> > > > uart0 as the debugging interface, uart1 as the external uart port,
> > > > uart3 as the bluetooth.
> > >
> > > What I mean is that since it's the only muxing option, the pinctrl
> > > properties should already be set in the DTSI, so it's redundant to put
> > > them in the DTS.
> > >
> > I can only see the definition of uart0 in the DTSI,
> > because uart1 as the extension interface is exclusive to NanoPi R1.
>
> Maxime, to clarify, UART1 can be used with or without RTS/CTS,
> so there is no default muxing in the DTSI.
Ah, right. I've applied the patch, thanks!
Maxime