This patchset primarily adds more PL330 and PL022 DT nodes for
NS2 SVK. It also moves clock DT nodes to separate file to be
consistent with other Broadcom SoCs DT files.
The patchset is based on v4.6-rc1 tag and is available in ns2_dt3_v1
branch of https://github.com/Broadcom/arm64-linux.git
All patches have been tested on Broadcom NS2 SVK.
Anup Patel (4):
arm64: dts: Add ARM PL330 DMA DT node for NS2
arm64: dts: Add maintenance interrupt for GIC in NS2 DT
arm64: dts: Move NS2 clock DT nodes to separate DT file
arm64: dts: Add ARM PL022 SPI DT nodes for NS2
arch/arm64/boot/dts/broadcom/ns2-clock.dtsi | 105 +++++++++++++++++++++++
arch/arm64/boot/dts/broadcom/ns2-svk.dts | 45 ++++++++++
arch/arm64/boot/dts/broadcom/ns2.dtsi | 124 +++++++++++-----------------
3 files changed, 196 insertions(+), 78 deletions(-)
create mode 100644 arch/arm64/boot/dts/broadcom/ns2-clock.dtsi
--
1.9.1
We have one ARM PL330 DMA instance with 8 channels in
NS2 SoC. Let's enable it for NS2 in NS2 DT.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Pramod KUMAR <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index 6f81c9d..a9f4585 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -217,6 +217,25 @@
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
+ dma0: dma@61360000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x61360000 0x1000>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ clocks = <&iprocslow>;
+ clock-names = "apb_pclk";
+ };
+
smmu: mmu@64000000 {
compatible = "arm,mmu-500";
reg = <0x64000000 0x40000>;
--
1.9.1
For more readabilty and consistency with other Broadcom SoCs, we move
all NS2 clock DT nodes from main SoC DT file to a separate DT file.
We also update the license header in ns2.dtsi as-per new Broadcom
convention.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
---
arch/arm64/boot/dts/broadcom/ns2-clock.dtsi | 105 ++++++++++++++++++++++++++++
arch/arm64/boot/dts/broadcom/ns2.dtsi | 81 +--------------------
2 files changed, 108 insertions(+), 78 deletions(-)
create mode 100644 arch/arm64/boot/dts/broadcom/ns2-clock.dtsi
diff --git a/arch/arm64/boot/dts/broadcom/ns2-clock.dtsi b/arch/arm64/boot/dts/broadcom/ns2-clock.dtsi
new file mode 100644
index 0000000..99009fd
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/ns2-clock.dtsi
@@ -0,0 +1,105 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright (c) 2016 Broadcom. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Broadcom Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <dt-bindings/clock/bcm-ns2.h>
+
+ osc: oscillator {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <25000000>;
+ };
+
+ lcpll_ddr: lcpll_ddr@6501d058 {
+ #clock-cells = <1>;
+ compatible = "brcm,ns2-lcpll-ddr";
+ reg = <0x6501d058 0x20>,
+ <0x6501c020 0x4>,
+ <0x6501d04c 0x4>;
+ clocks = <&osc>;
+ clock-output-names = "lcpll_ddr", "pcie_sata_usb",
+ "ddr", "ddr_ch2_unused",
+ "ddr_ch3_unused", "ddr_ch4_unused",
+ "ddr_ch5_unused";
+ };
+
+ lcpll_ports: lcpll_ports@6501d078 {
+ #clock-cells = <1>;
+ compatible = "brcm,ns2-lcpll-ports";
+ reg = <0x6501d078 0x20>,
+ <0x6501c020 0x4>,
+ <0x6501d054 0x4>;
+ clocks = <&osc>;
+ clock-output-names = "lcpll_ports", "wan", "rgmii",
+ "ports_ch2_unused",
+ "ports_ch3_unused",
+ "ports_ch4_unused",
+ "ports_ch5_unused";
+ };
+
+ genpll_scr: genpll_scr@6501d098 {
+ #clock-cells = <1>;
+ compatible = "brcm,ns2-genpll-scr";
+ reg = <0x6501d098 0x32>,
+ <0x6501c020 0x4>,
+ <0x6501d044 0x4>;
+ clocks = <&osc>;
+ clock-output-names = "genpll_scr", "scr", "fs",
+ "audio_ref", "scr_ch3_unused",
+ "scr_ch4_unused", "scr_ch5_unused";
+ };
+
+ iprocmed: iprocmed {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
+ clock-div = <2>;
+ clock-mult = <1>;
+ };
+
+ iprocslow: iprocslow {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+
+ genpll_sw: genpll_sw@6501d0c4 {
+ #clock-cells = <1>;
+ compatible = "brcm,ns2-genpll-sw";
+ reg = <0x6501d0c4 0x32>,
+ <0x6501c020 0x4>,
+ <0x6501d044 0x4>;
+ clocks = <&osc>;
+ clock-output-names = "genpll_sw", "rpe", "250", "nic",
+ "chimp", "port", "sdio";
+ };
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index 940ed52..0a92a68 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -1,7 +1,7 @@
/*
* BSD LICENSE
*
- * Copyright(c) 2015 Broadcom Corporation. All rights reserved.
+ * Copyright (c) 2015 Broadcom. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -110,33 +110,6 @@
<&A57_3>;
};
- clocks {
- #address-cells = <1>;
- #size-cells = <1>;
-
- osc: oscillator {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <25000000>;
- };
-
- iprocmed: iprocmed {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
- clock-div = <2>;
- clock-mult = <1>;
- };
-
- iprocslow: iprocslow {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
- clock-div = <4>;
- clock-mult = <1>;
- };
- };
-
pcie0: pcie@20020000 {
compatible = "brcm,iproc-pcie";
reg = <0 0x20020000 0 0x1000>;
@@ -217,6 +190,8 @@
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
+ #include "ns2-clock.dtsi"
+
dma0: dma@61360000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x61360000 0x1000>;
@@ -277,56 +252,6 @@
mmu-masters;
};
- lcpll_ddr: lcpll_ddr@6501d058 {
- #clock-cells = <1>;
- compatible = "brcm,ns2-lcpll-ddr";
- reg = <0x6501d058 0x20>,
- <0x6501c020 0x4>,
- <0x6501d04c 0x4>;
- clocks = <&osc>;
- clock-output-names = "lcpll_ddr", "pcie_sata_usb",
- "ddr", "ddr_ch2_unused",
- "ddr_ch3_unused", "ddr_ch4_unused",
- "ddr_ch5_unused";
- };
-
- lcpll_ports: lcpll_ports@6501d078 {
- #clock-cells = <1>;
- compatible = "brcm,ns2-lcpll-ports";
- reg = <0x6501d078 0x20>,
- <0x6501c020 0x4>,
- <0x6501d054 0x4>;
- clocks = <&osc>;
- clock-output-names = "lcpll_ports", "wan", "rgmii",
- "ports_ch2_unused",
- "ports_ch3_unused",
- "ports_ch4_unused",
- "ports_ch5_unused";
- };
-
- genpll_scr: genpll_scr@6501d098 {
- #clock-cells = <1>;
- compatible = "brcm,ns2-genpll-scr";
- reg = <0x6501d098 0x32>,
- <0x6501c020 0x4>,
- <0x6501d044 0x4>;
- clocks = <&osc>;
- clock-output-names = "genpll_scr", "scr", "fs",
- "audio_ref", "scr_ch3_unused",
- "scr_ch4_unused", "scr_ch5_unused";
- };
-
- genpll_sw: genpll_sw@6501d0c4 {
- #clock-cells = <1>;
- compatible = "brcm,ns2-genpll-sw";
- reg = <0x6501d0c4 0x32>,
- <0x6501c020 0x4>,
- <0x6501d044 0x4>;
- clocks = <&osc>;
- clock-output-names = "genpll_sw", "rpe", "250", "nic",
- "chimp", "port", "sdio";
- };
-
crmu: crmu@65024000 {
compatible = "syscon";
reg = <0x65024000 0x100>;
--
1.9.1
We have two ARM PL022 SPI instances in NS2 SoC. On NS2 SVK,
one of the ARM PL022 SPI host has Silabs si3226x slic connected
to chip-select #0 whereas second ARM PL022 SPI host has Atmel
AT25 EEPROM connected to chip-select #0.
This patch adds ARM PL022, Silabs si3226x, and Atmel AT25
DT nodes in NS2 DT and NS2 SVK DT respectively.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
---
arch/arm64/boot/dts/broadcom/ns2-svk.dts | 45 ++++++++++++++++++++++++++++++++
arch/arm64/boot/dts/broadcom/ns2.dtsi | 22 ++++++++++++++++
2 files changed, 67 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
index ce0ab84..54ca40c 100644
--- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
+++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
@@ -72,6 +72,51 @@
status = "ok";
};
+&ssp0 {
+ status = "ok";
+
+ slic@0 {
+ compatible = "silabs,si3226x";
+ reg = <0>;
+ spi-max-frequency = <5000000>;
+ spi-cpha = <1>;
+ spi-cpol = <1>;
+ pl022,hierarchy = <0>;
+ pl022,interface = <0>;
+ pl022,slave-tx-disable = <0>;
+ pl022,com-mode = <0>;
+ pl022,rx-level-trig = <1>;
+ pl022,tx-level-trig = <1>;
+ pl022,ctrl-len = <11>;
+ pl022,wait-state = <0>;
+ pl022,duplex = <0>;
+ };
+};
+
+&ssp1 {
+ status = "ok";
+
+ at25@0 {
+ compatible = "atmel,at25";
+ reg = <0>;
+ spi-max-frequency = <5000000>;
+ at25,byte-len = <0x8000>;
+ at25,addr-mode = <2>;
+ at25,page-size = <64>;
+ spi-cpha = <1>;
+ spi-cpol = <1>;
+ pl022,hierarchy = <0>;
+ pl022,interface = <0>;
+ pl022,slave-tx-disable = <0>;
+ pl022,com-mode = <0>;
+ pl022,rx-level-trig = <1>;
+ pl022,tx-level-trig = <1>;
+ pl022,ctrl-len = <11>;
+ pl022,wait-state = <0>;
+ pl022,duplex = <0>;
+ };
+};
+
&sdio0 {
status = "ok";
};
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index 0a92a68..123cd9c 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -354,6 +354,28 @@
status = "disabled";
};
+ ssp0: ssp@66180000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x66180000 0x1000>;
+ interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&iprocslow>, <&iprocslow>;
+ clock-names = "spiclk", "apb_pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ ssp1: ssp@66190000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x66190000 0x1000>;
+ interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&iprocslow>, <&iprocslow>;
+ clock-names = "spiclk", "apb_pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
hwrng: hwrng@66220000 {
compatible = "brcm,iproc-rng200";
reg = <0x66220000 0x28>;
--
1.9.1
The KVM ARM64 requires GIC maintenance interrupt for VGIC emulation
so this patch adds the missing "interrupts" attribute to GIC node in
NS2 DT.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index a9f4585..940ed52 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -347,6 +347,8 @@
<0x65220000 0x1000>,
<0x65240000 0x2000>,
<0x65260000 0x1000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
+ IRQ_TYPE_LEVEL_HIGH)>;
};
timer0: timer@66030000 {
--
1.9.1
On 29 March 2016 at 00:27, Anup Patel <[email protected]> wrote:
> For more readabilty and consistency with other Broadcom SoCs, we move
> all NS2 clock DT nodes from main SoC DT file to a separate DT file.
>
> We also update the license header in ns2.dtsi as-per new Broadcom
> convention.
>
> Signed-off-by: Anup Patel <[email protected]>
> Reviewed-by: Ray Jui <[email protected]>
> Reviewed-by: Scott Branden <[email protected]>
> ---
> arch/arm64/boot/dts/broadcom/ns2-clock.dtsi | 105 ++++++++++++++++++++++++++++
> arch/arm64/boot/dts/broadcom/ns2.dtsi | 81 +--------------------
> 2 files changed, 108 insertions(+), 78 deletions(-)
> create mode 100644 arch/arm64/boot/dts/broadcom/ns2-clock.dtsi
>
> diff --git a/arch/arm64/boot/dts/broadcom/ns2-clock.dtsi b/arch/arm64/boot/dts/broadcom/ns2-clock.dtsi
> new file mode 100644
> index 0000000..99009fd
> --- /dev/null
> +++ b/arch/arm64/boot/dts/broadcom/ns2-clock.dtsi
> @@ -0,0 +1,105 @@
> +/*
> + * BSD LICENSE
> + *
> + * Copyright (c) 2016 Broadcom. All rights reserved.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + *
> + * * Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * * Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in
> + * the documentation and/or other materials provided with the
> + * distribution.
> + * * Neither the name of Broadcom Corporation nor the names of its
> + * contributors may be used to endorse or promote products derived
> + * from this software without specific prior written permission.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
> + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
> + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
> + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
> + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
> + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
> + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#include <dt-bindings/clock/bcm-ns2.h>
> +
> + osc: oscillator {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <25000000>;
> + };
> +
> + lcpll_ddr: lcpll_ddr@6501d058 {
> + #clock-cells = <1>;
> + compatible = "brcm,ns2-lcpll-ddr";
> + reg = <0x6501d058 0x20>,
> + <0x6501c020 0x4>,
> + <0x6501d04c 0x4>;
> + clocks = <&osc>;
> + clock-output-names = "lcpll_ddr", "pcie_sata_usb",
> + "ddr", "ddr_ch2_unused",
> + "ddr_ch3_unused", "ddr_ch4_unused",
> + "ddr_ch5_unused";
> + };
> +
> + lcpll_ports: lcpll_ports@6501d078 {
> + #clock-cells = <1>;
> + compatible = "brcm,ns2-lcpll-ports";
> + reg = <0x6501d078 0x20>,
> + <0x6501c020 0x4>,
> + <0x6501d054 0x4>;
> + clocks = <&osc>;
> + clock-output-names = "lcpll_ports", "wan", "rgmii",
> + "ports_ch2_unused",
> + "ports_ch3_unused",
> + "ports_ch4_unused",
> + "ports_ch5_unused";
> + };
> +
> + genpll_scr: genpll_scr@6501d098 {
> + #clock-cells = <1>;
> + compatible = "brcm,ns2-genpll-scr";
> + reg = <0x6501d098 0x32>,
> + <0x6501c020 0x4>,
> + <0x6501d044 0x4>;
> + clocks = <&osc>;
> + clock-output-names = "genpll_scr", "scr", "fs",
> + "audio_ref", "scr_ch3_unused",
> + "scr_ch4_unused", "scr_ch5_unused";
> + };
> +
> + iprocmed: iprocmed {
> + #clock-cells = <0>;
> + compatible = "fixed-factor-clock";
> + clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
> + clock-div = <2>;
> + clock-mult = <1>;
> + };
> +
> + iprocslow: iprocslow {
> + #clock-cells = <0>;
> + compatible = "fixed-factor-clock";
> + clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
> + clock-div = <4>;
> + clock-mult = <1>;
> + };
> +
> + genpll_sw: genpll_sw@6501d0c4 {
> + #clock-cells = <1>;
> + compatible = "brcm,ns2-genpll-sw";
> + reg = <0x6501d0c4 0x32>,
> + <0x6501c020 0x4>,
> + <0x6501d044 0x4>;
> + clocks = <&osc>;
> + clock-output-names = "genpll_sw", "rpe", "250", "nic",
> + "chimp", "port", "sdio";
> + };
> diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> index 940ed52..0a92a68 100644
> --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> @@ -1,7 +1,7 @@
> /*
> * BSD LICENSE
> *
> - * Copyright(c) 2015 Broadcom Corporation. All rights reserved.
> + * Copyright (c) 2015 Broadcom. All rights reserved.
I am thinking the 2015 copyright notice should remain as is and a new
2016 notice should be added underneath.
Copyright (c) 2016 Broadcom. All rights reserved.
> *
> * Redistribution and use in source and binary forms, with or without
> * modification, are permitted provided that the following conditions
> @@ -110,33 +110,6 @@
> <&A57_3>;
> };
>
> - clocks {
> - #address-cells = <1>;
> - #size-cells = <1>;
> -
> - osc: oscillator {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <25000000>;
> - };
> -
> - iprocmed: iprocmed {
> - #clock-cells = <0>;
> - compatible = "fixed-factor-clock";
> - clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
> - clock-div = <2>;
> - clock-mult = <1>;
> - };
> -
> - iprocslow: iprocslow {
> - #clock-cells = <0>;
> - compatible = "fixed-factor-clock";
> - clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
> - clock-div = <4>;
> - clock-mult = <1>;
> - };
> - };
> -
> pcie0: pcie@20020000 {
> compatible = "brcm,iproc-pcie";
> reg = <0 0x20020000 0 0x1000>;
> @@ -217,6 +190,8 @@
> #size-cells = <1>;
> ranges = <0 0 0 0xffffffff>;
>
> + #include "ns2-clock.dtsi"
> +
> dma0: dma@61360000 {
> compatible = "arm,pl330", "arm,primecell";
> reg = <0x61360000 0x1000>;
> @@ -277,56 +252,6 @@
> mmu-masters;
> };
>
> - lcpll_ddr: lcpll_ddr@6501d058 {
> - #clock-cells = <1>;
> - compatible = "brcm,ns2-lcpll-ddr";
> - reg = <0x6501d058 0x20>,
> - <0x6501c020 0x4>,
> - <0x6501d04c 0x4>;
> - clocks = <&osc>;
> - clock-output-names = "lcpll_ddr", "pcie_sata_usb",
> - "ddr", "ddr_ch2_unused",
> - "ddr_ch3_unused", "ddr_ch4_unused",
> - "ddr_ch5_unused";
> - };
> -
> - lcpll_ports: lcpll_ports@6501d078 {
> - #clock-cells = <1>;
> - compatible = "brcm,ns2-lcpll-ports";
> - reg = <0x6501d078 0x20>,
> - <0x6501c020 0x4>,
> - <0x6501d054 0x4>;
> - clocks = <&osc>;
> - clock-output-names = "lcpll_ports", "wan", "rgmii",
> - "ports_ch2_unused",
> - "ports_ch3_unused",
> - "ports_ch4_unused",
> - "ports_ch5_unused";
> - };
> -
> - genpll_scr: genpll_scr@6501d098 {
> - #clock-cells = <1>;
> - compatible = "brcm,ns2-genpll-scr";
> - reg = <0x6501d098 0x32>,
> - <0x6501c020 0x4>,
> - <0x6501d044 0x4>;
> - clocks = <&osc>;
> - clock-output-names = "genpll_scr", "scr", "fs",
> - "audio_ref", "scr_ch3_unused",
> - "scr_ch4_unused", "scr_ch5_unused";
> - };
> -
> - genpll_sw: genpll_sw@6501d0c4 {
> - #clock-cells = <1>;
> - compatible = "brcm,ns2-genpll-sw";
> - reg = <0x6501d0c4 0x32>,
> - <0x6501c020 0x4>,
> - <0x6501d044 0x4>;
> - clocks = <&osc>;
> - clock-output-names = "genpll_sw", "rpe", "250", "nic",
> - "chimp", "port", "sdio";
> - };
> -
> crmu: crmu@65024000 {
> compatible = "syscon";
> reg = <0x65024000 0x100>;
> --
> 1.9.1
>
On March 29, 2016 11:47:10 AM PDT, Markus Mayer <[email protected]> wrote:
>> diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi
>b/arch/arm64/boot/dts/broadcom/ns2.dtsi
>> index 940ed52..0a92a68 100644
>> --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
>> +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
>> @@ -1,7 +1,7 @@
>> /*
>> * BSD LICENSE
>> *
>> - * Copyright(c) 2015 Broadcom Corporation. All rights reserved.
>> + * Copyright (c) 2015 Broadcom. All rights reserved.
>
>I am thinking the 2015 copyright notice should remain as is and a new
>2016 notice should be added underneath.
>
>Copyright (c) 2016 Broadcom. All rights reserved.
IANAL, but the directions given by our management on how to deal with these were clear, and they mentioned the use of Broadcom as holder name here irrespective of the time frame.
--
Florian
On 29/03/16 00:27, Anup Patel wrote:
> This patchset primarily adds more PL330 and PL022 DT nodes for
> NS2 SVK. It also moves clock DT nodes to separate file to be
> consistent with other Broadcom SoCs DT files.
>
> The patchset is based on v4.6-rc1 tag and is available in ns2_dt3_v1
> branch of https://github.com/Broadcom/arm64-linux.git
>
> All patches have been tested on Broadcom NS2 SVK.
>
> Anup Patel (4):
> arm64: dts: Add ARM PL330 DMA DT node for NS2
> arm64: dts: Add maintenance interrupt for GIC in NS2 DT
> arm64: dts: Move NS2 clock DT nodes to separate DT file
> arm64: dts: Add ARM PL022 SPI DT nodes for NS2
Series applied to devicetree-arm64/next, thanks!
--
Florian