Hello again everyone!
This patch series adds in basic VTM nodes for all of TI's K3 SoCs. As of
right now these do not do much other than add thermal entries into the
sysfs directory and power down the device once it exceeds a critical
temperature.
Changes from v1: [0]
- Fixed indexing of thermal nodes[0]
Changes from v2: [1]
- Updated unit address for am62x's &cbass_wakeup
- Dropped my j7* patches and cherry-picked Keerthy's
[0] https://lore.kernel.org/all/[email protected]/
[1] https://lore.kernel.org/all/[email protected]/
Thanks for reviewing!
~Bryan
Bryan Brattlof (3):
arm64: dts: ti: k3-am64-main: add VTM node
arm64: dts: ti: k3-am62-wakeup: add VTM node
arm64: dts: ti: k3-am62a-wakeup: add VTM node
Keerthy (4):
arm64: dts: ti: j784s4: Add VTM node
arm64: dts: ti: j721e: Add VTM node
arm64: dts: ti: j7200: Add VTM node
arm64: dts: ti: j721s2: Add VTM node
arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi | 33 ++++++
arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 8 ++
arch/arm64/boot/dts/ti/k3-am62.dtsi | 8 +-
arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi | 47 ++++++++
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 8 ++
arch/arm64/boot/dts/ti/k3-am62a.dtsi | 2 +
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 8 ++
arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi | 33 ++++++
arch/arm64/boot/dts/ti/k3-am64.dtsi | 3 +
.../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 9 ++
arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi | 47 ++++++++
arch/arm64/boot/dts/ti/k3-j7200.dtsi | 2 +
.../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 9 ++
arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi | 75 +++++++++++++
arch/arm64/boot/dts/ti/k3-j721e.dtsi | 2 +
.../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 9 ++
arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi | 101 ++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j721s2.dtsi | 4 +
.../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 9 ++
arch/arm64/boot/dts/ti/k3-j784s4-thermal.dtsi | 101 ++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 4 +
21 files changed, 520 insertions(+), 2 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi
create mode 100644 arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi
create mode 100644 arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi
create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi
create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi
create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi
create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-thermal.dtsi
base-commit: 891db0c48efb48c3af334006f9d7ea6a0aa49cb9
--
2.40.0
From: Keerthy <[email protected]>
VTM stands for Voltage Thermal Management. Add the thermal zones.
Six sensors mapping to six thermal zones. Main0, Main1, Main2, Main3,
WKUP1 & WKUP2 domains respectively.
Signed-off-by: Keerthy <[email protected]>
[[email protected]: rebased on v6.3-rc1]
Signed-off-by: Bryan Brattlof <[email protected]>
---
.../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 9 ++
arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi | 101 ++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j721s2.dtsi | 4 +
3 files changed, 114 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index a353705a7463e..a178368224f44 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -379,4 +379,13 @@ adc {
compatible = "ti,am3359-adc";
};
};
+
+ wkup_vtm0: temperature-sensor@42040000 {
+ compatible = "ti,j7200-vtm";
+ reg = <0x0 0x42040000 0x0 0x350>,
+ <0x0 0x42050000 0x0 0x350>,
+ <0x0 0x43000300 0x0 0x10>;
+ power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>;
+ #thermal-sensor-cells = <1>;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi
new file mode 100644
index 0000000000000..f7b1a15b8fa0a
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/thermal/thermal.h>
+
+wkup0_thermal: wkup0-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <500>; /* milliseconds */
+ thermal-sensors = <&wkup_vtm0 0>;
+
+ trips {
+ wkup0_crit: wkup0-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+};
+
+wkup1_thermal: wkup1-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <500>; /* milliseconds */
+ thermal-sensors = <&wkup_vtm0 1>;
+
+ trips {
+ wkup1_crit: wkup1-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+};
+
+main0_thermal: main0-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <500>; /* milliseconds */
+ thermal-sensors = <&wkup_vtm0 2>;
+
+ trips {
+ main0_crit: main0-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+};
+
+main1_thermal: main1-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <500>; /* milliseconds */
+ thermal-sensors = <&wkup_vtm0 3>;
+
+ trips {
+ main1_crit: main1-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+};
+
+main2_thermal: main2-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <500>; /* milliseconds */
+ thermal-sensors = <&wkup_vtm0 4>;
+
+ trips {
+ main2_crit: main2-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+};
+
+main3_thermal: main3-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <500>; /* milliseconds */
+ thermal-sensors = <&wkup_vtm0 5>;
+
+ trips {
+ main3_crit: main3-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+};
+
+main4_thermal: main4-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <500>; /* milliseconds */
+ thermal-sensors = <&wkup_vtm0 6>;
+
+ trips {
+ main4_crit: main4-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi
index 376924726f1f3..4aab2daf85fc7 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi
@@ -163,6 +163,10 @@ cbass_mcu_wakeup: bus@28380000 {
};
};
+
+ thermal_zones: thermal-zones {
+ #include "k3-j721s2-thermal.dtsi"
+ };
};
/* Now include peripherals from each bus segment */
--
2.40.0
The am62x supports a single Voltage and Thermal Management (VTM) module
located in the wakeup domain with two associated temperature monitors
located in hot spots of the die.
Signed-off-by: Bryan Brattlof <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi | 33 +++++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 8 +++++
arch/arm64/boot/dts/ti/k3-am62.dtsi | 8 +++--
3 files changed, 47 insertions(+), 2 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi
new file mode 100644
index 0000000000000..a358757e26f07
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/thermal/thermal.h>
+
+thermal_zones: thermal-zones {
+ main0_thermal: main0-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&wkup_vtm0 0>;
+
+ trips {
+ main0_crit: main0-crit {
+ temperature = <105000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ main1_thermal: main1-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&wkup_vtm0 1>;
+
+ trips {
+ main1_crit: main1-crit {
+ temperature = <105000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
index 7726ebae25394..eae0528871862 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
@@ -61,4 +61,12 @@ wkup_rti0: watchdog@2b000000 {
/* Used by DM firmware */
status = "reserved";
};
+
+ wkup_vtm0: temperature-sensor@b00000 {
+ compatible = "ti,j7200-vtm";
+ reg = <0x00 0xb00000 0x00 0x400>,
+ <0x00 0xb01000 0x00 0x400>;
+ power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
+ #thermal-sensor-cells = <1>;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-am62.dtsi b/arch/arm64/boot/dts/ti/k3-am62.dtsi
index a401f52252439..5e72c445f37a9 100644
--- a/arch/arm64/boot/dts/ti/k3-am62.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62.dtsi
@@ -81,6 +81,7 @@ cbass_main: bus@f0000 {
<0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>,
/* Wakeup Domain Range */
+ <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
<0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>,
<0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
@@ -91,14 +92,17 @@ cbass_mcu: bus@4000000 {
ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; /* Peripheral window */
};
- cbass_wakeup: bus@2b000000 {
+ cbass_wakeup: bus@b00000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
- ranges = <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, /* Peripheral Window */
+ ranges = <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
+ <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, /* Peripheral Window */
<0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
};
};
+
+ #include "k3-am62-thermal.dtsi"
};
/* Now include the peripherals for each bus segments */
--
2.40.0
The am64x supports a single VTM module which is located in the main
domain with two associated temperature monitors located at different hot
spots on the die.
Tested-by: Christian Gmeiner <[email protected]>
Signed-off-by: Bryan Brattlof <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 8 +++++
arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi | 33 +++++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am64.dtsi | 3 ++
3 files changed, 44 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 5e8036f32d79d..dc8c1c6021630 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -1392,4 +1392,12 @@ elm0: ecc@25010000 {
clock-names = "fck";
status = "disabled";
};
+
+ main_vtm0: temperature-sensor@b00000 {
+ compatible = "ti,j7200-vtm";
+ reg = <0x00 0xb00000 0x00 0x400>,
+ <0x00 0xb01000 0x00 0x400>;
+ power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
+ #thermal-sensor-cells = <1>;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi
new file mode 100644
index 0000000000000..036db56ba7977
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/thermal/thermal.h>
+
+thermal_zones: thermal-zones {
+ main0_thermal: main0-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&main_vtm0 0>;
+
+ trips {
+ main0_crit: main0-crit {
+ temperature = <105000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ main1_thermal: main1-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&main_vtm0 1>;
+
+ trips {
+ main1_crit: main1-crit {
+ temperature = <105000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/ti/k3-am64.dtsi b/arch/arm64/boot/dts/ti/k3-am64.dtsi
index 60fe95b483120..fe49133524d32 100644
--- a/arch/arm64/boot/dts/ti/k3-am64.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64.dtsi
@@ -70,6 +70,7 @@ cbass_main: bus@f4000 {
<0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
<0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
<0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
+ <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
<0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
<0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
<0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
@@ -106,6 +107,8 @@ cbass_mcu: bus@4000000 {
ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; /* Peripheral window */
};
};
+
+ #include "k3-am64-thermal.dtsi"
};
/* Now include the peripherals for each bus segments */
--
2.40.0
From: Keerthy <[email protected]>
VTM stands for Voltage Thermal Management. Add the thermal zones.
Three sensors mapping to 3 thermal zones. MCU, MPU & Main domains
respectively.
Signed-off-by: Keerthy <[email protected]>
[[email protected]: rebased on v6.3-rc1]
Signed-off-by: Bryan Brattlof <[email protected]>
---
.../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 9 ++++
arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi | 47 +++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j7200.dtsi | 2 +
3 files changed, 58 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 331b4e482e41c..e2ca7cc35119c 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -459,4 +459,13 @@ rng: rng@40910000 {
status = "disabled"; /* Used by OP-TEE */
};
};
+
+ wkup_vtm0: temperature-sensor@42040000 {
+ compatible = "ti,j7200-vtm";
+ reg = <0x00 0x42040000 0x00 0x350>,
+ <0x00 0x42050000 0x00 0x350>,
+ <0x00 0x43000300 0x00 0x10>;
+ power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
+ #thermal-sensor-cells = <1>;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi
new file mode 100644
index 0000000000000..e7e3a643a6f0c
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/thermal/thermal.h>
+
+thermal_zones: thermal-zones {
+ mcu_thermal: mcu-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <500>; /* milliseconds */
+ thermal-sensors = <&wkup_vtm0 0>;
+
+ trips {
+ wkup_crit: wkup-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ mpu_thermal: mpu-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <500>; /* milliseconds */
+ thermal-sensors = <&wkup_vtm0 1>;
+
+ trips {
+ mpu_crit: mpu-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ main_thermal: main-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <500>; /* milliseconds */
+ thermal-sensors = <&wkup_vtm0 2>;
+
+ trips {
+ c7x_crit: c7x-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/k3-j7200.dtsi
index bbe380c72a7ec..47befaffad436 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi
@@ -170,6 +170,8 @@ cbass_mcu_wakeup: bus@28380000 {
<0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; /* FSS OSPI1 data region 3 */
};
};
+
+ #include "k3-j7200-thermal.dtsi"
};
/* Now include the peripherals for each bus segments */
--
2.40.0
The am62ax supports a single Voltage and Thermal Management (VTM) device
located in the wakeup domain with three associated temperature monitors
located in various hot spots of the die.
Signed-off-by: Bryan Brattlof <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi | 47 ++++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 8 ++++
arch/arm64/boot/dts/ti/k3-am62a.dtsi | 2 +
3 files changed, 57 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi
new file mode 100644
index 0000000000000..85ce545633ea5
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/thermal/thermal.h>
+
+thermal_zones: thermal-zones {
+ main0_thermal: main0-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&wkup_vtm0 0>;
+
+ trips {
+ main0_crit: main0-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ main1_thermal: main1-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&wkup_vtm0 1>;
+
+ trips {
+ main1_crit: main1-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ main2_thermal: main2-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&wkup_vtm0 2>;
+
+ trips {
+ main2_crit: main2-crit {
+ temperature = <125000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
index 81d984414fd4a..9bdafead7199a 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
@@ -51,4 +51,12 @@ wkup_rtc0: rtc@2b1f0000 {
wakeup-source;
status = "disabled";
};
+
+ wkup_vtm0: temperature-sensor@b00000 {
+ compatible = "ti,j7200-vtm";
+ reg = <0x00 0xb00000 0x00 0x400>,
+ <0x00 0xb01000 0x00 0x400>;
+ power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
+ #thermal-sensor-cells = <1>;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-am62a.dtsi b/arch/arm64/boot/dts/ti/k3-am62a.dtsi
index fe60c9ce21e3d..61a210ecd5ff1 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a.dtsi
@@ -115,6 +115,8 @@ cbass_wakeup: bus@b00000 {
<0x00 0x78100000 0x00 0x78100000 0x00 0x00008000>; /* DM R5 BTCM*/
};
};
+
+ #include "k3-am62a-thermal.dtsi"
};
/* Now include the peripherals for each bus segments */
--
2.40.0
Hi!
Am Do., 6. Apr. 2023 um 00:01 Uhr schrieb Bryan Brattlof <[email protected]>:
>
> Hello again everyone!
>
> This patch series adds in basic VTM nodes for all of TI's K3 SoCs. As of
> right now these do not do much other than add thermal entries into the
> sysfs directory and power down the device once it exceeds a critical
> temperature.
>
> Changes from v1: [0]
> - Fixed indexing of thermal nodes[0]
>
> Changes from v2: [1]
> - Updated unit address for am62x's &cbass_wakeup
> - Dropped my j7* patches and cherry-picked Keerthy's
>
> [0] https://lore.kernel.org/all/[email protected]/
> [1] https://lore.kernel.org/all/[email protected]/
>
What is missing to get this series landed?
> Thanks for reviewing!
> ~Bryan
>
> Bryan Brattlof (3):
> arm64: dts: ti: k3-am64-main: add VTM node
> arm64: dts: ti: k3-am62-wakeup: add VTM node
> arm64: dts: ti: k3-am62a-wakeup: add VTM node
>
> Keerthy (4):
> arm64: dts: ti: j784s4: Add VTM node
> arm64: dts: ti: j721e: Add VTM node
> arm64: dts: ti: j7200: Add VTM node
> arm64: dts: ti: j721s2: Add VTM node
>
> arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi | 33 ++++++
> arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 8 ++
> arch/arm64/boot/dts/ti/k3-am62.dtsi | 8 +-
> arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi | 47 ++++++++
> arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 8 ++
> arch/arm64/boot/dts/ti/k3-am62a.dtsi | 2 +
> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 8 ++
> arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi | 33 ++++++
> arch/arm64/boot/dts/ti/k3-am64.dtsi | 3 +
> .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 9 ++
> arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi | 47 ++++++++
> arch/arm64/boot/dts/ti/k3-j7200.dtsi | 2 +
> .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 9 ++
> arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi | 75 +++++++++++++
> arch/arm64/boot/dts/ti/k3-j721e.dtsi | 2 +
> .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 9 ++
> arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi | 101 ++++++++++++++++++
> arch/arm64/boot/dts/ti/k3-j721s2.dtsi | 4 +
> .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 9 ++
> arch/arm64/boot/dts/ti/k3-j784s4-thermal.dtsi | 101 ++++++++++++++++++
> arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 4 +
> 21 files changed, 520 insertions(+), 2 deletions(-)
> create mode 100644 arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-am62a-thermal.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi
> create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-thermal.dtsi
>
>
> base-commit: 891db0c48efb48c3af334006f9d7ea6a0aa49cb9
> --
> 2.40.0
>
--
greets
--
Christian Gmeiner, MSc
https://christian-gmeiner.info/privacypolicy