On Wed, Sep 20, 2023 at 2:40 PM Chen Wang <[email protected]> wrote:
>
> From: Emil Renner Berthing <[email protected]>
>
> Add compatible for the uarts on the Sophgo SG2042 RISC-V SoC.
>
> Signed-off-by: Emil Renner Berthing <[email protected]>
> Signed-off-by: Chen Wang <[email protected]>
> ---
> Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> index 17c553123f96..011d89e6df0f 100644
> --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> @@ -45,6 +45,7 @@ properties:
> - const: snps,dw-apb-uart
> - items:
> - enum:
> + - sophgo,sg2042-uart
> - starfive,jh7100-hsuart
> - starfive,jh7100-uart
> - const: snps,dw-apb-uart
> --
> 2.25.1
>
LGTM
Reviewed-by: Guo Ren <[email protected]>
--
Best Regards
Guo Ren