Multi Core Timer node has interrupts routed to two different parents -
GIC and combiner. This was modeled with a interrupt-map within a
subnode but can be expressed in an easier and more common way, directly
in the node itself.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Not tested.
Changes since v3:
1. Use interrupts-extended instead of interrupts-map.
---
arch/arm/boot/dts/exynos5250.dtsi | 23 ++++++-----------------
1 file changed, 6 insertions(+), 17 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 7a01349317a3..a549eafd2c64 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -236,25 +236,14 @@
timer@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101C0000 0x800>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupt-parent = <&mct_map>;
- interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
- <4 0>, <5 0>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
-
- mct_map: mct-map {
- #interrupt-cells = <2>;
- #address-cells = <0>;
- #size-cells = <0>;
- interrupt-map = <0x0 0 &combiner 23 3>,
- <0x1 0 &combiner 23 4>,
- <0x2 0 &combiner 25 2>,
- <0x3 0 &combiner 25 3>,
- <0x4 0 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
- <0x5 0 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
- };
+ interrupts-extended = <&combiner 23 3>,
+ <&combiner 23 4>,
+ <&combiner 25 2>,
+ <&combiner 25 3>,
+ <&gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_0: pinctrl@11400000 {
--
2.17.1
On 23.09.2019 18:14, Krzysztof Kozlowski wrote:
> Multi Core Timer node has interrupts routed to two different parents -
> GIC and combiner. This was modeled with a interrupt-map within a
> subnode but can be expressed in an easier and more common way, directly
> in the node itself.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
Tested-by: Marek Szyprowski <[email protected]>
Works fine on Arndale and Snow boards.
>
> ---
>
> Not tested.
>
> Changes since v3:
> 1. Use interrupts-extended instead of interrupts-map.
> ---
> arch/arm/boot/dts/exynos5250.dtsi | 23 ++++++-----------------
> 1 file changed, 6 insertions(+), 17 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
> index 7a01349317a3..a549eafd2c64 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -236,25 +236,14 @@
> timer@101c0000 {
> compatible = "samsung,exynos4210-mct";
> reg = <0x101C0000 0x800>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - interrupt-parent = <&mct_map>;
> - interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
> - <4 0>, <5 0>;
> clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
> clock-names = "fin_pll", "mct";
> -
> - mct_map: mct-map {
> - #interrupt-cells = <2>;
> - #address-cells = <0>;
> - #size-cells = <0>;
> - interrupt-map = <0x0 0 &combiner 23 3>,
> - <0x1 0 &combiner 23 4>,
> - <0x2 0 &combiner 25 2>,
> - <0x3 0 &combiner 25 3>,
> - <0x4 0 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
> - <0x5 0 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
> - };
> + interrupts-extended = <&combiner 23 3>,
> + <&combiner 23 4>,
> + <&combiner 25 2>,
> + <&combiner 25 3>,
> + <&gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
> + <&gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> pinctrl_0: pinctrl@11400000 {
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
On Tue, 24 Sep 2019 at 08:58, Marek Szyprowski <[email protected]> wrote:
>
>
> On 23.09.2019 18:14, Krzysztof Kozlowski wrote:
> > Multi Core Timer node has interrupts routed to two different parents -
> > GIC and combiner. This was modeled with a interrupt-map within a
> > subnode but can be expressed in an easier and more common way, directly
> > in the node itself.
> >
> > Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Tested-by: Marek Szyprowski <[email protected]>
>
> Works fine on Arndale and Snow boards.
Thanks for testing!