2023-12-28 13:50:07

by Emil Renner Berthing

[permalink] [raw]
Subject: Re: [PATCH] riscv: dts: sophgo: add watchdog dt node for CV1800

AnnanLiu wrote:
> Add the watchdog device tree node to cv1800 SoC.
> This patch depends on the clk driver and reset driver.
> Clk driver link:
> https://lore.kernel.org/all/IA1PR20MB49539CDAD9A268CBF6CA184BBB9FA@IA1PR20MB4953.namprd20.prod.outlook.com/
> Reset driver link:
> https://lore.kernel.org/all/[email protected]/
>
> Signed-off-by: AnnanLiu <[email protected]>
> ---
> arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 4 ++++
> arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 15 +++++++++++++++
> 2 files changed, 19 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> index 3af9e34b3bc7..f3103de4a8cc 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
> @@ -36,3 +36,7 @@ &osc {
> &uart0 {
> status = "okay";
> };
> +
> +&watchdog0 {
> + status = "okay";
> +};

You don't set status = "disabled" in the cv1800b.dtsi so you shouldn't need to
enable it explicitly here.

> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> index aec6401a467b..a0a6b6fc6bc5 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> @@ -1,6 +1,7 @@
> // SPDX-License-Identifier: (GPL-2.0 OR MIT)
> /*
> * Copyright (C) 2023 Jisheng Zhang <[email protected]>
> + * Copyright (C) 2023 Annan Liu <[email protected]>
> */
>
> #include <dt-bindings/interrupt-controller/irq.h>
> @@ -103,6 +104,20 @@ uart4: serial@41c0000 {
> status = "disabled";
> };
>
> + watchdog0: watchdog@3010000{
> + compatible = "snps,dw-wdt";
> + reg = <0x3010000 0x100>;
> + interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pclk>;
> + resets = <&rst RST_WDT>;
> + };

Are there more than 1 watchdogs on the SoC? Otherwise there should be no reason
to call this "watchdog0".

> +
> + pclk: pclk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <25000000>;
> + };
> +
> plic: interrupt-controller@70000000 {
> compatible = "sophgo,cv1800b-plic", "thead,c900-plic";
> reg = <0x70000000 0x4000000>;
> --
> 2.34.1
>
>
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