2023-07-29 14:08:09

by Keguang Zhang

[permalink] [raw]
Subject: [PATCH 00/17] MIPS: loongson32: Convert all platform devices to DT

Convert all platform devices to devicetree.
Remove all the obsolete code of platform device.
Adapt the common code to support devicetree.
Update Kconfig and Makefile files accordingly.
Update and rename the defconfig.

Keguang Zhang (17):
MIPS: loongson32: Get the system type from DT
MIPS: Modify the Loongson1 PRID_REV
MIPS: dts: Add basic DT support for Loongson-1 boards
MIPS: loongson32: Modify Loongson-1B/1C related Kconfig options
MIPS: loongson32: Adapt the common code to support DT
MIPS: loongson32: Convert platform IRQ driver to DT
MIPS: loongson32: Convert UART platform device to DT
MIPS: loongson32: Convert Ethernet platform device to DT
MIPS: loongson32: Convert GPIO platform device to DT
MIPS: loongson32: Convert GPIO LED platform device to DT
MIPS: loongson32: Convert USB host platform device to DT
MIPS: loongson32: Convert RTC platform device to DT
MIPS: loongson32: Convert watchdog platform device to DT
mips: dts: loongson1b: Add PWM timer clocksource
MIPS: loongson32: Remove all the obsolete code of platform device
MIPS: configs: Update and rename loongson1b_defconfig
MIPS: configs: Update and rename loongson1c_defconfig

arch/mips/Kconfig | 62 ++--
arch/mips/boot/dts/Makefile | 1 +
arch/mips/boot/dts/loongson/Makefile | 3 +
arch/mips/boot/dts/loongson/loongson1.dtsi | 161 ++++++++++
arch/mips/boot/dts/loongson/loongson1b.dtsi | 201 ++++++++++++
arch/mips/boot/dts/loongson/loongson1c.dtsi | 144 +++++++++
arch/mips/boot/dts/loongson/lsgz_1b_dev.dts | 88 ++++++
arch/mips/boot/dts/loongson/smartloong_1c.dts | 84 +++++
...gson1c_defconfig => lsgz_1b_dev_defconfig} | 71 ++++-
...on1b_defconfig => smartloong_1c_defconfig} | 70 ++++-
arch/mips/include/asm/cpu-type.h | 3 +-
arch/mips/include/asm/cpu.h | 3 +-
arch/mips/include/asm/mach-loongson32/dma.h | 21 --
arch/mips/include/asm/mach-loongson32/irq.h | 107 -------
.../include/asm/mach-loongson32/loongson1.h | 50 ---
arch/mips/include/asm/mach-loongson32/nand.h | 26 --
.../include/asm/mach-loongson32/platform.h | 26 --
.../include/asm/mach-loongson32/regs-mux.h | 124 --------
arch/mips/kernel/cpu-probe.c | 6 +-
arch/mips/loongson32/Kconfig | 41 +--
arch/mips/loongson32/Makefile | 14 +-
arch/mips/loongson32/common/Makefile | 6 -
arch/mips/loongson32/common/irq.c | 191 ------------
arch/mips/loongson32/common/platform.c | 287 ------------------
arch/mips/loongson32/common/prom.c | 42 ---
arch/mips/loongson32/common/setup.c | 26 --
arch/mips/loongson32/common/time.c | 23 --
arch/mips/loongson32/init.c | 83 +++++
arch/mips/loongson32/ls1b/Makefile | 6 -
arch/mips/loongson32/ls1b/board.c | 57 ----
arch/mips/loongson32/ls1c/Makefile | 6 -
arch/mips/loongson32/ls1c/board.c | 23 --
arch/mips/loongson32/proc.c | 20 ++
33 files changed, 941 insertions(+), 1135 deletions(-)
create mode 100644 arch/mips/boot/dts/loongson/loongson1.dtsi
create mode 100644 arch/mips/boot/dts/loongson/loongson1b.dtsi
create mode 100644 arch/mips/boot/dts/loongson/loongson1c.dtsi
create mode 100644 arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
create mode 100644 arch/mips/boot/dts/loongson/smartloong_1c.dts
rename arch/mips/configs/{loongson1c_defconfig => lsgz_1b_dev_defconfig} (59%)
rename arch/mips/configs/{loongson1b_defconfig => smartloong_1c_defconfig} (59%)
delete mode 100644 arch/mips/include/asm/mach-loongson32/dma.h
delete mode 100644 arch/mips/include/asm/mach-loongson32/irq.h
delete mode 100644 arch/mips/include/asm/mach-loongson32/loongson1.h
delete mode 100644 arch/mips/include/asm/mach-loongson32/nand.h
delete mode 100644 arch/mips/include/asm/mach-loongson32/platform.h
delete mode 100644 arch/mips/include/asm/mach-loongson32/regs-mux.h
delete mode 100644 arch/mips/loongson32/common/Makefile
delete mode 100644 arch/mips/loongson32/common/irq.c
delete mode 100644 arch/mips/loongson32/common/platform.c
delete mode 100644 arch/mips/loongson32/common/prom.c
delete mode 100644 arch/mips/loongson32/common/setup.c
delete mode 100644 arch/mips/loongson32/common/time.c
create mode 100644 arch/mips/loongson32/init.c
delete mode 100644 arch/mips/loongson32/ls1b/Makefile
delete mode 100644 arch/mips/loongson32/ls1b/board.c
delete mode 100644 arch/mips/loongson32/ls1c/Makefile
delete mode 100644 arch/mips/loongson32/ls1c/board.c
create mode 100644 arch/mips/loongson32/proc.c


base-commit: f11a9967413281b49690d864795e7c5f8f8e4fda
--
2.39.2



2023-07-29 14:09:57

by Keguang Zhang

[permalink] [raw]
Subject: [PATCH 16/17] MIPS: configs: Update and rename loongson1b_defconfig

Rename the loongson1b_defconfig to the board name.
Update the following options:
- Enable CONFIG_SERIAL_OF_PLATFORM
- Enable CONFIG_RTC_DRV_LOONGSON
- Enable CONFIG_CLKSRC_LOONGSON1_PWM
- Disable unnecessary options

Signed-off-by: Keguang Zhang <[email protected]>
---
...gson1b_defconfig => lsgz_1b_dev_defconfig} | 70 +++++++++++++++----
1 file changed, 55 insertions(+), 15 deletions(-)
rename arch/mips/configs/{loongson1b_defconfig => lsgz_1b_dev_defconfig} (59%)

diff --git a/arch/mips/configs/loongson1b_defconfig b/arch/mips/configs/lsgz_1b_dev_defconfig
similarity index 59%
rename from arch/mips/configs/loongson1b_defconfig
rename to arch/mips/configs/lsgz_1b_dev_defconfig
index 68207b31dc20..149b6a1353c0 100644
--- a/arch/mips/configs/loongson1b_defconfig
+++ b/arch/mips/configs/lsgz_1b_dev_defconfig
@@ -1,7 +1,6 @@
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_KERNEL_XZ=y
CONFIG_SYSVIPC=y
-CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
@@ -12,15 +11,16 @@ CONFIG_NAMESPACES=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_EXPERT=y
CONFIG_PERF_EVENTS=y
-# CONFIG_COMPAT_BRK is not set
CONFIG_MACH_LOONGSON32=y
-# CONFIG_SECCOMP is not set
# CONFIG_SUSPEND is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_GCC_PLUGINS is not set
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLOCK_LEGACY_AUTOLOAD is not set
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_COMPAT_BRK is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
@@ -43,17 +43,50 @@ CONFIG_BLK_DEV_LOOP=y
CONFIG_SCSI=m
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=m
+# CONFIG_BLK_DEV_BSG is not set
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_ALACRITECH is not set
+# CONFIG_NET_VENDOR_AMAZON is not set
+# CONFIG_NET_VENDOR_AQUANTIA is not set
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_ASIX is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CADENCE is not set
+# CONFIG_NET_VENDOR_CAVIUM is not set
+# CONFIG_NET_VENDOR_CORTINA is not set
+# CONFIG_NET_VENDOR_DAVICOM is not set
+# CONFIG_NET_VENDOR_ENGLEDER is not set
+# CONFIG_NET_VENDOR_EZCHIP is not set
+# CONFIG_NET_VENDOR_FUNGIBLE is not set
+# CONFIG_NET_VENDOR_GOOGLE is not set
+# CONFIG_NET_VENDOR_HUAWEI is not set
# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_LITEX is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_MICROSEMI is not set
+# CONFIG_NET_VENDOR_MICROSOFT is not set
+# CONFIG_NET_VENDOR_NI is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_NETRONOME is not set
+# CONFIG_NET_VENDOR_PENSANDO is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_RENESAS is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_SOCIONEXT is not set
CONFIG_STMMAC_ETH=y
+# CONFIG_NET_VENDOR_SYNOPSYS is not set
+# CONFIG_NET_VENDOR_VERTEXCOM is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WANGXUN is not set
# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_NET_VENDOR_XILINX is not set
# CONFIG_WLAN is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set
@@ -63,7 +96,9 @@ CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_LEGACY_PTY_COUNT=8
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set
+# CONFIG_PTP_1588_CLOCK is not set
CONFIG_GPIOLIB=y
CONFIG_GPIO_LOONGSON1=y
# CONFIG_HWMON is not set
@@ -88,15 +123,15 @@ CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_LOONGSON1=y
+CONFIG_RTC_DRV_LOONGSON=y
+# CONFIG_VIRTIO_MENU is not set
+# CONFIG_VHOST_MENU is not set
+# CONFIG_MIPS_PLATFORM_DEVICES is not set
+CONFIG_CLKSRC_LOONGSON1_PWM=y
# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
# CONFIG_DNOTIFY is not set
CONFIG_VFAT_FS=y
CONFIG_PROC_KCORE=y
@@ -109,12 +144,17 @@ CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_ISO8859_1=m
-# CONFIG_CRYPTO_ECHAINIV is not set
# CONFIG_CRYPTO_HW is not set
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_ARM is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_SPARC is not set
CONFIG_DYNAMIC_DEBUG=y
-CONFIG_DEBUG_FS=y
+# CONFIG_DEBUG_MISC is not set
CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
# CONFIG_EARLY_PRINTK is not set
--
2.39.2


2023-07-29 14:12:29

by Keguang Zhang

[permalink] [raw]
Subject: [PATCH 15/17] MIPS: loongson32: Remove all the obsolete code of platform device

All platform devices of Loongson-1 was converted to devicetree.
Therefore, removes all the obsolete platform device related code,
header files and Kconfig options.

Signed-off-by: Keguang Zhang <[email protected]>
---
arch/mips/include/asm/mach-loongson32/dma.h | 21 ---
arch/mips/include/asm/mach-loongson32/irq.h | 107 ---------------
.../include/asm/mach-loongson32/loongson1.h | 50 -------
arch/mips/include/asm/mach-loongson32/nand.h | 26 ----
.../include/asm/mach-loongson32/platform.h | 26 ----
.../include/asm/mach-loongson32/regs-mux.h | 124 ------------------
arch/mips/loongson32/Kconfig | 8 --
arch/mips/loongson32/Makefile | 13 --
arch/mips/loongson32/common/Makefile | 6 -
arch/mips/loongson32/common/platform.c | 17 ---
arch/mips/loongson32/ls1b/Makefile | 6 -
arch/mips/loongson32/ls1b/board.c | 24 ----
arch/mips/loongson32/ls1c/Makefile | 6 -
arch/mips/loongson32/ls1c/board.c | 17 ---
14 files changed, 451 deletions(-)
delete mode 100644 arch/mips/include/asm/mach-loongson32/dma.h
delete mode 100644 arch/mips/include/asm/mach-loongson32/irq.h
delete mode 100644 arch/mips/include/asm/mach-loongson32/loongson1.h
delete mode 100644 arch/mips/include/asm/mach-loongson32/nand.h
delete mode 100644 arch/mips/include/asm/mach-loongson32/platform.h
delete mode 100644 arch/mips/include/asm/mach-loongson32/regs-mux.h
delete mode 100644 arch/mips/loongson32/common/Makefile
delete mode 100644 arch/mips/loongson32/common/platform.c
delete mode 100644 arch/mips/loongson32/ls1b/Makefile
delete mode 100644 arch/mips/loongson32/ls1b/board.c
delete mode 100644 arch/mips/loongson32/ls1c/Makefile
delete mode 100644 arch/mips/loongson32/ls1c/board.c

diff --git a/arch/mips/include/asm/mach-loongson32/dma.h b/arch/mips/include/asm/mach-loongson32/dma.h
deleted file mode 100644
index e917b3ccb2c2..000000000000
--- a/arch/mips/include/asm/mach-loongson32/dma.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (c) 2015 Zhang, Keguang <[email protected]>
- *
- * Loongson 1 NAND platform support.
- */
-
-#ifndef __ASM_MACH_LOONGSON32_DMA_H
-#define __ASM_MACH_LOONGSON32_DMA_H
-
-#define LS1X_DMA_CHANNEL0 0
-#define LS1X_DMA_CHANNEL1 1
-#define LS1X_DMA_CHANNEL2 2
-
-struct plat_ls1x_dma {
- int nr_channels;
-};
-
-extern struct plat_ls1x_dma ls1b_dma_pdata;
-
-#endif /* __ASM_MACH_LOONGSON32_DMA_H */
diff --git a/arch/mips/include/asm/mach-loongson32/irq.h b/arch/mips/include/asm/mach-loongson32/irq.h
deleted file mode 100644
index 6115f025ba21..000000000000
--- a/arch/mips/include/asm/mach-loongson32/irq.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (c) 2011 Zhang, Keguang <[email protected]>
- *
- * IRQ mappings for Loongson 1
- */
-
-#ifndef __ASM_MACH_LOONGSON32_IRQ_H
-#define __ASM_MACH_LOONGSON32_IRQ_H
-
-/*
- * CPU core Interrupt Numbers
- */
-#define MIPS_CPU_IRQ_BASE 0
-#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
-
-#define SOFTINT0_IRQ MIPS_CPU_IRQ(0)
-#define SOFTINT1_IRQ MIPS_CPU_IRQ(1)
-#define INT0_IRQ MIPS_CPU_IRQ(2)
-#define INT1_IRQ MIPS_CPU_IRQ(3)
-#define INT2_IRQ MIPS_CPU_IRQ(4)
-#define INT3_IRQ MIPS_CPU_IRQ(5)
-#define INT4_IRQ MIPS_CPU_IRQ(6)
-#define TIMER_IRQ MIPS_CPU_IRQ(7) /* cpu timer */
-
-#define MIPS_CPU_IRQS (MIPS_CPU_IRQ(7) + 1 - MIPS_CPU_IRQ_BASE)
-
-/*
- * INT0~3 Interrupt Numbers
- */
-#define LS1X_IRQ_BASE MIPS_CPU_IRQS
-#define LS1X_IRQ(n, x) (LS1X_IRQ_BASE + (n << 5) + (x))
-
-#define LS1X_UART0_IRQ LS1X_IRQ(0, 2)
-#if defined(CONFIG_LOONGSON1_LS1B)
-#define LS1X_UART1_IRQ LS1X_IRQ(0, 3)
-#define LS1X_UART2_IRQ LS1X_IRQ(0, 4)
-#define LS1X_UART3_IRQ LS1X_IRQ(0, 5)
-#elif defined(CONFIG_LOONGSON1_LS1C)
-#define LS1X_UART1_IRQ LS1X_IRQ(0, 4)
-#define LS1X_UART2_IRQ LS1X_IRQ(0, 5)
-#endif
-#define LS1X_CAN0_IRQ LS1X_IRQ(0, 6)
-#define LS1X_CAN1_IRQ LS1X_IRQ(0, 7)
-#define LS1X_SPI0_IRQ LS1X_IRQ(0, 8)
-#define LS1X_SPI1_IRQ LS1X_IRQ(0, 9)
-#define LS1X_AC97_IRQ LS1X_IRQ(0, 10)
-#define LS1X_DMA0_IRQ LS1X_IRQ(0, 13)
-#define LS1X_DMA1_IRQ LS1X_IRQ(0, 14)
-#define LS1X_DMA2_IRQ LS1X_IRQ(0, 15)
-#if defined(CONFIG_LOONGSON1_LS1C)
-#define LS1X_NAND_IRQ LS1X_IRQ(0, 16)
-#endif
-#define LS1X_PWM0_IRQ LS1X_IRQ(0, 17)
-#define LS1X_PWM1_IRQ LS1X_IRQ(0, 18)
-#define LS1X_PWM2_IRQ LS1X_IRQ(0, 19)
-#define LS1X_PWM3_IRQ LS1X_IRQ(0, 20)
-#define LS1X_RTC_INT0_IRQ LS1X_IRQ(0, 21)
-#define LS1X_RTC_INT1_IRQ LS1X_IRQ(0, 22)
-#define LS1X_RTC_INT2_IRQ LS1X_IRQ(0, 23)
-#if defined(CONFIG_LOONGSON1_LS1B)
-#define LS1X_TOY_INT0_IRQ LS1X_IRQ(0, 24)
-#define LS1X_TOY_INT1_IRQ LS1X_IRQ(0, 25)
-#define LS1X_TOY_INT2_IRQ LS1X_IRQ(0, 26)
-#define LS1X_RTC_TICK_IRQ LS1X_IRQ(0, 27)
-#define LS1X_TOY_TICK_IRQ LS1X_IRQ(0, 28)
-#define LS1X_UART4_IRQ LS1X_IRQ(0, 29)
-#define LS1X_UART5_IRQ LS1X_IRQ(0, 30)
-#elif defined(CONFIG_LOONGSON1_LS1C)
-#define LS1X_UART3_IRQ LS1X_IRQ(0, 29)
-#define LS1X_ADC_IRQ LS1X_IRQ(0, 30)
-#define LS1X_SDIO_IRQ LS1X_IRQ(0, 31)
-#endif
-
-#define LS1X_EHCI_IRQ LS1X_IRQ(1, 0)
-#define LS1X_OHCI_IRQ LS1X_IRQ(1, 1)
-#if defined(CONFIG_LOONGSON1_LS1B)
-#define LS1X_GMAC0_IRQ LS1X_IRQ(1, 2)
-#define LS1X_GMAC1_IRQ LS1X_IRQ(1, 3)
-#elif defined(CONFIG_LOONGSON1_LS1C)
-#define LS1X_OTG_IRQ LS1X_IRQ(1, 2)
-#define LS1X_GMAC0_IRQ LS1X_IRQ(1, 3)
-#define LS1X_CAM_IRQ LS1X_IRQ(1, 4)
-#define LS1X_UART4_IRQ LS1X_IRQ(1, 5)
-#define LS1X_UART5_IRQ LS1X_IRQ(1, 6)
-#define LS1X_UART6_IRQ LS1X_IRQ(1, 7)
-#define LS1X_UART7_IRQ LS1X_IRQ(1, 8)
-#define LS1X_UART8_IRQ LS1X_IRQ(1, 9)
-#define LS1X_UART9_IRQ LS1X_IRQ(1, 13)
-#define LS1X_UART10_IRQ LS1X_IRQ(1, 14)
-#define LS1X_UART11_IRQ LS1X_IRQ(1, 15)
-#define LS1X_I2C0_IRQ LS1X_IRQ(1, 17)
-#define LS1X_I2C1_IRQ LS1X_IRQ(1, 18)
-#define LS1X_I2C2_IRQ LS1X_IRQ(1, 19)
-#endif
-
-#if defined(CONFIG_LOONGSON1_LS1B)
-#define INTN 4
-#elif defined(CONFIG_LOONGSON1_LS1C)
-#define INTN 5
-#endif
-
-#define LS1X_IRQS (LS1X_IRQ(INTN, 31) + 1 - LS1X_IRQ_BASE)
-
-#define NR_IRQS (MIPS_CPU_IRQS + LS1X_IRQS)
-
-#endif /* __ASM_MACH_LOONGSON32_IRQ_H */
diff --git a/arch/mips/include/asm/mach-loongson32/loongson1.h b/arch/mips/include/asm/mach-loongson32/loongson1.h
deleted file mode 100644
index 84f45461c832..000000000000
--- a/arch/mips/include/asm/mach-loongson32/loongson1.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (c) 2011 Zhang, Keguang <[email protected]>
- *
- * Register mappings for Loongson 1
- */
-
-#ifndef __ASM_MACH_LOONGSON32_LOONGSON1_H
-#define __ASM_MACH_LOONGSON32_LOONGSON1_H
-
-#if defined(CONFIG_LOONGSON1_LS1B)
-#define DEFAULT_MEMSIZE 64 /* If no memsize provided */
-#elif defined(CONFIG_LOONGSON1_LS1C)
-#define DEFAULT_MEMSIZE 32
-#endif
-
-/* Loongson 1 Register Bases */
-#define LS1X_MUX_BASE 0x1fd00420
-#define LS1X_INTC_BASE 0x1fd01040
-#define LS1X_GPIO0_BASE 0x1fd010c0
-#define LS1X_GPIO1_BASE 0x1fd010c4
-#define LS1X_DMAC_BASE 0x1fd01160
-#define LS1X_CBUS_BASE 0x1fd011c0
-#define LS1X_EHCI_BASE 0x1fe00000
-#define LS1X_OHCI_BASE 0x1fe08000
-#define LS1X_GMAC0_BASE 0x1fe10000
-#define LS1X_GMAC1_BASE 0x1fe20000
-
-#define LS1X_UART0_BASE 0x1fe40000
-#define LS1X_UART1_BASE 0x1fe44000
-#define LS1X_UART2_BASE 0x1fe48000
-#define LS1X_UART3_BASE 0x1fe4c000
-#define LS1X_CAN0_BASE 0x1fe50000
-#define LS1X_CAN1_BASE 0x1fe54000
-#define LS1X_I2C0_BASE 0x1fe58000
-#define LS1X_I2C1_BASE 0x1fe68000
-#define LS1X_I2C2_BASE 0x1fe70000
-#define LS1X_PWM0_BASE 0x1fe5c000
-#define LS1X_PWM1_BASE 0x1fe5c010
-#define LS1X_PWM2_BASE 0x1fe5c020
-#define LS1X_PWM3_BASE 0x1fe5c030
-#define LS1X_WDT_BASE 0x1fe5c060
-#define LS1X_RTC_BASE 0x1fe64000
-#define LS1X_AC97_BASE 0x1fe74000
-#define LS1X_NAND_BASE 0x1fe78000
-#define LS1X_CLK_BASE 0x1fe78030
-
-#include <regs-mux.h>
-
-#endif /* __ASM_MACH_LOONGSON32_LOONGSON1_H */
diff --git a/arch/mips/include/asm/mach-loongson32/nand.h b/arch/mips/include/asm/mach-loongson32/nand.h
deleted file mode 100644
index aaf5ed19d78d..000000000000
--- a/arch/mips/include/asm/mach-loongson32/nand.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (c) 2015 Zhang, Keguang <[email protected]>
- *
- * Loongson 1 NAND platform support.
- */
-
-#ifndef __ASM_MACH_LOONGSON32_NAND_H
-#define __ASM_MACH_LOONGSON32_NAND_H
-
-#include <linux/dmaengine.h>
-#include <linux/mtd/partitions.h>
-
-struct plat_ls1x_nand {
- struct mtd_partition *parts;
- unsigned int nr_parts;
-
- int hold_cycle;
- int wait_cycle;
-};
-
-extern struct plat_ls1x_nand ls1b_nand_pdata;
-
-bool ls1x_dma_filter_fn(struct dma_chan *chan, void *param);
-
-#endif /* __ASM_MACH_LOONGSON32_NAND_H */
diff --git a/arch/mips/include/asm/mach-loongson32/platform.h b/arch/mips/include/asm/mach-loongson32/platform.h
deleted file mode 100644
index 2cdcfb5f6012..000000000000
--- a/arch/mips/include/asm/mach-loongson32/platform.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (c) 2011 Zhang, Keguang <[email protected]>
- */
-
-#ifndef __ASM_MACH_LOONGSON32_PLATFORM_H
-#define __ASM_MACH_LOONGSON32_PLATFORM_H
-
-#include <linux/platform_device.h>
-
-#include <dma.h>
-#include <nand.h>
-
-extern struct platform_device ls1x_uart_pdev;
-extern struct platform_device ls1x_eth0_pdev;
-extern struct platform_device ls1x_eth1_pdev;
-extern struct platform_device ls1x_ehci_pdev;
-extern struct platform_device ls1x_gpio0_pdev;
-extern struct platform_device ls1x_gpio1_pdev;
-extern struct platform_device ls1x_rtc_pdev;
-extern struct platform_device ls1x_wdt_pdev;
-
-void __init ls1x_rtc_set_extclk(struct platform_device *pdev);
-void __init ls1x_serial_set_uartclk(struct platform_device *pdev);
-
-#endif /* __ASM_MACH_LOONGSON32_PLATFORM_H */
diff --git a/arch/mips/include/asm/mach-loongson32/regs-mux.h b/arch/mips/include/asm/mach-loongson32/regs-mux.h
deleted file mode 100644
index 95788a4f03a0..000000000000
--- a/arch/mips/include/asm/mach-loongson32/regs-mux.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (c) 2014 Zhang, Keguang <[email protected]>
- *
- * Loongson 1 MUX Register Definitions.
- */
-
-#ifndef __ASM_MACH_LOONGSON32_REGS_MUX_H
-#define __ASM_MACH_LOONGSON32_REGS_MUX_H
-
-#define LS1X_MUX_REG(x) \
- ((void __iomem *)KSEG1ADDR(LS1X_MUX_BASE + (x)))
-
-#define LS1X_MUX_CTRL0 LS1X_MUX_REG(0x0)
-#define LS1X_MUX_CTRL1 LS1X_MUX_REG(0x4)
-
-#if defined(CONFIG_LOONGSON1_LS1B)
-/* MUX CTRL0 Register Bits */
-#define UART0_USE_PWM23 BIT(28)
-#define UART0_USE_PWM01 BIT(27)
-#define UART1_USE_LCD0_5_6_11 BIT(26)
-#define I2C2_USE_CAN1 BIT(25)
-#define I2C1_USE_CAN0 BIT(24)
-#define NAND3_USE_UART5 BIT(23)
-#define NAND3_USE_UART4 BIT(22)
-#define NAND3_USE_UART1_DAT BIT(21)
-#define NAND3_USE_UART1_CTS BIT(20)
-#define NAND3_USE_PWM23 BIT(19)
-#define NAND3_USE_PWM01 BIT(18)
-#define NAND2_USE_UART5 BIT(17)
-#define NAND2_USE_UART4 BIT(16)
-#define NAND2_USE_UART1_DAT BIT(15)
-#define NAND2_USE_UART1_CTS BIT(14)
-#define NAND2_USE_PWM23 BIT(13)
-#define NAND2_USE_PWM01 BIT(12)
-#define NAND1_USE_UART5 BIT(11)
-#define NAND1_USE_UART4 BIT(10)
-#define NAND1_USE_UART1_DAT BIT(9)
-#define NAND1_USE_UART1_CTS BIT(8)
-#define NAND1_USE_PWM23 BIT(7)
-#define NAND1_USE_PWM01 BIT(6)
-#define GMAC1_USE_UART1 BIT(4)
-#define GMAC1_USE_UART0 BIT(3)
-#define LCD_USE_UART0_DAT BIT(2)
-#define LCD_USE_UART15 BIT(1)
-#define LCD_USE_UART0 BIT(0)
-
-/* MUX CTRL1 Register Bits */
-#define USB_RESET BIT(31)
-#define SPI1_CS_USE_PWM01 BIT(24)
-#define SPI1_USE_CAN BIT(23)
-#define DISABLE_DDR_CONFSPACE BIT(20)
-#define DDR32TO16EN BIT(16)
-#define GMAC1_SHUT BIT(13)
-#define GMAC0_SHUT BIT(12)
-#define USB_SHUT BIT(11)
-#define UART1_3_USE_CAN1 BIT(5)
-#define UART1_2_USE_CAN0 BIT(4)
-#define GMAC1_USE_TXCLK BIT(3)
-#define GMAC0_USE_TXCLK BIT(2)
-#define GMAC1_USE_PWM23 BIT(1)
-#define GMAC0_USE_PWM01 BIT(0)
-
-#elif defined(CONFIG_LOONGSON1_LS1C)
-
-/* SHUT_CTRL Register Bits */
-#define UART_SPLIT GENMASK(31, 30)
-#define OUTPUT_CLK GENMASK(29, 26)
-#define ADC_SHUT BIT(25)
-#define SDIO_SHUT BIT(24)
-#define DMA2_SHUT BIT(23)
-#define DMA1_SHUT BIT(22)
-#define DMA0_SHUT BIT(21)
-#define SPI1_SHUT BIT(20)
-#define SPI0_SHUT BIT(19)
-#define I2C2_SHUT BIT(18)
-#define I2C1_SHUT BIT(17)
-#define I2C0_SHUT BIT(16)
-#define AC97_SHUT BIT(15)
-#define I2S_SHUT BIT(14)
-#define UART3_SHUT BIT(13)
-#define UART2_SHUT BIT(12)
-#define UART1_SHUT BIT(11)
-#define UART0_SHUT BIT(10)
-#define CAN1_SHUT BIT(9)
-#define CAN0_SHUT BIT(8)
-#define ECC_SHUT BIT(7)
-#define GMAC_SHUT BIT(6)
-#define USBHOST_SHUT BIT(5)
-#define USBOTG_SHUT BIT(4)
-#define SDRAM_SHUT BIT(3)
-#define SRAM_SHUT BIT(2)
-#define CAM_SHUT BIT(1)
-#define LCD_SHUT BIT(0)
-
-#define UART_SPLIT_SHIFT 30
-#define OUTPUT_CLK_SHIFT 26
-
-/* MISC_CTRL Register Bits */
-#define USBHOST_RSTN BIT(31)
-#define PHY_INTF_SELI GENMASK(30, 28)
-#define AC97_EN BIT(25)
-#define SDIO_DMA_EN GENMASK(24, 23)
-#define ADC_DMA_EN BIT(22)
-#define SDIO_USE_SPI1 BIT(17)
-#define SDIO_USE_SPI0 BIT(16)
-#define SRAM_CTRL GENMASK(15, 0)
-
-#define PHY_INTF_SELI_SHIFT 28
-#define SDIO_DMA_EN_SHIFT 23
-#define SRAM_CTRL_SHIFT 0
-
-#define LS1X_CBUS_REG(n, x) \
- ((void __iomem *)KSEG1ADDR(LS1X_CBUS_BASE + (n * 0x04) + (x)))
-
-#define LS1X_CBUS_FIRST(n) LS1X_CBUS_REG(n, 0x00)
-#define LS1X_CBUS_SECOND(n) LS1X_CBUS_REG(n, 0x10)
-#define LS1X_CBUS_THIRD(n) LS1X_CBUS_REG(n, 0x20)
-#define LS1X_CBUS_FOURTHT(n) LS1X_CBUS_REG(n, 0x30)
-#define LS1X_CBUS_FIFTHT(n) LS1X_CBUS_REG(n, 0x40)
-
-#endif
-
-#endif /* __ASM_MACH_LOONGSON32_REGS_MUX_H */
diff --git a/arch/mips/loongson32/Kconfig b/arch/mips/loongson32/Kconfig
index 75c1f4061700..22449d57f744 100644
--- a/arch/mips/loongson32/Kconfig
+++ b/arch/mips/loongson32/Kconfig
@@ -6,20 +6,12 @@ choice

config MACH_LSGZ_1B_DEV
bool "LSGZ 1B DEV board"
- select LOONGSON1_LS1B
help
Enable this to include the FDT for the LSGZ 1B DEV board.

config MACH_SMARTLOONG_1C
bool "Smartloong 1C board"
- select LOONGSON1_LS1C
help
Enable this to include the FDT for the Smartloong 1C board.

endchoice
-
-config LOONGSON1_LS1B
- bool
-
-config LOONGSON1_LS1C
- bool
diff --git a/arch/mips/loongson32/Makefile b/arch/mips/loongson32/Makefile
index 2d1b985dad71..53a97b2b8d77 100644
--- a/arch/mips/loongson32/Makefile
+++ b/arch/mips/loongson32/Makefile
@@ -4,16 +4,3 @@
#

obj-$(CONFIG_MACH_LOONGSON32) += init.o proc.o
-obj-$(CONFIG_MACH_LOONGSON32) += common/
-
-#
-# Loongson LS1B board
-#
-
-obj-$(CONFIG_LOONGSON1_LS1B) += ls1b/
-
-#
-# Loongson LS1C board
-#
-
-obj-$(CONFIG_LOONGSON1_LS1C) += ls1c/
diff --git a/arch/mips/loongson32/common/Makefile b/arch/mips/loongson32/common/Makefile
deleted file mode 100644
index 25e54b4fca7c..000000000000
--- a/arch/mips/loongson32/common/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# Makefile for common code of loongson1 based machines.
-#
-
-obj-y += platform.o
diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
deleted file mode 100644
index 9783c34f39b4..000000000000
--- a/arch/mips/loongson32/common/platform.c
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (c) 2011-2016 Zhang, Keguang <[email protected]>
- */
-
-#include <linux/clk.h>
-#include <linux/dma-mapping.h>
-#include <linux/err.h>
-#include <linux/mtd/partitions.h>
-#include <linux/sizes.h>
-#include <linux/usb/ehci_pdriver.h>
-
-#include <platform.h>
-#include <loongson1.h>
-#include <dma.h>
-#include <nand.h>
-#include <irq.h>
diff --git a/arch/mips/loongson32/ls1b/Makefile b/arch/mips/loongson32/ls1b/Makefile
deleted file mode 100644
index 33c574dc0f7f..000000000000
--- a/arch/mips/loongson32/ls1b/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# Makefile for loongson1B based machines.
-#
-
-obj-y += board.o
diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
deleted file mode 100644
index ff28f44fa687..000000000000
--- a/arch/mips/loongson32/ls1b/board.c
+++ /dev/null
@@ -1,24 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (c) 2011-2016 Zhang, Keguang <[email protected]>
- */
-
-#include <linux/leds.h>
-#include <linux/mtd/partitions.h>
-#include <linux/sizes.h>
-
-#include <loongson1.h>
-#include <dma.h>
-#include <nand.h>
-#include <platform.h>
-
-static struct platform_device *ls1b_platform_devices[] __initdata = {
-};
-
-static int __init ls1b_platform_init(void)
-{
- return platform_add_devices(ls1b_platform_devices,
- ARRAY_SIZE(ls1b_platform_devices));
-}
-
-arch_initcall(ls1b_platform_init);
diff --git a/arch/mips/loongson32/ls1c/Makefile b/arch/mips/loongson32/ls1c/Makefile
deleted file mode 100644
index 1cf3aa264d55..000000000000
--- a/arch/mips/loongson32/ls1c/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# Makefile for loongson1C based machines.
-#
-
-obj-y += board.o
diff --git a/arch/mips/loongson32/ls1c/board.c b/arch/mips/loongson32/ls1c/board.c
deleted file mode 100644
index e0b0eb94077e..000000000000
--- a/arch/mips/loongson32/ls1c/board.c
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (c) 2016 Yang Ling <[email protected]>
- */
-
-#include <platform.h>
-
-static struct platform_device *ls1c_platform_devices[] __initdata = {
-};
-
-static int __init ls1c_platform_init(void)
-{
- return platform_add_devices(ls1c_platform_devices,
- ARRAY_SIZE(ls1c_platform_devices));
-}
-
-arch_initcall(ls1c_platform_init);
--
2.39.2


2023-07-29 14:28:30

by Keguang Zhang

[permalink] [raw]
Subject: [PATCH 09/17] MIPS: loongson32: Convert GPIO platform device to DT

Add GPIO device nodes for Loongson-1 boards,
and drop the legacy platform devices and data accordingly.

Signed-off-by: Keguang Zhang <[email protected]>
---
arch/mips/boot/dts/loongson/loongson1.dtsi | 16 ++++++++++
arch/mips/boot/dts/loongson/loongson1b.dtsi | 10 ++++++
arch/mips/boot/dts/loongson/loongson1c.dtsi | 35 +++++++++++++++++++++
arch/mips/loongson32/common/platform.c | 31 ------------------
arch/mips/loongson32/ls1b/board.c | 2 --
5 files changed, 61 insertions(+), 33 deletions(-)

diff --git a/arch/mips/boot/dts/loongson/loongson1.dtsi b/arch/mips/boot/dts/loongson/loongson1.dtsi
index 48bb786bbf10..abe8170fa1b1 100644
--- a/arch/mips/boot/dts/loongson/loongson1.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson1.dtsi
@@ -72,6 +72,22 @@ intc3: interrupt-controller@1fd01088 {
interrupts = <5>;
};

+ gpio0: gpio@1fd010c0 {
+ compatible = "loongson,ls1x-gpio";
+ reg = <0x1fd010c0 0x4>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio1: gpio@1fd010c4 {
+ compatible = "loongson,ls1x-gpio";
+ reg = <0x1fd010c4 0x4>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
gmac0: ethernet@1fe10000 {
compatible = "snps,dwmac-3.70a";
reg = <0x1fe10000 0x10000>;
diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi
index 42b96c557660..7010d3f3511b 100644
--- a/arch/mips/boot/dts/loongson/loongson1b.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson1b.dtsi
@@ -10,6 +10,8 @@ / {
aliases {
ethernet0 = &gmac0;
ethernet1 = &gmac1;
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
};

cpus {
@@ -110,6 +112,14 @@ phy1: ethernet-phy@0 {
};
};

+&gpio0 {
+ ngpios = <31>;
+};
+
+&gpio1 {
+ ngpios = <30>;
+};
+
&gmac0 {
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;

diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/dts/loongson/loongson1c.dtsi
index 5b3e0f9280f6..a5bc2c5093ca 100644
--- a/arch/mips/boot/dts/loongson/loongson1c.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson1c.dtsi
@@ -7,6 +7,13 @@
#include "loongson1.dtsi"

/ {
+ aliases {
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ gpio3 = &gpio3;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -39,6 +46,34 @@ intc4: interrupt-controller@1fd010a0 {
interrupt-parent = <&cpu_intc>;
interrupts = <6>;
};
+
+ gpio2: gpio@1fd010c8 {
+ compatible = "loongson,ls1x-gpio";
+ reg = <0x1fd010c8 0x4>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ ngpios = <32>;
+ };
+
+ gpio3: gpio@1fd010cc {
+ compatible = "loongson,ls1x-gpio";
+ reg = <0x1fd010cc 0x4>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ ngpios = <32>;
+ };
+};
+
+&gpio0 {
+ ngpios = <32>;
+};
+
+&gpio1 {
+ ngpios = <32>;
};

&gmac0 {
diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
index 817518531b9b..37302bcfb9ab 100644
--- a/arch/mips/loongson32/common/platform.c
+++ b/arch/mips/loongson32/common/platform.c
@@ -16,37 +16,6 @@
#include <nand.h>
#include <irq.h>

-/* GPIO */
-static struct resource ls1x_gpio0_resources[] = {
- [0] = {
- .start = LS1X_GPIO0_BASE,
- .end = LS1X_GPIO0_BASE + SZ_4 - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device ls1x_gpio0_pdev = {
- .name = "ls1x-gpio",
- .id = 0,
- .num_resources = ARRAY_SIZE(ls1x_gpio0_resources),
- .resource = ls1x_gpio0_resources,
-};
-
-static struct resource ls1x_gpio1_resources[] = {
- [0] = {
- .start = LS1X_GPIO1_BASE,
- .end = LS1X_GPIO1_BASE + SZ_4 - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device ls1x_gpio1_pdev = {
- .name = "ls1x-gpio",
- .id = 1,
- .num_resources = ARRAY_SIZE(ls1x_gpio1_resources),
- .resource = ls1x_gpio1_resources,
-};
-
/* USB EHCI */
static u64 ls1x_ehci_dmamask = DMA_BIT_MASK(32);

diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
index f23e4e5c96ee..baadc524cc88 100644
--- a/arch/mips/loongson32/ls1b/board.c
+++ b/arch/mips/loongson32/ls1b/board.c
@@ -35,8 +35,6 @@ static const struct gpio_led_platform_data ls1x_led_pdata __initconst = {

static struct platform_device *ls1b_platform_devices[] __initdata = {
&ls1x_ehci_pdev,
- &ls1x_gpio0_pdev,
- &ls1x_gpio1_pdev,
&ls1x_rtc_pdev,
&ls1x_wdt_pdev,
};
--
2.39.2


2023-07-29 14:31:34

by Keguang Zhang

[permalink] [raw]
Subject: [PATCH 07/17] MIPS: loongson32: Convert UART platform device to DT

Add UART device nodes for Loongson-1 boards,
and drop the legacy platform devices and data accordingly.

Signed-off-by: Keguang Zhang <[email protected]>
---
arch/mips/boot/dts/loongson/loongson1.dtsi | 54 +++++++++++++++++++
arch/mips/boot/dts/loongson/loongson1b.dtsi | 12 +++++
arch/mips/boot/dts/loongson/loongson1c.dtsi | 12 +++++
arch/mips/boot/dts/loongson/lsgz_1b_dev.dts | 20 +++++++
arch/mips/boot/dts/loongson/smartloong_1c.dts | 20 +++++++
arch/mips/loongson32/common/platform.c | 44 ---------------
arch/mips/loongson32/ls1b/board.c | 3 --
arch/mips/loongson32/ls1c/board.c | 3 --
8 files changed, 118 insertions(+), 50 deletions(-)

diff --git a/arch/mips/boot/dts/loongson/loongson1.dtsi b/arch/mips/boot/dts/loongson/loongson1.dtsi
index 711c88fd2781..c77aa2d0f66c 100644
--- a/arch/mips/boot/dts/loongson/loongson1.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson1.dtsi
@@ -72,4 +72,58 @@ intc3: interrupt-controller@1fd01088 {
interrupts = <5>;
};
};
+
+ apb: bus@1fe40000 {
+ compatible = "simple-bus";
+ reg = <0x1fe40000 0x40000>;
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ uart0: serial@1fe40000 {
+ compatible = "ns16550a";
+ reg = <0x1fe40000 0x8>;
+
+ interrupt-parent = <&intc0>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&clkc LS1X_CLKID_APB>;
+
+ status = "disabled";
+ };
+
+ uart1: serial@1fe44000 {
+ compatible = "ns16550a";
+ reg = <0x1fe44000 0x8>;
+
+ interrupt-parent = <&intc0>;
+
+ clocks = <&clkc LS1X_CLKID_APB>;
+
+ status = "disabled";
+ };
+
+ uart2: serial@1fe48000 {
+ compatible = "ns16550a";
+ reg = <0x1fe48000 0x8>;
+
+ interrupt-parent = <&intc0>;
+
+ clocks = <&clkc LS1X_CLKID_APB>;
+
+ status = "disabled";
+ };
+
+ uart3: serial@1fe4c000 {
+ compatible = "ns16550a";
+ reg = <0x1fe4c000 0x8>;
+
+ interrupt-parent = <&intc0>;
+
+ clocks = <&clkc LS1X_CLKID_APB>;
+
+ status = "disabled";
+ };
+ };
};
diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi
index 784ae9b6572d..437a77cee163 100644
--- a/arch/mips/boot/dts/loongson/loongson1b.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson1b.dtsi
@@ -73,3 +73,15 @@ clkc: clock-controller@1fe78030 {
#clock-cells = <1>;
};
};
+
+&uart1 {
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&uart2 {
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&uart3 {
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
+};
diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/dts/loongson/loongson1c.dtsi
index 8570c4c72677..1dd575b7b2f9 100644
--- a/arch/mips/boot/dts/loongson/loongson1c.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson1c.dtsi
@@ -40,3 +40,15 @@ intc4: interrupt-controller@1fd010a0 {
interrupts = <6>;
};
};
+
+&uart1 {
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&uart2 {
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&uart3 {
+ interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;
+};
diff --git a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
index d12c723b0a2b..89c3dfa574f7 100644
--- a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
+++ b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
@@ -11,6 +11,10 @@ / {
compatible = "loongson,lsgz-1b-dev", "loongson,ls1b";
model = "LSGZ_1B_DEV Board";

+ chosen {
+ bootargs = "console=ttyS2,115200";
+ };
+
memory@0 {
device_type = "memory";
reg = <0x0 0x4000000>;
@@ -23,3 +27,19 @@ xtal: xtal {
#clock-cells = <0>;
};
};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&uart3 {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/loongson/smartloong_1c.dts b/arch/mips/boot/dts/loongson/smartloong_1c.dts
index 64e869acfd86..188aab9e3685 100644
--- a/arch/mips/boot/dts/loongson/smartloong_1c.dts
+++ b/arch/mips/boot/dts/loongson/smartloong_1c.dts
@@ -11,6 +11,10 @@ / {
compatible = "loongmasses,smartloong-1c", "loongson,ls1c";
model = "Smartloong_1C Board";

+ chosen {
+ bootargs = "console=ttyS2,115200";
+ };
+
memory@0 {
device_type = "memory";
reg = <0x0 0x2000000>;
@@ -23,3 +27,19 @@ xtal: xtal {
#clock-cells = <0>;
};
};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&uart3 {
+ status = "okay";
+};
diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
index 8075590a9f83..8272b4133e25 100644
--- a/arch/mips/loongson32/common/platform.c
+++ b/arch/mips/loongson32/common/platform.c
@@ -9,7 +9,6 @@
#include <linux/mtd/partitions.h>
#include <linux/sizes.h>
#include <linux/phy.h>
-#include <linux/serial_8250.h>
#include <linux/stmmac.h>
#include <linux/usb/ehci_pdriver.h>

@@ -18,49 +17,6 @@
#include <dma.h>
#include <nand.h>

-/* 8250/16550 compatible UART */
-#define LS1X_UART(_id) \
- { \
- .mapbase = LS1X_UART ## _id ## _BASE, \
- .irq = LS1X_UART ## _id ## _IRQ, \
- .iotype = UPIO_MEM, \
- .flags = UPF_IOREMAP | UPF_FIXED_TYPE, \
- .type = PORT_16550A, \
- }
-
-static struct plat_serial8250_port ls1x_serial8250_pdata[] = {
- LS1X_UART(0),
- LS1X_UART(1),
- LS1X_UART(2),
- LS1X_UART(3),
- {},
-};
-
-struct platform_device ls1x_uart_pdev = {
- .name = "serial8250",
- .id = PLAT8250_DEV_PLATFORM,
- .dev = {
- .platform_data = ls1x_serial8250_pdata,
- },
-};
-
-void __init ls1x_serial_set_uartclk(struct platform_device *pdev)
-{
- struct clk *clk;
- struct plat_serial8250_port *p;
-
- clk = clk_get(&pdev->dev, pdev->name);
- if (IS_ERR(clk)) {
- pr_err("unable to get %s clock, err=%ld",
- pdev->name, PTR_ERR(clk));
- return;
- }
- clk_prepare_enable(clk);
-
- for (p = pdev->dev.platform_data; p->flags != 0; ++p)
- p->uartclk = clk_get_rate(clk);
-}
-
/* Synopsys Ethernet GMAC */
static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = {
.phy_mask = 0,
diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
index fed8d432ef20..e8290f200096 100644
--- a/arch/mips/loongson32/ls1b/board.c
+++ b/arch/mips/loongson32/ls1b/board.c
@@ -34,7 +34,6 @@ static const struct gpio_led_platform_data ls1x_led_pdata __initconst = {
};

static struct platform_device *ls1b_platform_devices[] __initdata = {
- &ls1x_uart_pdev,
&ls1x_eth0_pdev,
&ls1x_eth1_pdev,
&ls1x_ehci_pdev,
@@ -46,8 +45,6 @@ static struct platform_device *ls1b_platform_devices[] __initdata = {

static int __init ls1b_platform_init(void)
{
- ls1x_serial_set_uartclk(&ls1x_uart_pdev);
-
gpio_led_register_device(-1, &ls1x_led_pdata);

return platform_add_devices(ls1b_platform_devices,
diff --git a/arch/mips/loongson32/ls1c/board.c b/arch/mips/loongson32/ls1c/board.c
index 9dcfe9de55b0..a7096964fb30 100644
--- a/arch/mips/loongson32/ls1c/board.c
+++ b/arch/mips/loongson32/ls1c/board.c
@@ -6,7 +6,6 @@
#include <platform.h>

static struct platform_device *ls1c_platform_devices[] __initdata = {
- &ls1x_uart_pdev,
&ls1x_eth0_pdev,
&ls1x_rtc_pdev,
&ls1x_wdt_pdev,
@@ -14,8 +13,6 @@ static struct platform_device *ls1c_platform_devices[] __initdata = {

static int __init ls1c_platform_init(void)
{
- ls1x_serial_set_uartclk(&ls1x_uart_pdev);
-
return platform_add_devices(ls1c_platform_devices,
ARRAY_SIZE(ls1c_platform_devices));
}
--
2.39.2


2023-07-29 14:33:05

by Keguang Zhang

[permalink] [raw]
Subject: [PATCH 05/17] MIPS: loongson32: Adapt the common code to support DT

Adapt the initial functions to support devicetree.
And introduce init.c to collect these initial functions.

Signed-off-by: Keguang Zhang <[email protected]>
---
arch/mips/loongson32/Makefile | 2 +-
arch/mips/loongson32/common/Makefile | 2 +-
arch/mips/loongson32/common/prom.c | 42 ---------------
arch/mips/loongson32/common/time.c | 23 --------
arch/mips/loongson32/init.c | 78 ++++++++++++++++++++++++++++
5 files changed, 80 insertions(+), 67 deletions(-)
delete mode 100644 arch/mips/loongson32/common/prom.c
delete mode 100644 arch/mips/loongson32/common/time.c
create mode 100644 arch/mips/loongson32/init.c

diff --git a/arch/mips/loongson32/Makefile b/arch/mips/loongson32/Makefile
index c3881af369e9..2d1b985dad71 100644
--- a/arch/mips/loongson32/Makefile
+++ b/arch/mips/loongson32/Makefile
@@ -3,7 +3,7 @@
# Common code for all Loongson 1 based systems
#

-obj-$(CONFIG_MACH_LOONGSON32) += proc.o
+obj-$(CONFIG_MACH_LOONGSON32) += init.o proc.o
obj-$(CONFIG_MACH_LOONGSON32) += common/

#
diff --git a/arch/mips/loongson32/common/Makefile b/arch/mips/loongson32/common/Makefile
index b44527b1a178..b5c2f4e0f4cc 100644
--- a/arch/mips/loongson32/common/Makefile
+++ b/arch/mips/loongson32/common/Makefile
@@ -3,4 +3,4 @@
# Makefile for common code of loongson1 based machines.
#

-obj-y += time.o irq.o platform.o prom.o
+obj-y += irq.o platform.o
diff --git a/arch/mips/loongson32/common/prom.c b/arch/mips/loongson32/common/prom.c
deleted file mode 100644
index fc580a22748e..000000000000
--- a/arch/mips/loongson32/common/prom.c
+++ /dev/null
@@ -1,42 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (c) 2011 Zhang, Keguang <[email protected]>
- *
- * Modified from arch/mips/pnx833x/common/prom.c.
- */
-
-#include <linux/io.h>
-#include <linux/init.h>
-#include <linux/memblock.h>
-#include <linux/serial_reg.h>
-#include <asm/fw/fw.h>
-
-#include <loongson1.h>
-
-unsigned long memsize;
-
-void __init prom_init(void)
-{
- void __iomem *uart_base;
-
- fw_init_cmdline();
-
- memsize = fw_getenvl("memsize");
- if(!memsize)
- memsize = DEFAULT_MEMSIZE;
-
- if (strstr(arcs_cmdline, "console=ttyS3"))
- uart_base = ioremap(LS1X_UART3_BASE, 0x0f);
- else if (strstr(arcs_cmdline, "console=ttyS2"))
- uart_base = ioremap(LS1X_UART2_BASE, 0x0f);
- else if (strstr(arcs_cmdline, "console=ttyS1"))
- uart_base = ioremap(LS1X_UART1_BASE, 0x0f);
- else
- uart_base = ioremap(LS1X_UART0_BASE, 0x0f);
- setup_8250_early_printk_port((unsigned long)uart_base, 0, 0);
-}
-
-void __init plat_mem_setup(void)
-{
- memblock_add(0x0, (memsize << 20));
-}
diff --git a/arch/mips/loongson32/common/time.c b/arch/mips/loongson32/common/time.c
deleted file mode 100644
index 74ad2b17918d..000000000000
--- a/arch/mips/loongson32/common/time.c
+++ /dev/null
@@ -1,23 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (c) 2014 Zhang, Keguang <[email protected]>
- */
-
-#include <linux/clk.h>
-#include <linux/of_clk.h>
-#include <asm/time.h>
-
-void __init plat_time_init(void)
-{
- struct clk *clk = NULL;
-
- /* initialize LS1X clocks */
- of_clk_init(NULL);
-
- /* setup mips r4k timer */
- clk = clk_get(NULL, "cpu_clk");
- if (IS_ERR(clk))
- panic("unable to get cpu clock, err=%ld", PTR_ERR(clk));
-
- mips_hpt_frequency = clk_get_rate(clk) / 2;
-}
diff --git a/arch/mips/loongson32/init.c b/arch/mips/loongson32/init.c
new file mode 100644
index 000000000000..1aada785a4a3
--- /dev/null
+++ b/arch/mips/loongson32/init.c
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2011-2023 Keguang Zhang <[email protected]>
+ */
+
+#include <linux/clk.h>
+#include <linux/clocksource.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irqchip.h>
+#include <linux/of.h>
+#include <linux/of_clk.h>
+#include <asm/bootinfo.h>
+#include <asm/fw/fw.h>
+#include <asm/prom.h>
+#include <asm/time.h>
+
+#define LS1X_UART0_BASE 0x1fe40000
+#define LS1X_UART1_BASE 0x1fe44000
+#define LS1X_UART2_BASE 0x1fe48000
+#define LS1X_UART3_BASE 0x1fe4c000
+
+void __init prom_init(void)
+{
+ void __iomem *uart_base;
+
+ fw_init_cmdline();
+
+ if (strstr(arcs_cmdline, "console=ttyS3"))
+ uart_base = ioremap(LS1X_UART3_BASE, 0x0f);
+ else if (strstr(arcs_cmdline, "console=ttyS2"))
+ uart_base = ioremap(LS1X_UART2_BASE, 0x0f);
+ else if (strstr(arcs_cmdline, "console=ttyS1"))
+ uart_base = ioremap(LS1X_UART1_BASE, 0x0f);
+ else
+ uart_base = ioremap(LS1X_UART0_BASE, 0x0f);
+ setup_8250_early_printk_port((unsigned long)uart_base, 0, 0);
+}
+
+void __init plat_mem_setup(void)
+{
+ void *dtb;
+
+ dtb = get_fdt();
+ if (!dtb) {
+ pr_err("No DTB found\n");
+ return;
+ }
+
+ __dt_setup_arch(dtb);
+}
+
+void __init plat_time_init(void)
+{
+ struct clk *clk = NULL;
+ struct device_node *np;
+
+ /* Initialize LS1X clocks */
+ of_clk_init(NULL);
+
+ np = of_get_cpu_node(0, NULL);
+ if (!np) {
+ pr_err("Failed to get CPU node\n");
+ return;
+ }
+
+ /* Setup MIPS r4k timer */
+ clk = of_clk_get(np, 0);
+ if (IS_ERR(clk)) {
+ pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
+ return;
+ }
+
+ mips_hpt_frequency = clk_get_rate(clk) / 2;
+ clk_put(clk);
+
+ timer_probe();
+}
--
2.39.2


2023-07-29 14:33:51

by Keguang Zhang

[permalink] [raw]
Subject: [PATCH 17/17] MIPS: configs: Update and rename loongson1c_defconfig

Rename the loongson1c_defconfig to the board name.
Update the following options:
- Enable CONFIG_SERIAL_OF_PLATFORM
- Enable CONFIG_RTC_DRV_LOONGSON
- Disable unnecessary options

Signed-off-by: Keguang Zhang <[email protected]>
---
...on1c_defconfig => smartloong_1c_defconfig} | 71 ++++++++++++++-----
1 file changed, 55 insertions(+), 16 deletions(-)
rename arch/mips/configs/{loongson1c_defconfig => smartloong_1c_defconfig} (59%)

diff --git a/arch/mips/configs/loongson1c_defconfig b/arch/mips/configs/smartloong_1c_defconfig
similarity index 59%
rename from arch/mips/configs/loongson1c_defconfig
rename to arch/mips/configs/smartloong_1c_defconfig
index c3910a9dee9e..48296595425d 100644
--- a/arch/mips/configs/loongson1c_defconfig
+++ b/arch/mips/configs/smartloong_1c_defconfig
@@ -1,7 +1,6 @@
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_KERNEL_XZ=y
CONFIG_SYSVIPC=y
-CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
@@ -12,16 +11,17 @@ CONFIG_NAMESPACES=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_EXPERT=y
CONFIG_PERF_EVENTS=y
-# CONFIG_COMPAT_BRK is not set
CONFIG_MACH_LOONGSON32=y
-CONFIG_LOONGSON1_LS1C=y
-# CONFIG_SECCOMP is not set
+CONFIG_MACH_SMARTLOONG_1C=y
# CONFIG_SUSPEND is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_GCC_PLUGINS is not set
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLOCK_LEGACY_AUTOLOAD is not set
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_COMPAT_BRK is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
@@ -44,17 +44,50 @@ CONFIG_BLK_DEV_LOOP=y
CONFIG_SCSI=m
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=m
+# CONFIG_BLK_DEV_BSG is not set
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_ALACRITECH is not set
+# CONFIG_NET_VENDOR_AMAZON is not set
+# CONFIG_NET_VENDOR_AQUANTIA is not set
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_ASIX is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CADENCE is not set
+# CONFIG_NET_VENDOR_CAVIUM is not set
+# CONFIG_NET_VENDOR_CORTINA is not set
+# CONFIG_NET_VENDOR_DAVICOM is not set
+# CONFIG_NET_VENDOR_ENGLEDER is not set
+# CONFIG_NET_VENDOR_EZCHIP is not set
+# CONFIG_NET_VENDOR_FUNGIBLE is not set
+# CONFIG_NET_VENDOR_GOOGLE is not set
+# CONFIG_NET_VENDOR_HUAWEI is not set
# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_LITEX is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_MICROSEMI is not set
+# CONFIG_NET_VENDOR_MICROSOFT is not set
+# CONFIG_NET_VENDOR_NI is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_NETRONOME is not set
+# CONFIG_NET_VENDOR_PENSANDO is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_RENESAS is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_SOCIONEXT is not set
CONFIG_STMMAC_ETH=y
+# CONFIG_NET_VENDOR_SYNOPSYS is not set
+# CONFIG_NET_VENDOR_VERTEXCOM is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WANGXUN is not set
# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_NET_VENDOR_XILINX is not set
# CONFIG_WLAN is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set
@@ -64,7 +97,9 @@ CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_LEGACY_PTY_COUNT=8
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set
+# CONFIG_PTP_1588_CLOCK is not set
CONFIG_GPIOLIB=y
CONFIG_GPIO_LOONGSON1=y
# CONFIG_HWMON is not set
@@ -89,15 +124,14 @@ CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_LOONGSON1=y
+CONFIG_RTC_DRV_LOONGSON=y
+# CONFIG_VIRTIO_MENU is not set
+# CONFIG_VHOST_MENU is not set
+# CONFIG_MIPS_PLATFORM_DEVICES is not set
# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
# CONFIG_DNOTIFY is not set
CONFIG_VFAT_FS=y
CONFIG_PROC_KCORE=y
@@ -110,12 +144,17 @@ CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_ISO8859_1=m
-# CONFIG_CRYPTO_ECHAINIV is not set
# CONFIG_CRYPTO_HW is not set
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_ARM is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_SPARC is not set
CONFIG_DYNAMIC_DEBUG=y
-CONFIG_DEBUG_FS=y
+# CONFIG_DEBUG_MISC is not set
CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
-# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
# CONFIG_EARLY_PRINTK is not set
--
2.39.2


2023-07-29 14:39:54

by Keguang Zhang

[permalink] [raw]
Subject: [PATCH 14/17] mips: dts: loongson1b: Add PWM timer clocksource

Add the device node of PWM timer clocksource
for Loongson-1B boards.

Signed-off-by: Keguang Zhang <[email protected]>
---
arch/mips/boot/dts/loongson/loongson1b.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi
index d7f5cebae0a9..624eb179b6f5 100644
--- a/arch/mips/boot/dts/loongson/loongson1b.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson1b.dtsi
@@ -79,6 +79,16 @@ clkc: clock-controller@1fe78030 {
clocks = <&xtal>;
#clock-cells = <1>;
};
+
+ clocksource: timer@1fe5c030 {
+ compatible = "loongson,ls1b-pwmtimer";
+ reg = <0x1fe5c030 0x10>;
+
+ clocks = <&clkc LS1X_CLKID_APB>;
+
+ interrupt-parent = <&intc0>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
+ };
};

&ahb {
--
2.39.2


2023-07-29 14:40:35

by Keguang Zhang

[permalink] [raw]
Subject: [PATCH 12/17] MIPS: loongson32: Convert RTC platform device to DT

Add RTC device node for Loongson-1 boards,
and drop the legacy platform device and data accordingly.

Signed-off-by: Keguang Zhang <[email protected]>
---
arch/mips/boot/dts/loongson/loongson1b.dtsi | 12 ++++++++++++
arch/mips/boot/dts/loongson/loongson1c.dtsi | 9 +++++++++
arch/mips/boot/dts/loongson/lsgz_1b_dev.dts | 4 ++++
arch/mips/boot/dts/loongson/smartloong_1c.dts | 4 ++++
arch/mips/loongson32/common/platform.c | 6 ------
arch/mips/loongson32/ls1b/board.c | 1 -
arch/mips/loongson32/ls1c/board.c | 1 -
7 files changed, 29 insertions(+), 8 deletions(-)

diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi
index 7b4914c358df..935e559016d6 100644
--- a/arch/mips/boot/dts/loongson/loongson1b.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson1b.dtsi
@@ -132,6 +132,18 @@ phy1: ethernet-phy@0 {
};
};

+&apb {
+ rtc: rtc@1fe64000 {
+ compatible = "loongson,ls1b-rtc";
+ reg = <0x1fe64000 0x78>;
+
+ interrupt-parent = <&intc0>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+};
+
&gpio0 {
ngpios = <31>;
};
diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/dts/loongson/loongson1c.dtsi
index 7204b829c801..f68bef1f65d3 100644
--- a/arch/mips/boot/dts/loongson/loongson1c.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson1c.dtsi
@@ -88,6 +88,15 @@ ohci0: usb@1fe28000 {
};
};

+&apb {
+ rtc: rtc@1fe64000 {
+ compatible = "loongson,ls1c-rtc";
+ reg = <0x1fe64000 0x78>;
+
+ status = "disabled";
+ };
+};
+
&gpio0 {
ngpios = <32>;
};
diff --git a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
index 71838f867f8c..d3988d789c0f 100644
--- a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
+++ b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
@@ -63,6 +63,10 @@ &ohci0 {
status = "okay";
};

+&rtc {
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/loongson/smartloong_1c.dts b/arch/mips/boot/dts/loongson/smartloong_1c.dts
index 3277770c33fe..1b7741dcb87f 100644
--- a/arch/mips/boot/dts/loongson/smartloong_1c.dts
+++ b/arch/mips/boot/dts/loongson/smartloong_1c.dts
@@ -59,6 +59,10 @@ &ohci0 {
status = "okay";
};

+&rtc {
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
index 3b984c805eb0..7d0120fe9a5b 100644
--- a/arch/mips/loongson32/common/platform.c
+++ b/arch/mips/loongson32/common/platform.c
@@ -16,12 +16,6 @@
#include <nand.h>
#include <irq.h>

-/* Real Time Clock */
-struct platform_device ls1x_rtc_pdev = {
- .name = "ls1x-rtc",
- .id = -1,
-};
-
/* Watchdog */
static struct resource ls1x_wdt_resources[] = {
{
diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
index ecc405aa9016..59c70c7ffe1a 100644
--- a/arch/mips/loongson32/ls1b/board.c
+++ b/arch/mips/loongson32/ls1b/board.c
@@ -13,7 +13,6 @@
#include <platform.h>

static struct platform_device *ls1b_platform_devices[] __initdata = {
- &ls1x_rtc_pdev,
&ls1x_wdt_pdev,
};

diff --git a/arch/mips/loongson32/ls1c/board.c b/arch/mips/loongson32/ls1c/board.c
index 29bc467fd149..4c2d44f9f6f2 100644
--- a/arch/mips/loongson32/ls1c/board.c
+++ b/arch/mips/loongson32/ls1c/board.c
@@ -6,7 +6,6 @@
#include <platform.h>

static struct platform_device *ls1c_platform_devices[] __initdata = {
- &ls1x_rtc_pdev,
&ls1x_wdt_pdev,
};

--
2.39.2


2023-07-29 15:06:08

by Keguang Zhang

[permalink] [raw]
Subject: [PATCH 08/17] MIPS: loongson32: Convert Ethernet platform device to DT

Add Ethernet device nodes for Loongson-1 boards,
and drop the legacy platform devices and data accordingly.

Signed-off-by: Keguang Zhang <[email protected]>
---
arch/mips/boot/dts/loongson/loongson1.dtsi | 16 ++
arch/mips/boot/dts/loongson/loongson1b.dtsi | 53 +++++++
arch/mips/boot/dts/loongson/loongson1c.dtsi | 17 ++
arch/mips/boot/dts/loongson/lsgz_1b_dev.dts | 8 +
arch/mips/boot/dts/loongson/smartloong_1c.dts | 4 +
arch/mips/loongson32/common/platform.c | 146 +-----------------
arch/mips/loongson32/ls1b/board.c | 2 -
arch/mips/loongson32/ls1c/board.c | 1 -
8 files changed, 99 insertions(+), 148 deletions(-)

diff --git a/arch/mips/boot/dts/loongson/loongson1.dtsi b/arch/mips/boot/dts/loongson/loongson1.dtsi
index c77aa2d0f66c..48bb786bbf10 100644
--- a/arch/mips/boot/dts/loongson/loongson1.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson1.dtsi
@@ -71,6 +71,22 @@ intc3: interrupt-controller@1fd01088 {
interrupt-parent = <&cpu_intc>;
interrupts = <5>;
};
+
+ gmac0: ethernet@1fe10000 {
+ compatible = "snps,dwmac-3.70a";
+ reg = <0x1fe10000 0x10000>;
+
+ interrupt-parent = <&intc1>;
+ interrupt-names = "macirq";
+
+ clocks = <&clkc LS1X_CLKID_AHB>;
+ clock-names = "stmmaceth";
+
+ snps,pbl = <1>;
+
+ status = "disabled";
+ };
+
};

apb: bus@1fe40000 {
diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi
index 437a77cee163..42b96c557660 100644
--- a/arch/mips/boot/dts/loongson/loongson1b.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson1b.dtsi
@@ -7,6 +7,11 @@
#include "loongson1.dtsi"

/ {
+ aliases {
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -74,6 +79,54 @@ clkc: clock-controller@1fe78030 {
};
};

+&ahb {
+ gmac1: ethernet@1fe20000 {
+ compatible = "snps,dwmac-3.70a";
+ reg = <0x1fe20000 0x10000>;
+
+ interrupt-parent = <&intc1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+
+ clocks = <&clkc LS1X_CLKID_AHB>;
+ clock-names = "stmmaceth";
+
+ phy-handle = <&phy1>;
+ phy-mode = "mii";
+
+ snps,pbl = <1>;
+
+ status = "disabled";
+
+ mdio1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+
+ phy1: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ };
+ };
+};
+
+&gmac0 {
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+
+ phy-handle = <&phy0>;
+ phy-mode = "mii";
+
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ };
+};
+
&uart1 {
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
};
diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/dts/loongson/loongson1c.dtsi
index 1dd575b7b2f9..5b3e0f9280f6 100644
--- a/arch/mips/boot/dts/loongson/loongson1c.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson1c.dtsi
@@ -41,6 +41,23 @@ intc4: interrupt-controller@1fd010a0 {
};
};

+&gmac0 {
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+
+ phy-handle = <&phy0>;
+ phy-mode = "rmii";
+
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+
+ phy0: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+ };
+};
+
&uart1 {
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
};
diff --git a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
index 89c3dfa574f7..a43df21f2904 100644
--- a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
+++ b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
@@ -28,6 +28,14 @@ xtal: xtal {
};
};

+&gmac0 {
+ status = "okay";
+};
+
+&gmac1 {
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/mips/boot/dts/loongson/smartloong_1c.dts b/arch/mips/boot/dts/loongson/smartloong_1c.dts
index 188aab9e3685..2d8f304aa2c4 100644
--- a/arch/mips/boot/dts/loongson/smartloong_1c.dts
+++ b/arch/mips/boot/dts/loongson/smartloong_1c.dts
@@ -28,6 +28,10 @@ xtal: xtal {
};
};

+&gmac0 {
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
index 8272b4133e25..817518531b9b 100644
--- a/arch/mips/loongson32/common/platform.c
+++ b/arch/mips/loongson32/common/platform.c
@@ -8,157 +8,13 @@
#include <linux/err.h>
#include <linux/mtd/partitions.h>
#include <linux/sizes.h>
-#include <linux/phy.h>
-#include <linux/stmmac.h>
#include <linux/usb/ehci_pdriver.h>

#include <platform.h>
#include <loongson1.h>
#include <dma.h>
#include <nand.h>
-
-/* Synopsys Ethernet GMAC */
-static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = {
- .phy_mask = 0,
-};
-
-static struct stmmac_dma_cfg ls1x_eth_dma_cfg = {
- .pbl = 1,
-};
-
-int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
-{
- struct plat_stmmacenet_data *plat_dat = NULL;
- u32 val;
-
- val = __raw_readl(LS1X_MUX_CTRL1);
-
-#if defined(CONFIG_LOONGSON1_LS1B)
- plat_dat = dev_get_platdata(&pdev->dev);
- if (plat_dat->bus_id) {
- __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
- GMAC1_USE_UART0, LS1X_MUX_CTRL0);
- switch (plat_dat->phy_interface) {
- case PHY_INTERFACE_MODE_RGMII:
- val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
- break;
- case PHY_INTERFACE_MODE_MII:
- val |= (GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
- break;
- default:
- pr_err("unsupported mii mode %d\n",
- plat_dat->phy_interface);
- return -ENOTSUPP;
- }
- val &= ~GMAC1_SHUT;
- } else {
- switch (plat_dat->phy_interface) {
- case PHY_INTERFACE_MODE_RGMII:
- val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
- break;
- case PHY_INTERFACE_MODE_MII:
- val |= (GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
- break;
- default:
- pr_err("unsupported mii mode %d\n",
- plat_dat->phy_interface);
- return -ENOTSUPP;
- }
- val &= ~GMAC0_SHUT;
- }
- __raw_writel(val, LS1X_MUX_CTRL1);
-#elif defined(CONFIG_LOONGSON1_LS1C)
- plat_dat = dev_get_platdata(&pdev->dev);
-
- val &= ~PHY_INTF_SELI;
- if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
- val |= 0x4 << PHY_INTF_SELI_SHIFT;
- __raw_writel(val, LS1X_MUX_CTRL1);
-
- val = __raw_readl(LS1X_MUX_CTRL0);
- __raw_writel(val & (~GMAC_SHUT), LS1X_MUX_CTRL0);
-#endif
-
- return 0;
-}
-
-static struct plat_stmmacenet_data ls1x_eth0_pdata = {
- .bus_id = 0,
- .phy_addr = -1,
-#if defined(CONFIG_LOONGSON1_LS1B)
- .phy_interface = PHY_INTERFACE_MODE_MII,
-#elif defined(CONFIG_LOONGSON1_LS1C)
- .phy_interface = PHY_INTERFACE_MODE_RMII,
-#endif
- .mdio_bus_data = &ls1x_mdio_bus_data,
- .dma_cfg = &ls1x_eth_dma_cfg,
- .has_gmac = 1,
- .tx_coe = 1,
- .rx_queues_to_use = 1,
- .tx_queues_to_use = 1,
- .init = ls1x_eth_mux_init,
-};
-
-static struct resource ls1x_eth0_resources[] = {
- [0] = {
- .start = LS1X_GMAC0_BASE,
- .end = LS1X_GMAC0_BASE + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "macirq",
- .start = LS1X_GMAC0_IRQ,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device ls1x_eth0_pdev = {
- .name = "stmmaceth",
- .id = 0,
- .num_resources = ARRAY_SIZE(ls1x_eth0_resources),
- .resource = ls1x_eth0_resources,
- .dev = {
- .platform_data = &ls1x_eth0_pdata,
- },
-};
-
-#ifdef CONFIG_LOONGSON1_LS1B
-static struct plat_stmmacenet_data ls1x_eth1_pdata = {
- .bus_id = 1,
- .phy_addr = -1,
- .phy_interface = PHY_INTERFACE_MODE_MII,
- .mdio_bus_data = &ls1x_mdio_bus_data,
- .dma_cfg = &ls1x_eth_dma_cfg,
- .has_gmac = 1,
- .tx_coe = 1,
- .rx_queues_to_use = 1,
- .tx_queues_to_use = 1,
- .init = ls1x_eth_mux_init,
-};
-
-static struct resource ls1x_eth1_resources[] = {
- [0] = {
- .start = LS1X_GMAC1_BASE,
- .end = LS1X_GMAC1_BASE + SZ_64K - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "macirq",
- .start = LS1X_GMAC1_IRQ,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device ls1x_eth1_pdev = {
- .name = "stmmaceth",
- .id = 1,
- .num_resources = ARRAY_SIZE(ls1x_eth1_resources),
- .resource = ls1x_eth1_resources,
- .dev = {
- .platform_data = &ls1x_eth1_pdata,
- },
-};
-#endif /* CONFIG_LOONGSON1_LS1B */
+#include <irq.h>

/* GPIO */
static struct resource ls1x_gpio0_resources[] = {
diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
index e8290f200096..f23e4e5c96ee 100644
--- a/arch/mips/loongson32/ls1b/board.c
+++ b/arch/mips/loongson32/ls1b/board.c
@@ -34,8 +34,6 @@ static const struct gpio_led_platform_data ls1x_led_pdata __initconst = {
};

static struct platform_device *ls1b_platform_devices[] __initdata = {
- &ls1x_eth0_pdev,
- &ls1x_eth1_pdev,
&ls1x_ehci_pdev,
&ls1x_gpio0_pdev,
&ls1x_gpio1_pdev,
diff --git a/arch/mips/loongson32/ls1c/board.c b/arch/mips/loongson32/ls1c/board.c
index a7096964fb30..29bc467fd149 100644
--- a/arch/mips/loongson32/ls1c/board.c
+++ b/arch/mips/loongson32/ls1c/board.c
@@ -6,7 +6,6 @@
#include <platform.h>

static struct platform_device *ls1c_platform_devices[] __initdata = {
- &ls1x_eth0_pdev,
&ls1x_rtc_pdev,
&ls1x_wdt_pdev,
};
--
2.39.2


2023-07-29 16:09:51

by Keguang Zhang

[permalink] [raw]
Subject: [PATCH 02/17] MIPS: Modify the Loongson1 PRID_REV

Because LS1B and LS1C share the same PRID,
it's reasonable to rename their PRID_REVs to PRID_REV_LOONGSON1.

Signed-off-by: Keguang Zhang <[email protected]>
---
arch/mips/include/asm/cpu.h | 3 +--
arch/mips/kernel/cpu-probe.c | 6 +++---
2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index ecb9854cb432..4163b22c0a9a 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -248,8 +248,7 @@
#define PRID_REV_VR4181A 0x0070 /* Same as VR4122 */
#define PRID_REV_VR4130 0x0080
#define PRID_REV_34K_V1_0_2 0x0022
-#define PRID_REV_LOONGSON1B 0x0020
-#define PRID_REV_LOONGSON1C 0x0020 /* Same as Loongson-1B */
+#define PRID_REV_LOONGSON1 0x0020
#define PRID_REV_LOONGSON2E 0x0002
#define PRID_REV_LOONGSON2F 0x0003
#define PRID_REV_LOONGSON2K_R1_0 0x0000
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index b406d8bfb15a..a5ec05f719ab 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1287,14 +1287,14 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
set_cpu_asid_mask(c, MIPS_ENTRYHI_ASID);
c->writecombine = _CACHE_UNCACHED_ACCELERATED;
break;
- case PRID_IMP_LOONGSON_32: /* Loongson-1 */
+ case PRID_IMP_LOONGSON_32:
decode_configs(c);

c->cputype = CPU_LOONGSON32;

switch (c->processor_id & PRID_REV_MASK) {
- case PRID_REV_LOONGSON1B:
- __cpu_name[cpu] = "Loongson 1B";
+ case PRID_REV_LOONGSON1:
+ __cpu_name[cpu] = "ICT Loongson-1";
break;
}

--
2.39.2


2023-07-30 11:50:49

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH 14/17] mips: dts: loongson1b: Add PWM timer clocksource

On 29/07/2023 15:43, Keguang Zhang wrote:
> Add the device node of PWM timer clocksource
> for Loongson-1B boards.

Don't split adding new DTS into many small commits. There is little
point in adding broken/incomplete DTS and immediately fix it. Just add
complete one. We do the same for each drivers and DTS is not different here.

It would be entirely different if you followed 'release early, release
often' approach, so release pieces as fast as you have them ready. You
decided to ignore that rule, so no, you don't get 20 commits fixing DTS
you added in first commit of the same patchset.



Best regards,
Krzysztof


2023-07-30 12:33:09

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH 07/17] MIPS: loongson32: Convert UART platform device to DT

On 29/07/2023 15:43, Keguang Zhang wrote:
> Add UART device nodes for Loongson-1 boards,
> and drop the legacy platform devices and data accordingly.
>
> Signed-off-by: Keguang Zhang <[email protected]>
> ---
> arch/mips/boot/dts/loongson/loongson1.dtsi | 54 +++++++++++++++++++

Same problem - DTS is always separate. It seems you made this mistake
everywhere, so entire patchset needs to be fixed. Keep all DTS - your
base board and extending it - at the end of the patchset and squash it.
There is little point to add new DTS in steps (e.g. first add incomplete
broken DTS and then immediately fix it... no, instead just add correct
and complete DTS).


Best regards,
Krzysztof


2023-07-31 03:29:32

by Keguang Zhang

[permalink] [raw]
Subject: Re: [PATCH 07/17] MIPS: loongson32: Convert UART platform device to DT

On Sun, Jul 30, 2023 at 4:26 PM Krzysztof Kozlowski
<[email protected]> wrote:
>
> On 29/07/2023 15:43, Keguang Zhang wrote:
> > Add UART device nodes for Loongson-1 boards,
> > and drop the legacy platform devices and data accordingly.
> >
> > Signed-off-by: Keguang Zhang <[email protected]>
> > ---
> > arch/mips/boot/dts/loongson/loongson1.dtsi | 54 +++++++++++++++++++
>
> Same problem - DTS is always separate. It seems you made this mistake
> everywhere, so entire patchset needs to be fixed. Keep all DTS - your
> base board and extending it - at the end of the patchset and squash it.
> There is little point to add new DTS in steps (e.g. first add incomplete
> broken DTS and then immediately fix it... no, instead just add correct
> and complete DTS).
>
Sorry. I thought it would be easier to review for split patches.
Thanks for the explanation.
Will send v2 with one complete DTS.
>
> Best regards,
> Krzysztof
>


--
Best regards,

Keguang Zhang

2023-07-31 04:06:34

by Keguang Zhang

[permalink] [raw]
Subject: Re: [PATCH 07/17] MIPS: loongson32: Convert UART platform device to DT

On Mon, Jul 31, 2023 at 11:04 AM Keguang Zhang <[email protected]> wrote:
>
> On Sun, Jul 30, 2023 at 4:26 PM Krzysztof Kozlowski
> <[email protected]> wrote:
> >
> > On 29/07/2023 15:43, Keguang Zhang wrote:
> > > Add UART device nodes for Loongson-1 boards,
> > > and drop the legacy platform devices and data accordingly.
> > >
> > > Signed-off-by: Keguang Zhang <[email protected]>
> > > ---
> > > arch/mips/boot/dts/loongson/loongson1.dtsi | 54 +++++++++++++++++++
> >
> > Same problem - DTS is always separate. It seems you made this mistake
> > everywhere, so entire patchset needs to be fixed. Keep all DTS - your
> > base board and extending it - at the end of the patchset and squash it.
> > There is little point to add new DTS in steps (e.g. first add incomplete
> > broken DTS and then immediately fix it... no, instead just add correct
> > and complete DTS).
> >
> Sorry. I thought it would be easier to review for split patches.
> Thanks for the explanation.
> Will send v2 with one complete DTS.

Hello Thomas,
May I ask your opinion about the way to delete the obsolete platform devices?
Should I delete them in one patch? Or in separated patches?
Thanks!

> >
> > Best regards,
> > Krzysztof
> >
>
>
> --
> Best regards,
>
> Keguang Zhang



--
Best regards,

Keguang Zhang

2023-07-31 07:03:21

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH 07/17] MIPS: loongson32: Convert UART platform device to DT

On 31/07/2023 05:32, Keguang Zhang wrote:
> On Mon, Jul 31, 2023 at 11:04 AM Keguang Zhang <[email protected]> wrote:
>>
>> On Sun, Jul 30, 2023 at 4:26 PM Krzysztof Kozlowski
>> <[email protected]> wrote:
>>>
>>> On 29/07/2023 15:43, Keguang Zhang wrote:
>>>> Add UART device nodes for Loongson-1 boards,
>>>> and drop the legacy platform devices and data accordingly.
>>>>
>>>> Signed-off-by: Keguang Zhang <[email protected]>
>>>> ---
>>>> arch/mips/boot/dts/loongson/loongson1.dtsi | 54 +++++++++++++++++++
>>>
>>> Same problem - DTS is always separate. It seems you made this mistake
>>> everywhere, so entire patchset needs to be fixed. Keep all DTS - your
>>> base board and extending it - at the end of the patchset and squash it.
>>> There is little point to add new DTS in steps (e.g. first add incomplete
>>> broken DTS and then immediately fix it... no, instead just add correct
>>> and complete DTS).
>>>
>> Sorry. I thought it would be easier to review for split patches.
>> Thanks for the explanation.
>> Will send v2 with one complete DTS.
>
> Hello Thomas,
> May I ask your opinion about the way to delete the obsolete platform devices?
> Should I delete them in one patch? Or in separated patches?

subsystem patches are split per subsystem. arch-code can be either
together or also split per type of driver. Removal of code is
incremental. Just add extending it, but your patch was not extending
DTS, but adding new one.

Best regards,
Krzysztof


2023-08-01 15:19:23

by Philippe Mathieu-Daudé

[permalink] [raw]
Subject: Re: [PATCH 02/17] MIPS: Modify the Loongson1 PRID_REV

On 29/7/23 15:43, Keguang Zhang wrote:
> Because LS1B and LS1C share the same PRID,
> it's reasonable to rename their PRID_REVs to PRID_REV_LOONGSON1.
>
> Signed-off-by: Keguang Zhang <[email protected]>
> ---
> arch/mips/include/asm/cpu.h | 3 +--
> arch/mips/kernel/cpu-probe.c | 6 +++---
> 2 files changed, 4 insertions(+), 5 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <[email protected]>


2023-08-01 18:41:46

by Serge Semin

[permalink] [raw]
Subject: Re: [PATCH 08/17] MIPS: loongson32: Convert Ethernet platform device to DT

On Sat, Jul 29, 2023 at 09:43:09PM +0800, Keguang Zhang wrote:
> Add Ethernet device nodes for Loongson-1 boards,
> and drop the legacy platform devices and data accordingly.

It seems to me that your conversion breaks the RGMII mode support.
What you need to do is to make sure that the respective flags are set
in the MUX space.

Regarding the MUX-space. It looks as a pinctrl-setting space. If so
adding the new pinctrl driver will be required. Otherwise it can be
defined as a syscon-node and then utilized in the Loongson-1 GMAC
low-level driver.

-Serge(y)

>
> Signed-off-by: Keguang Zhang <[email protected]>
> ---
> arch/mips/boot/dts/loongson/loongson1.dtsi | 16 ++
> arch/mips/boot/dts/loongson/loongson1b.dtsi | 53 +++++++
> arch/mips/boot/dts/loongson/loongson1c.dtsi | 17 ++
> arch/mips/boot/dts/loongson/lsgz_1b_dev.dts | 8 +
> arch/mips/boot/dts/loongson/smartloong_1c.dts | 4 +
> arch/mips/loongson32/common/platform.c | 146 +-----------------
> arch/mips/loongson32/ls1b/board.c | 2 -
> arch/mips/loongson32/ls1c/board.c | 1 -
> 8 files changed, 99 insertions(+), 148 deletions(-)
>
> diff --git a/arch/mips/boot/dts/loongson/loongson1.dtsi b/arch/mips/boot/dts/loongson/loongson1.dtsi
> index c77aa2d0f66c..48bb786bbf10 100644
> --- a/arch/mips/boot/dts/loongson/loongson1.dtsi
> +++ b/arch/mips/boot/dts/loongson/loongson1.dtsi
> @@ -71,6 +71,22 @@ intc3: interrupt-controller@1fd01088 {
> interrupt-parent = <&cpu_intc>;
> interrupts = <5>;
> };
> +
> + gmac0: ethernet@1fe10000 {
> + compatible = "snps,dwmac-3.70a";
> + reg = <0x1fe10000 0x10000>;
> +
> + interrupt-parent = <&intc1>;
> + interrupt-names = "macirq";
> +
> + clocks = <&clkc LS1X_CLKID_AHB>;
> + clock-names = "stmmaceth";
> +
> + snps,pbl = <1>;
> +
> + status = "disabled";
> + };
> +
> };
>
> apb: bus@1fe40000 {
> diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> index 437a77cee163..42b96c557660 100644
> --- a/arch/mips/boot/dts/loongson/loongson1b.dtsi
> +++ b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> @@ -7,6 +7,11 @@
> #include "loongson1.dtsi"
>
> / {
> + aliases {
> + ethernet0 = &gmac0;
> + ethernet1 = &gmac1;
> + };
> +
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -74,6 +79,54 @@ clkc: clock-controller@1fe78030 {
> };
> };
>
> +&ahb {
> + gmac1: ethernet@1fe20000 {
> + compatible = "snps,dwmac-3.70a";
> + reg = <0x1fe20000 0x10000>;
> +
> + interrupt-parent = <&intc1>;
> + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq";
> +
> + clocks = <&clkc LS1X_CLKID_AHB>;
> + clock-names = "stmmaceth";
> +
> + phy-handle = <&phy1>;
> + phy-mode = "mii";
> +
> + snps,pbl = <1>;
> +
> + status = "disabled";
> +
> + mdio1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> +
> + phy1: ethernet-phy@0 {
> + reg = <0x0>;
> + };
> + };
> + };
> +};
> +
> +&gmac0 {
> + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
> +
> + phy-handle = <&phy0>;
> + phy-mode = "mii";
> +
> + mdio0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> +
> + phy0: ethernet-phy@0 {
> + reg = <0x0>;
> + };
> + };
> +};
> +
> &uart1 {
> interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> };
> diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> index 1dd575b7b2f9..5b3e0f9280f6 100644
> --- a/arch/mips/boot/dts/loongson/loongson1c.dtsi
> +++ b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> @@ -41,6 +41,23 @@ intc4: interrupt-controller@1fd010a0 {
> };
> };
>
> +&gmac0 {
> + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> +
> + phy-handle = <&phy0>;
> + phy-mode = "rmii";
> +
> + mdio0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> +
> + phy0: ethernet-phy@13 {
> + reg = <0x13>;
> + };
> + };
> +};
> +
> &uart1 {
> interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
> };
> diff --git a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> index 89c3dfa574f7..a43df21f2904 100644
> --- a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> +++ b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> @@ -28,6 +28,14 @@ xtal: xtal {
> };
> };
>
> +&gmac0 {
> + status = "okay";
> +};
> +
> +&gmac1 {
> + status = "okay";
> +};
> +
> &uart0 {
> status = "okay";
> };
> diff --git a/arch/mips/boot/dts/loongson/smartloong_1c.dts b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> index 188aab9e3685..2d8f304aa2c4 100644
> --- a/arch/mips/boot/dts/loongson/smartloong_1c.dts
> +++ b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> @@ -28,6 +28,10 @@ xtal: xtal {
> };
> };
>
> +&gmac0 {
> + status = "okay";
> +};
> +
> &uart0 {
> status = "okay";
> };
> diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
> index 8272b4133e25..817518531b9b 100644
> --- a/arch/mips/loongson32/common/platform.c
> +++ b/arch/mips/loongson32/common/platform.c
> @@ -8,157 +8,13 @@
> #include <linux/err.h>
> #include <linux/mtd/partitions.h>
> #include <linux/sizes.h>
> -#include <linux/phy.h>
> -#include <linux/stmmac.h>
> #include <linux/usb/ehci_pdriver.h>
>
> #include <platform.h>
> #include <loongson1.h>
> #include <dma.h>
> #include <nand.h>
> -
> -/* Synopsys Ethernet GMAC */
> -static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = {
> - .phy_mask = 0,
> -};
> -
> -static struct stmmac_dma_cfg ls1x_eth_dma_cfg = {
> - .pbl = 1,
> -};
> -
> -int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
> -{
> - struct plat_stmmacenet_data *plat_dat = NULL;
> - u32 val;
> -
> - val = __raw_readl(LS1X_MUX_CTRL1);
> -
> -#if defined(CONFIG_LOONGSON1_LS1B)
> - plat_dat = dev_get_platdata(&pdev->dev);
> - if (plat_dat->bus_id) {
> - __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
> - GMAC1_USE_UART0, LS1X_MUX_CTRL0);
> - switch (plat_dat->phy_interface) {
> - case PHY_INTERFACE_MODE_RGMII:
> - val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> - break;
> - case PHY_INTERFACE_MODE_MII:
> - val |= (GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> - break;
> - default:
> - pr_err("unsupported mii mode %d\n",
> - plat_dat->phy_interface);
> - return -ENOTSUPP;
> - }
> - val &= ~GMAC1_SHUT;
> - } else {
> - switch (plat_dat->phy_interface) {
> - case PHY_INTERFACE_MODE_RGMII:
> - val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> - break;
> - case PHY_INTERFACE_MODE_MII:
> - val |= (GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> - break;
> - default:
> - pr_err("unsupported mii mode %d\n",
> - plat_dat->phy_interface);
> - return -ENOTSUPP;
> - }
> - val &= ~GMAC0_SHUT;
> - }
> - __raw_writel(val, LS1X_MUX_CTRL1);
> -#elif defined(CONFIG_LOONGSON1_LS1C)
> - plat_dat = dev_get_platdata(&pdev->dev);
> -
> - val &= ~PHY_INTF_SELI;
> - if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
> - val |= 0x4 << PHY_INTF_SELI_SHIFT;
> - __raw_writel(val, LS1X_MUX_CTRL1);
> -
> - val = __raw_readl(LS1X_MUX_CTRL0);
> - __raw_writel(val & (~GMAC_SHUT), LS1X_MUX_CTRL0);
> -#endif
> -
> - return 0;
> -}
> -
> -static struct plat_stmmacenet_data ls1x_eth0_pdata = {
> - .bus_id = 0,
> - .phy_addr = -1,
> -#if defined(CONFIG_LOONGSON1_LS1B)
> - .phy_interface = PHY_INTERFACE_MODE_MII,
> -#elif defined(CONFIG_LOONGSON1_LS1C)
> - .phy_interface = PHY_INTERFACE_MODE_RMII,
> -#endif
> - .mdio_bus_data = &ls1x_mdio_bus_data,
> - .dma_cfg = &ls1x_eth_dma_cfg,
> - .has_gmac = 1,
> - .tx_coe = 1,
> - .rx_queues_to_use = 1,
> - .tx_queues_to_use = 1,
> - .init = ls1x_eth_mux_init,
> -};
> -
> -static struct resource ls1x_eth0_resources[] = {
> - [0] = {
> - .start = LS1X_GMAC0_BASE,
> - .end = LS1X_GMAC0_BASE + SZ_64K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .name = "macirq",
> - .start = LS1X_GMAC0_IRQ,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -struct platform_device ls1x_eth0_pdev = {
> - .name = "stmmaceth",
> - .id = 0,
> - .num_resources = ARRAY_SIZE(ls1x_eth0_resources),
> - .resource = ls1x_eth0_resources,
> - .dev = {
> - .platform_data = &ls1x_eth0_pdata,
> - },
> -};
> -
> -#ifdef CONFIG_LOONGSON1_LS1B
> -static struct plat_stmmacenet_data ls1x_eth1_pdata = {
> - .bus_id = 1,
> - .phy_addr = -1,
> - .phy_interface = PHY_INTERFACE_MODE_MII,
> - .mdio_bus_data = &ls1x_mdio_bus_data,
> - .dma_cfg = &ls1x_eth_dma_cfg,
> - .has_gmac = 1,
> - .tx_coe = 1,
> - .rx_queues_to_use = 1,
> - .tx_queues_to_use = 1,
> - .init = ls1x_eth_mux_init,
> -};
> -
> -static struct resource ls1x_eth1_resources[] = {
> - [0] = {
> - .start = LS1X_GMAC1_BASE,
> - .end = LS1X_GMAC1_BASE + SZ_64K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .name = "macirq",
> - .start = LS1X_GMAC1_IRQ,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -struct platform_device ls1x_eth1_pdev = {
> - .name = "stmmaceth",
> - .id = 1,
> - .num_resources = ARRAY_SIZE(ls1x_eth1_resources),
> - .resource = ls1x_eth1_resources,
> - .dev = {
> - .platform_data = &ls1x_eth1_pdata,
> - },
> -};
> -#endif /* CONFIG_LOONGSON1_LS1B */
> +#include <irq.h>
>
> /* GPIO */
> static struct resource ls1x_gpio0_resources[] = {
> diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
> index e8290f200096..f23e4e5c96ee 100644
> --- a/arch/mips/loongson32/ls1b/board.c
> +++ b/arch/mips/loongson32/ls1b/board.c
> @@ -34,8 +34,6 @@ static const struct gpio_led_platform_data ls1x_led_pdata __initconst = {
> };
>
> static struct platform_device *ls1b_platform_devices[] __initdata = {
> - &ls1x_eth0_pdev,
> - &ls1x_eth1_pdev,
> &ls1x_ehci_pdev,
> &ls1x_gpio0_pdev,
> &ls1x_gpio1_pdev,
> diff --git a/arch/mips/loongson32/ls1c/board.c b/arch/mips/loongson32/ls1c/board.c
> index a7096964fb30..29bc467fd149 100644
> --- a/arch/mips/loongson32/ls1c/board.c
> +++ b/arch/mips/loongson32/ls1c/board.c
> @@ -6,7 +6,6 @@
> #include <platform.h>
>
> static struct platform_device *ls1c_platform_devices[] __initdata = {
> - &ls1x_eth0_pdev,
> &ls1x_rtc_pdev,
> &ls1x_wdt_pdev,
> };
> --
> 2.39.2
>

2023-08-02 03:56:38

by Keguang Zhang

[permalink] [raw]
Subject: Re: [PATCH 08/17] MIPS: loongson32: Convert Ethernet platform device to DT

On Wed, Aug 2, 2023 at 2:21 AM Serge Semin <[email protected]> wrote:
>
> On Sat, Jul 29, 2023 at 09:43:09PM +0800, Keguang Zhang wrote:
> > Add Ethernet device nodes for Loongson-1 boards,
> > and drop the legacy platform devices and data accordingly.
>
> It seems to me that your conversion breaks the RGMII mode support.
> What you need to do is to make sure that the respective flags are set
> in the MUX space.
>
> Regarding the MUX-space. It looks as a pinctrl-setting space. If so
> adding the new pinctrl driver will be required. Otherwise it can be
> defined as a syscon-node and then utilized in the Loongson-1 GMAC
> low-level driver.
>
Thanks for your reminder.
I planned to add the pinctrl driver later.
Now I'm working on it.

> -Serge(y)
>
> >
> > Signed-off-by: Keguang Zhang <[email protected]>
> > ---
> > arch/mips/boot/dts/loongson/loongson1.dtsi | 16 ++
> > arch/mips/boot/dts/loongson/loongson1b.dtsi | 53 +++++++
> > arch/mips/boot/dts/loongson/loongson1c.dtsi | 17 ++
> > arch/mips/boot/dts/loongson/lsgz_1b_dev.dts | 8 +
> > arch/mips/boot/dts/loongson/smartloong_1c.dts | 4 +
> > arch/mips/loongson32/common/platform.c | 146 +-----------------
> > arch/mips/loongson32/ls1b/board.c | 2 -
> > arch/mips/loongson32/ls1c/board.c | 1 -
> > 8 files changed, 99 insertions(+), 148 deletions(-)
> >
> > diff --git a/arch/mips/boot/dts/loongson/loongson1.dtsi b/arch/mips/boot/dts/loongson/loongson1.dtsi
> > index c77aa2d0f66c..48bb786bbf10 100644
> > --- a/arch/mips/boot/dts/loongson/loongson1.dtsi
> > +++ b/arch/mips/boot/dts/loongson/loongson1.dtsi
> > @@ -71,6 +71,22 @@ intc3: interrupt-controller@1fd01088 {
> > interrupt-parent = <&cpu_intc>;
> > interrupts = <5>;
> > };
> > +
> > + gmac0: ethernet@1fe10000 {
> > + compatible = "snps,dwmac-3.70a";
> > + reg = <0x1fe10000 0x10000>;
> > +
> > + interrupt-parent = <&intc1>;
> > + interrupt-names = "macirq";
> > +
> > + clocks = <&clkc LS1X_CLKID_AHB>;
> > + clock-names = "stmmaceth";
> > +
> > + snps,pbl = <1>;
> > +
> > + status = "disabled";
> > + };
> > +
> > };
> >
> > apb: bus@1fe40000 {
> > diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > index 437a77cee163..42b96c557660 100644
> > --- a/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > +++ b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > @@ -7,6 +7,11 @@
> > #include "loongson1.dtsi"
> >
> > / {
> > + aliases {
> > + ethernet0 = &gmac0;
> > + ethernet1 = &gmac1;
> > + };
> > +
> > cpus {
> > #address-cells = <1>;
> > #size-cells = <0>;
> > @@ -74,6 +79,54 @@ clkc: clock-controller@1fe78030 {
> > };
> > };
> >
> > +&ahb {
> > + gmac1: ethernet@1fe20000 {
> > + compatible = "snps,dwmac-3.70a";
> > + reg = <0x1fe20000 0x10000>;
> > +
> > + interrupt-parent = <&intc1>;
> > + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "macirq";
> > +
> > + clocks = <&clkc LS1X_CLKID_AHB>;
> > + clock-names = "stmmaceth";
> > +
> > + phy-handle = <&phy1>;
> > + phy-mode = "mii";
> > +
> > + snps,pbl = <1>;
> > +
> > + status = "disabled";
> > +
> > + mdio1 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "snps,dwmac-mdio";
> > +
> > + phy1: ethernet-phy@0 {
> > + reg = <0x0>;
> > + };
> > + };
> > + };
> > +};
> > +
> > +&gmac0 {
> > + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
> > +
> > + phy-handle = <&phy0>;
> > + phy-mode = "mii";
> > +
> > + mdio0 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "snps,dwmac-mdio";
> > +
> > + phy0: ethernet-phy@0 {
> > + reg = <0x0>;
> > + };
> > + };
> > +};
> > +
> > &uart1 {
> > interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > };
> > diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > index 1dd575b7b2f9..5b3e0f9280f6 100644
> > --- a/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > +++ b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > @@ -41,6 +41,23 @@ intc4: interrupt-controller@1fd010a0 {
> > };
> > };
> >
> > +&gmac0 {
> > + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > +
> > + phy-handle = <&phy0>;
> > + phy-mode = "rmii";
> > +
> > + mdio0 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "snps,dwmac-mdio";
> > +
> > + phy0: ethernet-phy@13 {
> > + reg = <0x13>;
> > + };
> > + };
> > +};
> > +
> > &uart1 {
> > interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
> > };
> > diff --git a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > index 89c3dfa574f7..a43df21f2904 100644
> > --- a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > +++ b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > @@ -28,6 +28,14 @@ xtal: xtal {
> > };
> > };
> >
> > +&gmac0 {
> > + status = "okay";
> > +};
> > +
> > +&gmac1 {
> > + status = "okay";
> > +};
> > +
> > &uart0 {
> > status = "okay";
> > };
> > diff --git a/arch/mips/boot/dts/loongson/smartloong_1c.dts b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > index 188aab9e3685..2d8f304aa2c4 100644
> > --- a/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > +++ b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > @@ -28,6 +28,10 @@ xtal: xtal {
> > };
> > };
> >
> > +&gmac0 {
> > + status = "okay";
> > +};
> > +
> > &uart0 {
> > status = "okay";
> > };
> > diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
> > index 8272b4133e25..817518531b9b 100644
> > --- a/arch/mips/loongson32/common/platform.c
> > +++ b/arch/mips/loongson32/common/platform.c
> > @@ -8,157 +8,13 @@
> > #include <linux/err.h>
> > #include <linux/mtd/partitions.h>
> > #include <linux/sizes.h>
> > -#include <linux/phy.h>
> > -#include <linux/stmmac.h>
> > #include <linux/usb/ehci_pdriver.h>
> >
> > #include <platform.h>
> > #include <loongson1.h>
> > #include <dma.h>
> > #include <nand.h>
> > -
> > -/* Synopsys Ethernet GMAC */
> > -static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = {
> > - .phy_mask = 0,
> > -};
> > -
> > -static struct stmmac_dma_cfg ls1x_eth_dma_cfg = {
> > - .pbl = 1,
> > -};
> > -
> > -int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
> > -{
> > - struct plat_stmmacenet_data *plat_dat = NULL;
> > - u32 val;
> > -
> > - val = __raw_readl(LS1X_MUX_CTRL1);
> > -
> > -#if defined(CONFIG_LOONGSON1_LS1B)
> > - plat_dat = dev_get_platdata(&pdev->dev);
> > - if (plat_dat->bus_id) {
> > - __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
> > - GMAC1_USE_UART0, LS1X_MUX_CTRL0);
> > - switch (plat_dat->phy_interface) {
> > - case PHY_INTERFACE_MODE_RGMII:
> > - val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> > - break;
> > - case PHY_INTERFACE_MODE_MII:
> > - val |= (GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> > - break;
> > - default:
> > - pr_err("unsupported mii mode %d\n",
> > - plat_dat->phy_interface);
> > - return -ENOTSUPP;
> > - }
> > - val &= ~GMAC1_SHUT;
> > - } else {
> > - switch (plat_dat->phy_interface) {
> > - case PHY_INTERFACE_MODE_RGMII:
> > - val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> > - break;
> > - case PHY_INTERFACE_MODE_MII:
> > - val |= (GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> > - break;
> > - default:
> > - pr_err("unsupported mii mode %d\n",
> > - plat_dat->phy_interface);
> > - return -ENOTSUPP;
> > - }
> > - val &= ~GMAC0_SHUT;
> > - }
> > - __raw_writel(val, LS1X_MUX_CTRL1);
> > -#elif defined(CONFIG_LOONGSON1_LS1C)
> > - plat_dat = dev_get_platdata(&pdev->dev);
> > -
> > - val &= ~PHY_INTF_SELI;
> > - if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
> > - val |= 0x4 << PHY_INTF_SELI_SHIFT;
> > - __raw_writel(val, LS1X_MUX_CTRL1);
> > -
> > - val = __raw_readl(LS1X_MUX_CTRL0);
> > - __raw_writel(val & (~GMAC_SHUT), LS1X_MUX_CTRL0);
> > -#endif
> > -
> > - return 0;
> > -}
> > -
> > -static struct plat_stmmacenet_data ls1x_eth0_pdata = {
> > - .bus_id = 0,
> > - .phy_addr = -1,
> > -#if defined(CONFIG_LOONGSON1_LS1B)
> > - .phy_interface = PHY_INTERFACE_MODE_MII,
> > -#elif defined(CONFIG_LOONGSON1_LS1C)
> > - .phy_interface = PHY_INTERFACE_MODE_RMII,
> > -#endif
> > - .mdio_bus_data = &ls1x_mdio_bus_data,
> > - .dma_cfg = &ls1x_eth_dma_cfg,
> > - .has_gmac = 1,
> > - .tx_coe = 1,
> > - .rx_queues_to_use = 1,
> > - .tx_queues_to_use = 1,
> > - .init = ls1x_eth_mux_init,
> > -};
> > -
> > -static struct resource ls1x_eth0_resources[] = {
> > - [0] = {
> > - .start = LS1X_GMAC0_BASE,
> > - .end = LS1X_GMAC0_BASE + SZ_64K - 1,
> > - .flags = IORESOURCE_MEM,
> > - },
> > - [1] = {
> > - .name = "macirq",
> > - .start = LS1X_GMAC0_IRQ,
> > - .flags = IORESOURCE_IRQ,
> > - },
> > -};
> > -
> > -struct platform_device ls1x_eth0_pdev = {
> > - .name = "stmmaceth",
> > - .id = 0,
> > - .num_resources = ARRAY_SIZE(ls1x_eth0_resources),
> > - .resource = ls1x_eth0_resources,
> > - .dev = {
> > - .platform_data = &ls1x_eth0_pdata,
> > - },
> > -};
> > -
> > -#ifdef CONFIG_LOONGSON1_LS1B
> > -static struct plat_stmmacenet_data ls1x_eth1_pdata = {
> > - .bus_id = 1,
> > - .phy_addr = -1,
> > - .phy_interface = PHY_INTERFACE_MODE_MII,
> > - .mdio_bus_data = &ls1x_mdio_bus_data,
> > - .dma_cfg = &ls1x_eth_dma_cfg,
> > - .has_gmac = 1,
> > - .tx_coe = 1,
> > - .rx_queues_to_use = 1,
> > - .tx_queues_to_use = 1,
> > - .init = ls1x_eth_mux_init,
> > -};
> > -
> > -static struct resource ls1x_eth1_resources[] = {
> > - [0] = {
> > - .start = LS1X_GMAC1_BASE,
> > - .end = LS1X_GMAC1_BASE + SZ_64K - 1,
> > - .flags = IORESOURCE_MEM,
> > - },
> > - [1] = {
> > - .name = "macirq",
> > - .start = LS1X_GMAC1_IRQ,
> > - .flags = IORESOURCE_IRQ,
> > - },
> > -};
> > -
> > -struct platform_device ls1x_eth1_pdev = {
> > - .name = "stmmaceth",
> > - .id = 1,
> > - .num_resources = ARRAY_SIZE(ls1x_eth1_resources),
> > - .resource = ls1x_eth1_resources,
> > - .dev = {
> > - .platform_data = &ls1x_eth1_pdata,
> > - },
> > -};
> > -#endif /* CONFIG_LOONGSON1_LS1B */
> > +#include <irq.h>
> >
> > /* GPIO */
> > static struct resource ls1x_gpio0_resources[] = {
> > diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
> > index e8290f200096..f23e4e5c96ee 100644
> > --- a/arch/mips/loongson32/ls1b/board.c
> > +++ b/arch/mips/loongson32/ls1b/board.c
> > @@ -34,8 +34,6 @@ static const struct gpio_led_platform_data ls1x_led_pdata __initconst = {
> > };
> >
> > static struct platform_device *ls1b_platform_devices[] __initdata = {
> > - &ls1x_eth0_pdev,
> > - &ls1x_eth1_pdev,
> > &ls1x_ehci_pdev,
> > &ls1x_gpio0_pdev,
> > &ls1x_gpio1_pdev,
> > diff --git a/arch/mips/loongson32/ls1c/board.c b/arch/mips/loongson32/ls1c/board.c
> > index a7096964fb30..29bc467fd149 100644
> > --- a/arch/mips/loongson32/ls1c/board.c
> > +++ b/arch/mips/loongson32/ls1c/board.c
> > @@ -6,7 +6,6 @@
> > #include <platform.h>
> >
> > static struct platform_device *ls1c_platform_devices[] __initdata = {
> > - &ls1x_eth0_pdev,
> > &ls1x_rtc_pdev,
> > &ls1x_wdt_pdev,
> > };
> > --
> > 2.39.2
> >



--
Best regards,

Keguang Zhang

2023-08-02 10:26:18

by Serge Semin

[permalink] [raw]
Subject: Re: [PATCH 08/17] MIPS: loongson32: Convert Ethernet platform device to DT

On Wed, Aug 02, 2023 at 11:10:10AM +0800, Keguang Zhang wrote:
> On Wed, Aug 2, 2023 at 2:21 AM Serge Semin <[email protected]> wrote:
> >
> > On Sat, Jul 29, 2023 at 09:43:09PM +0800, Keguang Zhang wrote:
> > > Add Ethernet device nodes for Loongson-1 boards,
> > > and drop the legacy platform devices and data accordingly.
> >
> > It seems to me that your conversion breaks the RGMII mode support.
> > What you need to do is to make sure that the respective flags are set
> > in the MUX space.
> >
> > Regarding the MUX-space. It looks as a pinctrl-setting space. If so
> > adding the new pinctrl driver will be required. Otherwise it can be
> > defined as a syscon-node and then utilized in the Loongson-1 GMAC
> > low-level driver.
> >

> Thanks for your reminder.
> I planned to add the pinctrl driver later.
> Now I'm working on it.

I have been having a patch moving the Loongson32 MAC driver to the
STMMAC driver directory for quite a while in my tree. You can use it
in your series (completely, as a reference or template, whatever). The
only thing you'll need to do is to add the pinctrl-based version of
the ls1b_eth_mux_init()/ls1c_eth_mux_init() methods in there and
test/debug it of course.

Note 1. It seems to me that it would work better if you defined the
plat_stmmacenet_data.fix_mac_speed() callback instead of
plat_stmmacenet_data.init() for LS1B which supports MII and RGMII aka
100Mbps and 1000Mbps speeds.

Note 2. The patch I've sent was only built-tested. I don't have any
Loongson hardware.

Note 3. After the suggested patch is applied you can also completely
move the include/linux/stmmac.h header file to the STMMAC-driver
directory as a following up cleanup update (it should be renamed to
stmmac_platform.h since stmmac.h is already available in there).
It can be done since there won't any users of that file outside the
STMMAC-driver directory. So there is no point in keeping it in the
common headers directory anymore.

-Serge(y)

>
> > -Serge(y)
> >
> > >
> > > Signed-off-by: Keguang Zhang <[email protected]>
> > > ---
> > > arch/mips/boot/dts/loongson/loongson1.dtsi | 16 ++
> > > arch/mips/boot/dts/loongson/loongson1b.dtsi | 53 +++++++
> > > arch/mips/boot/dts/loongson/loongson1c.dtsi | 17 ++
> > > arch/mips/boot/dts/loongson/lsgz_1b_dev.dts | 8 +
> > > arch/mips/boot/dts/loongson/smartloong_1c.dts | 4 +
> > > arch/mips/loongson32/common/platform.c | 146 +-----------------
> > > arch/mips/loongson32/ls1b/board.c | 2 -
> > > arch/mips/loongson32/ls1c/board.c | 1 -
> > > 8 files changed, 99 insertions(+), 148 deletions(-)
> > >
> > > diff --git a/arch/mips/boot/dts/loongson/loongson1.dtsi b/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > index c77aa2d0f66c..48bb786bbf10 100644
> > > --- a/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > +++ b/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > @@ -71,6 +71,22 @@ intc3: interrupt-controller@1fd01088 {
> > > interrupt-parent = <&cpu_intc>;
> > > interrupts = <5>;
> > > };
> > > +
> > > + gmac0: ethernet@1fe10000 {
> > > + compatible = "snps,dwmac-3.70a";
> > > + reg = <0x1fe10000 0x10000>;
> > > +
> > > + interrupt-parent = <&intc1>;
> > > + interrupt-names = "macirq";
> > > +
> > > + clocks = <&clkc LS1X_CLKID_AHB>;
> > > + clock-names = "stmmaceth";
> > > +
> > > + snps,pbl = <1>;
> > > +
> > > + status = "disabled";
> > > + };
> > > +
> > > };
> > >
> > > apb: bus@1fe40000 {
> > > diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > index 437a77cee163..42b96c557660 100644
> > > --- a/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > +++ b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > @@ -7,6 +7,11 @@
> > > #include "loongson1.dtsi"
> > >
> > > / {
> > > + aliases {
> > > + ethernet0 = &gmac0;
> > > + ethernet1 = &gmac1;
> > > + };
> > > +
> > > cpus {
> > > #address-cells = <1>;
> > > #size-cells = <0>;
> > > @@ -74,6 +79,54 @@ clkc: clock-controller@1fe78030 {
> > > };
> > > };
> > >
> > > +&ahb {
> > > + gmac1: ethernet@1fe20000 {
> > > + compatible = "snps,dwmac-3.70a";
> > > + reg = <0x1fe20000 0x10000>;
> > > +
> > > + interrupt-parent = <&intc1>;
> > > + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > + interrupt-names = "macirq";
> > > +
> > > + clocks = <&clkc LS1X_CLKID_AHB>;
> > > + clock-names = "stmmaceth";
> > > +
> > > + phy-handle = <&phy1>;
> > > + phy-mode = "mii";
> > > +
> > > + snps,pbl = <1>;
> > > +
> > > + status = "disabled";
> > > +
> > > + mdio1 {
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + compatible = "snps,dwmac-mdio";
> > > +
> > > + phy1: ethernet-phy@0 {
> > > + reg = <0x0>;
> > > + };
> > > + };
> > > + };
> > > +};
> > > +
> > > +&gmac0 {
> > > + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
> > > +
> > > + phy-handle = <&phy0>;
> > > + phy-mode = "mii";
> > > +
> > > + mdio0 {
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + compatible = "snps,dwmac-mdio";
> > > +
> > > + phy0: ethernet-phy@0 {
> > > + reg = <0x0>;
> > > + };
> > > + };
> > > +};
> > > +
> > > &uart1 {
> > > interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > };
> > > diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > index 1dd575b7b2f9..5b3e0f9280f6 100644
> > > --- a/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > +++ b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > @@ -41,6 +41,23 @@ intc4: interrupt-controller@1fd010a0 {
> > > };
> > > };
> > >
> > > +&gmac0 {
> > > + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > +
> > > + phy-handle = <&phy0>;
> > > + phy-mode = "rmii";
> > > +
> > > + mdio0 {
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + compatible = "snps,dwmac-mdio";
> > > +
> > > + phy0: ethernet-phy@13 {
> > > + reg = <0x13>;
> > > + };
> > > + };
> > > +};
> > > +
> > > &uart1 {
> > > interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
> > > };
> > > diff --git a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > index 89c3dfa574f7..a43df21f2904 100644
> > > --- a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > +++ b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > @@ -28,6 +28,14 @@ xtal: xtal {
> > > };
> > > };
> > >
> > > +&gmac0 {
> > > + status = "okay";
> > > +};
> > > +
> > > +&gmac1 {
> > > + status = "okay";
> > > +};
> > > +
> > > &uart0 {
> > > status = "okay";
> > > };
> > > diff --git a/arch/mips/boot/dts/loongson/smartloong_1c.dts b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > index 188aab9e3685..2d8f304aa2c4 100644
> > > --- a/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > +++ b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > @@ -28,6 +28,10 @@ xtal: xtal {
> > > };
> > > };
> > >
> > > +&gmac0 {
> > > + status = "okay";
> > > +};
> > > +
> > > &uart0 {
> > > status = "okay";
> > > };
> > > diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
> > > index 8272b4133e25..817518531b9b 100644
> > > --- a/arch/mips/loongson32/common/platform.c
> > > +++ b/arch/mips/loongson32/common/platform.c
> > > @@ -8,157 +8,13 @@
> > > #include <linux/err.h>
> > > #include <linux/mtd/partitions.h>
> > > #include <linux/sizes.h>
> > > -#include <linux/phy.h>
> > > -#include <linux/stmmac.h>
> > > #include <linux/usb/ehci_pdriver.h>
> > >
> > > #include <platform.h>
> > > #include <loongson1.h>
> > > #include <dma.h>
> > > #include <nand.h>
> > > -
> > > -/* Synopsys Ethernet GMAC */
> > > -static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = {
> > > - .phy_mask = 0,
> > > -};
> > > -
> > > -static struct stmmac_dma_cfg ls1x_eth_dma_cfg = {
> > > - .pbl = 1,
> > > -};
> > > -
> > > -int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
> > > -{
> > > - struct plat_stmmacenet_data *plat_dat = NULL;
> > > - u32 val;
> > > -
> > > - val = __raw_readl(LS1X_MUX_CTRL1);
> > > -
> > > -#if defined(CONFIG_LOONGSON1_LS1B)
> > > - plat_dat = dev_get_platdata(&pdev->dev);
> > > - if (plat_dat->bus_id) {
> > > - __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
> > > - GMAC1_USE_UART0, LS1X_MUX_CTRL0);
> > > - switch (plat_dat->phy_interface) {
> > > - case PHY_INTERFACE_MODE_RGMII:
> > > - val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> > > - break;
> > > - case PHY_INTERFACE_MODE_MII:
> > > - val |= (GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> > > - break;
> > > - default:
> > > - pr_err("unsupported mii mode %d\n",
> > > - plat_dat->phy_interface);
> > > - return -ENOTSUPP;
> > > - }
> > > - val &= ~GMAC1_SHUT;
> > > - } else {
> > > - switch (plat_dat->phy_interface) {
> > > - case PHY_INTERFACE_MODE_RGMII:
> > > - val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> > > - break;
> > > - case PHY_INTERFACE_MODE_MII:
> > > - val |= (GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> > > - break;
> > > - default:
> > > - pr_err("unsupported mii mode %d\n",
> > > - plat_dat->phy_interface);
> > > - return -ENOTSUPP;
> > > - }
> > > - val &= ~GMAC0_SHUT;
> > > - }
> > > - __raw_writel(val, LS1X_MUX_CTRL1);
> > > -#elif defined(CONFIG_LOONGSON1_LS1C)
> > > - plat_dat = dev_get_platdata(&pdev->dev);
> > > -
> > > - val &= ~PHY_INTF_SELI;
> > > - if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
> > > - val |= 0x4 << PHY_INTF_SELI_SHIFT;
> > > - __raw_writel(val, LS1X_MUX_CTRL1);
> > > -
> > > - val = __raw_readl(LS1X_MUX_CTRL0);
> > > - __raw_writel(val & (~GMAC_SHUT), LS1X_MUX_CTRL0);
> > > -#endif
> > > -
> > > - return 0;
> > > -}
> > > -
> > > -static struct plat_stmmacenet_data ls1x_eth0_pdata = {
> > > - .bus_id = 0,
> > > - .phy_addr = -1,
> > > -#if defined(CONFIG_LOONGSON1_LS1B)
> > > - .phy_interface = PHY_INTERFACE_MODE_MII,
> > > -#elif defined(CONFIG_LOONGSON1_LS1C)
> > > - .phy_interface = PHY_INTERFACE_MODE_RMII,
> > > -#endif
> > > - .mdio_bus_data = &ls1x_mdio_bus_data,
> > > - .dma_cfg = &ls1x_eth_dma_cfg,
> > > - .has_gmac = 1,
> > > - .tx_coe = 1,
> > > - .rx_queues_to_use = 1,
> > > - .tx_queues_to_use = 1,
> > > - .init = ls1x_eth_mux_init,
> > > -};
> > > -
> > > -static struct resource ls1x_eth0_resources[] = {
> > > - [0] = {
> > > - .start = LS1X_GMAC0_BASE,
> > > - .end = LS1X_GMAC0_BASE + SZ_64K - 1,
> > > - .flags = IORESOURCE_MEM,
> > > - },
> > > - [1] = {
> > > - .name = "macirq",
> > > - .start = LS1X_GMAC0_IRQ,
> > > - .flags = IORESOURCE_IRQ,
> > > - },
> > > -};
> > > -
> > > -struct platform_device ls1x_eth0_pdev = {
> > > - .name = "stmmaceth",
> > > - .id = 0,
> > > - .num_resources = ARRAY_SIZE(ls1x_eth0_resources),
> > > - .resource = ls1x_eth0_resources,
> > > - .dev = {
> > > - .platform_data = &ls1x_eth0_pdata,
> > > - },
> > > -};
> > > -
> > > -#ifdef CONFIG_LOONGSON1_LS1B
> > > -static struct plat_stmmacenet_data ls1x_eth1_pdata = {
> > > - .bus_id = 1,
> > > - .phy_addr = -1,
> > > - .phy_interface = PHY_INTERFACE_MODE_MII,
> > > - .mdio_bus_data = &ls1x_mdio_bus_data,
> > > - .dma_cfg = &ls1x_eth_dma_cfg,
> > > - .has_gmac = 1,
> > > - .tx_coe = 1,
> > > - .rx_queues_to_use = 1,
> > > - .tx_queues_to_use = 1,
> > > - .init = ls1x_eth_mux_init,
> > > -};
> > > -
> > > -static struct resource ls1x_eth1_resources[] = {
> > > - [0] = {
> > > - .start = LS1X_GMAC1_BASE,
> > > - .end = LS1X_GMAC1_BASE + SZ_64K - 1,
> > > - .flags = IORESOURCE_MEM,
> > > - },
> > > - [1] = {
> > > - .name = "macirq",
> > > - .start = LS1X_GMAC1_IRQ,
> > > - .flags = IORESOURCE_IRQ,
> > > - },
> > > -};
> > > -
> > > -struct platform_device ls1x_eth1_pdev = {
> > > - .name = "stmmaceth",
> > > - .id = 1,
> > > - .num_resources = ARRAY_SIZE(ls1x_eth1_resources),
> > > - .resource = ls1x_eth1_resources,
> > > - .dev = {
> > > - .platform_data = &ls1x_eth1_pdata,
> > > - },
> > > -};
> > > -#endif /* CONFIG_LOONGSON1_LS1B */
> > > +#include <irq.h>
> > >
> > > /* GPIO */
> > > static struct resource ls1x_gpio0_resources[] = {
> > > diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
> > > index e8290f200096..f23e4e5c96ee 100644
> > > --- a/arch/mips/loongson32/ls1b/board.c
> > > +++ b/arch/mips/loongson32/ls1b/board.c
> > > @@ -34,8 +34,6 @@ static const struct gpio_led_platform_data ls1x_led_pdata __initconst = {
> > > };
> > >
> > > static struct platform_device *ls1b_platform_devices[] __initdata = {
> > > - &ls1x_eth0_pdev,
> > > - &ls1x_eth1_pdev,
> > > &ls1x_ehci_pdev,
> > > &ls1x_gpio0_pdev,
> > > &ls1x_gpio1_pdev,
> > > diff --git a/arch/mips/loongson32/ls1c/board.c b/arch/mips/loongson32/ls1c/board.c
> > > index a7096964fb30..29bc467fd149 100644
> > > --- a/arch/mips/loongson32/ls1c/board.c
> > > +++ b/arch/mips/loongson32/ls1c/board.c
> > > @@ -6,7 +6,6 @@
> > > #include <platform.h>
> > >
> > > static struct platform_device *ls1c_platform_devices[] __initdata = {
> > > - &ls1x_eth0_pdev,
> > > &ls1x_rtc_pdev,
> > > &ls1x_wdt_pdev,
> > > };
> > > --
> > > 2.39.2
> > >
>
>
>
> --
> Best regards,
>
> Keguang Zhang


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2023-08-02 11:57:39

by Keguang Zhang

[permalink] [raw]
Subject: Re: [PATCH 08/17] MIPS: loongson32: Convert Ethernet platform device to DT

On Wed, Aug 2, 2023 at 6:31 PM Du Huanpeng <[email protected]> wrote:
>
> On Wed, Aug 02, 2023 at 11:10:10AM +0800, Keguang Zhang wrote:
> > On Wed, Aug 2, 2023 at 2:21 AM Serge Semin <[email protected]> wrote:
> > >
> > > On Sat, Jul 29, 2023 at 09:43:09PM +0800, Keguang Zhang wrote:
> > > > Add Ethernet device nodes for Loongson-1 boards,
> > > > and drop the legacy platform devices and data accordingly.
> > >
> > > It seems to me that your conversion breaks the RGMII mode support.
> > > What you need to do is to make sure that the respective flags are set
> > > in the MUX space.
> > >
> > > Regarding the MUX-space. It looks as a pinctrl-setting space. If so
> > > adding the new pinctrl driver will be required. Otherwise it can be
> > > defined as a syscon-node and then utilized in the Loongson-1 GMAC
> > > low-level driver.
> > >
> > Thanks for your reminder.
> > I planned to add the pinctrl driver later.
> > Now I'm working on it.
> hi, I wrote a tool(work-in-progress) for generating pinctrl driver,
> do you want to try, and avoid duplicate work.

A tool for generating pinctrl driver?
Could you share it?
Perhaps you could submit your driver when it is done.
Thanks!

> and could you merge my ls1c300 devicetree for u-boot, because
> u-boot wants to keep the devicetree sync with the linux kernel.
> some nodes needed and working are not exist in your devicetree.
>
> [1] https://github.com/hodcarrier/u-boot/blob/upstream/loongson-ls1c300b/v4/arch/mips/dts/loongson32-ls1c300b.dtsi
>
I 've noticed your eariier commit for U-Boot.
We can discuss it in more detail.
> ---
> Du Huanpeng
> >
> > > -Serge(y)
> > >
> > > >
> > > > Signed-off-by: Keguang Zhang <[email protected]>
> > > > ---
> > > > arch/mips/boot/dts/loongson/loongson1.dtsi | 16 ++
> > > > arch/mips/boot/dts/loongson/loongson1b.dtsi | 53 +++++++
> > > > arch/mips/boot/dts/loongson/loongson1c.dtsi | 17 ++
> > > > arch/mips/boot/dts/loongson/lsgz_1b_dev.dts | 8 +
> > > > arch/mips/boot/dts/loongson/smartloong_1c.dts | 4 +
> > > > arch/mips/loongson32/common/platform.c | 146 +-----------------
> > > > arch/mips/loongson32/ls1b/board.c | 2 -
> > > > arch/mips/loongson32/ls1c/board.c | 1 -
> > > > 8 files changed, 99 insertions(+), 148 deletions(-)
> > > >
> > > > diff --git a/arch/mips/boot/dts/loongson/loongson1.dtsi b/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > > index c77aa2d0f66c..48bb786bbf10 100644
> > > > --- a/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > > +++ b/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > > @@ -71,6 +71,22 @@ intc3: interrupt-controller@1fd01088 {
> > > > interrupt-parent = <&cpu_intc>;
> > > > interrupts = <5>;
> > > > };
> > > > +
> > > > + gmac0: ethernet@1fe10000 {
> > > > + compatible = "snps,dwmac-3.70a";
> > > > + reg = <0x1fe10000 0x10000>;
> > > > +
> > > > + interrupt-parent = <&intc1>;
> > > > + interrupt-names = "macirq";
> > > > +
> > > > + clocks = <&clkc LS1X_CLKID_AHB>;
> > > > + clock-names = "stmmaceth";
> > > > +
> > > > + snps,pbl = <1>;
> > > > +
> > > > + status = "disabled";
> > > > + };
> > > > +
> > > > };
> > > >
> > > > apb: bus@1fe40000 {
> > > > diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > > index 437a77cee163..42b96c557660 100644
> > > > --- a/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > > +++ b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > > @@ -7,6 +7,11 @@
> > > > #include "loongson1.dtsi"
> > > >
> > > > / {
> > > > + aliases {
> > > > + ethernet0 = &gmac0;
> > > > + ethernet1 = &gmac1;
> > > > + };
> > > > +
> > > > cpus {
> > > > #address-cells = <1>;
> > > > #size-cells = <0>;
> > > > @@ -74,6 +79,54 @@ clkc: clock-controller@1fe78030 {
> > > > };
> > > > };
> > > >
> > > > +&ahb {
> > > > + gmac1: ethernet@1fe20000 {
> > > > + compatible = "snps,dwmac-3.70a";
> > > > + reg = <0x1fe20000 0x10000>;
> > > > +
> > > > + interrupt-parent = <&intc1>;
> > > > + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > > + interrupt-names = "macirq";
> > > > +
> > > > + clocks = <&clkc LS1X_CLKID_AHB>;
> > > > + clock-names = "stmmaceth";
> > > > +
> > > > + phy-handle = <&phy1>;
> > > > + phy-mode = "mii";
> > > > +
> > > > + snps,pbl = <1>;
> > > > +
> > > > + status = "disabled";
> > > > +
> > > > + mdio1 {
> > > > + #address-cells = <1>;
> > > > + #size-cells = <0>;
> > > > + compatible = "snps,dwmac-mdio";
> > > > +
> > > > + phy1: ethernet-phy@0 {
> > > > + reg = <0x0>;
> > > > + };
> > > > + };
> > > > + };
> > > > +};
> > > > +
> > > > +&gmac0 {
> > > > + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
> > > > +
> > > > + phy-handle = <&phy0>;
> > > > + phy-mode = "mii";
> > > > +
> > > > + mdio0 {
> > > > + #address-cells = <1>;
> > > > + #size-cells = <0>;
> > > > + compatible = "snps,dwmac-mdio";
> > > > +
> > > > + phy0: ethernet-phy@0 {
> > > > + reg = <0x0>;
> > > > + };
> > > > + };
> > > > +};
> > > > +
> > > > &uart1 {
> > > > interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > > };
> > > > diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > > index 1dd575b7b2f9..5b3e0f9280f6 100644
> > > > --- a/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > > +++ b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > > @@ -41,6 +41,23 @@ intc4: interrupt-controller@1fd010a0 {
> > > > };
> > > > };
> > > >
> > > > +&gmac0 {
> > > > + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > > +
> > > > + phy-handle = <&phy0>;
> > > > + phy-mode = "rmii";
> > > > +
> > > > + mdio0 {
> > > > + #address-cells = <1>;
> > > > + #size-cells = <0>;
> > > > + compatible = "snps,dwmac-mdio";
> > > > +
> > > > + phy0: ethernet-phy@13 {
> > > > + reg = <0x13>;
> > > > + };
> > > > + };
> > > > +};
> > > > +
> > > > &uart1 {
> > > > interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
> > > > };
> > > > diff --git a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > > index 89c3dfa574f7..a43df21f2904 100644
> > > > --- a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > > +++ b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > > @@ -28,6 +28,14 @@ xtal: xtal {
> > > > };
> > > > };
> > > >
> > > > +&gmac0 {
> > > > + status = "okay";
> > > > +};
> > > > +
> > > > +&gmac1 {
> > > > + status = "okay";
> > > > +};
> > > > +
> > > > &uart0 {
> > > > status = "okay";
> > > > };
> > > > diff --git a/arch/mips/boot/dts/loongson/smartloong_1c.dts b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > > index 188aab9e3685..2d8f304aa2c4 100644
> > > > --- a/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > > +++ b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > > @@ -28,6 +28,10 @@ xtal: xtal {
> > > > };
> > > > };
> > > >
> > > > +&gmac0 {
> > > > + status = "okay";
> > > > +};
> > > > +
> > > > &uart0 {
> > > > status = "okay";
> > > > };
> > > > diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
> > > > index 8272b4133e25..817518531b9b 100644
> > > > --- a/arch/mips/loongson32/common/platform.c
> > > > +++ b/arch/mips/loongson32/common/platform.c
> > > > @@ -8,157 +8,13 @@
> > > > #include <linux/err.h>
> > > > #include <linux/mtd/partitions.h>
> > > > #include <linux/sizes.h>
> > > > -#include <linux/phy.h>
> > > > -#include <linux/stmmac.h>
> > > > #include <linux/usb/ehci_pdriver.h>
> > > >
> > > > #include <platform.h>
> > > > #include <loongson1.h>
> > > > #include <dma.h>
> > > > #include <nand.h>
> > > > -
> > > > -/* Synopsys Ethernet GMAC */
> > > > -static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = {
> > > > - .phy_mask = 0,
> > > > -};
> > > > -
> > > > -static struct stmmac_dma_cfg ls1x_eth_dma_cfg = {
> > > > - .pbl = 1,
> > > > -};
> > > > -
> > > > -int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
> > > > -{
> > > > - struct plat_stmmacenet_data *plat_dat = NULL;
> > > > - u32 val;
> > > > -
> > > > - val = __raw_readl(LS1X_MUX_CTRL1);
> > > > -
> > > > -#if defined(CONFIG_LOONGSON1_LS1B)
> > > > - plat_dat = dev_get_platdata(&pdev->dev);
> > > > - if (plat_dat->bus_id) {
> > > > - __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
> > > > - GMAC1_USE_UART0, LS1X_MUX_CTRL0);
> > > > - switch (plat_dat->phy_interface) {
> > > > - case PHY_INTERFACE_MODE_RGMII:
> > > > - val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> > > > - break;
> > > > - case PHY_INTERFACE_MODE_MII:
> > > > - val |= (GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> > > > - break;
> > > > - default:
> > > > - pr_err("unsupported mii mode %d\n",
> > > > - plat_dat->phy_interface);
> > > > - return -ENOTSUPP;
> > > > - }
> > > > - val &= ~GMAC1_SHUT;
> > > > - } else {
> > > > - switch (plat_dat->phy_interface) {
> > > > - case PHY_INTERFACE_MODE_RGMII:
> > > > - val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> > > > - break;
> > > > - case PHY_INTERFACE_MODE_MII:
> > > > - val |= (GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> > > > - break;
> > > > - default:
> > > > - pr_err("unsupported mii mode %d\n",
> > > > - plat_dat->phy_interface);
> > > > - return -ENOTSUPP;
> > > > - }
> > > > - val &= ~GMAC0_SHUT;
> > > > - }
> > > > - __raw_writel(val, LS1X_MUX_CTRL1);
> > > > -#elif defined(CONFIG_LOONGSON1_LS1C)
> > > > - plat_dat = dev_get_platdata(&pdev->dev);
> > > > -
> > > > - val &= ~PHY_INTF_SELI;
> > > > - if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
> > > > - val |= 0x4 << PHY_INTF_SELI_SHIFT;
> > > > - __raw_writel(val, LS1X_MUX_CTRL1);
> > > > -
> > > > - val = __raw_readl(LS1X_MUX_CTRL0);
> > > > - __raw_writel(val & (~GMAC_SHUT), LS1X_MUX_CTRL0);
> > > > -#endif
> > > > -
> > > > - return 0;
> > > > -}
> > > > -
> > > > -static struct plat_stmmacenet_data ls1x_eth0_pdata = {
> > > > - .bus_id = 0,
> > > > - .phy_addr = -1,
> > > > -#if defined(CONFIG_LOONGSON1_LS1B)
> > > > - .phy_interface = PHY_INTERFACE_MODE_MII,
> > > > -#elif defined(CONFIG_LOONGSON1_LS1C)
> > > > - .phy_interface = PHY_INTERFACE_MODE_RMII,
> > > > -#endif
> > > > - .mdio_bus_data = &ls1x_mdio_bus_data,
> > > > - .dma_cfg = &ls1x_eth_dma_cfg,
> > > > - .has_gmac = 1,
> > > > - .tx_coe = 1,
> > > > - .rx_queues_to_use = 1,
> > > > - .tx_queues_to_use = 1,
> > > > - .init = ls1x_eth_mux_init,
> > > > -};
> > > > -
> > > > -static struct resource ls1x_eth0_resources[] = {
> > > > - [0] = {
> > > > - .start = LS1X_GMAC0_BASE,
> > > > - .end = LS1X_GMAC0_BASE + SZ_64K - 1,
> > > > - .flags = IORESOURCE_MEM,
> > > > - },
> > > > - [1] = {
> > > > - .name = "macirq",
> > > > - .start = LS1X_GMAC0_IRQ,
> > > > - .flags = IORESOURCE_IRQ,
> > > > - },
> > > > -};
> > > > -
> > > > -struct platform_device ls1x_eth0_pdev = {
> > > > - .name = "stmmaceth",
> > > > - .id = 0,
> > > > - .num_resources = ARRAY_SIZE(ls1x_eth0_resources),
> > > > - .resource = ls1x_eth0_resources,
> > > > - .dev = {
> > > > - .platform_data = &ls1x_eth0_pdata,
> > > > - },
> > > > -};
> > > > -
> > > > -#ifdef CONFIG_LOONGSON1_LS1B
> > > > -static struct plat_stmmacenet_data ls1x_eth1_pdata = {
> > > > - .bus_id = 1,
> > > > - .phy_addr = -1,
> > > > - .phy_interface = PHY_INTERFACE_MODE_MII,
> > > > - .mdio_bus_data = &ls1x_mdio_bus_data,
> > > > - .dma_cfg = &ls1x_eth_dma_cfg,
> > > > - .has_gmac = 1,
> > > > - .tx_coe = 1,
> > > > - .rx_queues_to_use = 1,
> > > > - .tx_queues_to_use = 1,
> > > > - .init = ls1x_eth_mux_init,
> > > > -};
> > > > -
> > > > -static struct resource ls1x_eth1_resources[] = {
> > > > - [0] = {
> > > > - .start = LS1X_GMAC1_BASE,
> > > > - .end = LS1X_GMAC1_BASE + SZ_64K - 1,
> > > > - .flags = IORESOURCE_MEM,
> > > > - },
> > > > - [1] = {
> > > > - .name = "macirq",
> > > > - .start = LS1X_GMAC1_IRQ,
> > > > - .flags = IORESOURCE_IRQ,
> > > > - },
> > > > -};
> > > > -
> > > > -struct platform_device ls1x_eth1_pdev = {
> > > > - .name = "stmmaceth",
> > > > - .id = 1,
> > > > - .num_resources = ARRAY_SIZE(ls1x_eth1_resources),
> > > > - .resource = ls1x_eth1_resources,
> > > > - .dev = {
> > > > - .platform_data = &ls1x_eth1_pdata,
> > > > - },
> > > > -};
> > > > -#endif /* CONFIG_LOONGSON1_LS1B */
> > > > +#include <irq.h>
> > > >
> > > > /* GPIO */
> > > > static struct resource ls1x_gpio0_resources[] = {
> > > > diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
> > > > index e8290f200096..f23e4e5c96ee 100644
> > > > --- a/arch/mips/loongson32/ls1b/board.c
> > > > +++ b/arch/mips/loongson32/ls1b/board.c
> > > > @@ -34,8 +34,6 @@ static const struct gpio_led_platform_data ls1x_led_pdata __initconst = {
> > > > };
> > > >
> > > > static struct platform_device *ls1b_platform_devices[] __initdata = {
> > > > - &ls1x_eth0_pdev,
> > > > - &ls1x_eth1_pdev,
> > > > &ls1x_ehci_pdev,
> > > > &ls1x_gpio0_pdev,
> > > > &ls1x_gpio1_pdev,
> > > > diff --git a/arch/mips/loongson32/ls1c/board.c b/arch/mips/loongson32/ls1c/board.c
> > > > index a7096964fb30..29bc467fd149 100644
> > > > --- a/arch/mips/loongson32/ls1c/board.c
> > > > +++ b/arch/mips/loongson32/ls1c/board.c
> > > > @@ -6,7 +6,6 @@
> > > > #include <platform.h>
> > > >
> > > > static struct platform_device *ls1c_platform_devices[] __initdata = {
> > > > - &ls1x_eth0_pdev,
> > > > &ls1x_rtc_pdev,
> > > > &ls1x_wdt_pdev,
> > > > };
> > > > --
> > > > 2.39.2
> > > >
> >
> >
> >
> > --
> > Best regards,
> >
> > Keguang Zhang



--
Best regards,

Keguang Zhang

2023-08-02 12:11:39

by Du Huanpeng

[permalink] [raw]
Subject: Re: [PATCH 08/17] MIPS: loongson32: Convert Ethernet platform device to DT

On Wed, Aug 02, 2023 at 11:10:10AM +0800, Keguang Zhang wrote:
> On Wed, Aug 2, 2023 at 2:21 AM Serge Semin <[email protected]> wrote:
> >
> > On Sat, Jul 29, 2023 at 09:43:09PM +0800, Keguang Zhang wrote:
> > > Add Ethernet device nodes for Loongson-1 boards,
> > > and drop the legacy platform devices and data accordingly.
> >
> > It seems to me that your conversion breaks the RGMII mode support.
> > What you need to do is to make sure that the respective flags are set
> > in the MUX space.
> >
> > Regarding the MUX-space. It looks as a pinctrl-setting space. If so
> > adding the new pinctrl driver will be required. Otherwise it can be
> > defined as a syscon-node and then utilized in the Loongson-1 GMAC
> > low-level driver.
> >
> Thanks for your reminder.
> I planned to add the pinctrl driver later.
> Now I'm working on it.
hi, I wrote a tool(work-in-progress) for generating pinctrl driver,
do you want to try, and avoid duplicate work.
and could you merge my ls1c300 devicetree for u-boot, because
u-boot wants to keep the devicetree sync with the linux kernel.
some nodes needed and working are not exist in your devicetree.

[1] https://github.com/hodcarrier/u-boot/blob/upstream/loongson-ls1c300b/v4/arch/mips/dts/loongson32-ls1c300b.dtsi

---
Du Huanpeng
>
> > -Serge(y)
> >
> > >
> > > Signed-off-by: Keguang Zhang <[email protected]>
> > > ---
> > > arch/mips/boot/dts/loongson/loongson1.dtsi | 16 ++
> > > arch/mips/boot/dts/loongson/loongson1b.dtsi | 53 +++++++
> > > arch/mips/boot/dts/loongson/loongson1c.dtsi | 17 ++
> > > arch/mips/boot/dts/loongson/lsgz_1b_dev.dts | 8 +
> > > arch/mips/boot/dts/loongson/smartloong_1c.dts | 4 +
> > > arch/mips/loongson32/common/platform.c | 146 +-----------------
> > > arch/mips/loongson32/ls1b/board.c | 2 -
> > > arch/mips/loongson32/ls1c/board.c | 1 -
> > > 8 files changed, 99 insertions(+), 148 deletions(-)
> > >
> > > diff --git a/arch/mips/boot/dts/loongson/loongson1.dtsi b/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > index c77aa2d0f66c..48bb786bbf10 100644
> > > --- a/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > +++ b/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > @@ -71,6 +71,22 @@ intc3: interrupt-controller@1fd01088 {
> > > interrupt-parent = <&cpu_intc>;
> > > interrupts = <5>;
> > > };
> > > +
> > > + gmac0: ethernet@1fe10000 {
> > > + compatible = "snps,dwmac-3.70a";
> > > + reg = <0x1fe10000 0x10000>;
> > > +
> > > + interrupt-parent = <&intc1>;
> > > + interrupt-names = "macirq";
> > > +
> > > + clocks = <&clkc LS1X_CLKID_AHB>;
> > > + clock-names = "stmmaceth";
> > > +
> > > + snps,pbl = <1>;
> > > +
> > > + status = "disabled";
> > > + };
> > > +
> > > };
> > >
> > > apb: bus@1fe40000 {
> > > diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > index 437a77cee163..42b96c557660 100644
> > > --- a/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > +++ b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > @@ -7,6 +7,11 @@
> > > #include "loongson1.dtsi"
> > >
> > > / {
> > > + aliases {
> > > + ethernet0 = &gmac0;
> > > + ethernet1 = &gmac1;
> > > + };
> > > +
> > > cpus {
> > > #address-cells = <1>;
> > > #size-cells = <0>;
> > > @@ -74,6 +79,54 @@ clkc: clock-controller@1fe78030 {
> > > };
> > > };
> > >
> > > +&ahb {
> > > + gmac1: ethernet@1fe20000 {
> > > + compatible = "snps,dwmac-3.70a";
> > > + reg = <0x1fe20000 0x10000>;
> > > +
> > > + interrupt-parent = <&intc1>;
> > > + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > + interrupt-names = "macirq";
> > > +
> > > + clocks = <&clkc LS1X_CLKID_AHB>;
> > > + clock-names = "stmmaceth";
> > > +
> > > + phy-handle = <&phy1>;
> > > + phy-mode = "mii";
> > > +
> > > + snps,pbl = <1>;
> > > +
> > > + status = "disabled";
> > > +
> > > + mdio1 {
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + compatible = "snps,dwmac-mdio";
> > > +
> > > + phy1: ethernet-phy@0 {
> > > + reg = <0x0>;
> > > + };
> > > + };
> > > + };
> > > +};
> > > +
> > > +&gmac0 {
> > > + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
> > > +
> > > + phy-handle = <&phy0>;
> > > + phy-mode = "mii";
> > > +
> > > + mdio0 {
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + compatible = "snps,dwmac-mdio";
> > > +
> > > + phy0: ethernet-phy@0 {
> > > + reg = <0x0>;
> > > + };
> > > + };
> > > +};
> > > +
> > > &uart1 {
> > > interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > };
> > > diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > index 1dd575b7b2f9..5b3e0f9280f6 100644
> > > --- a/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > +++ b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > @@ -41,6 +41,23 @@ intc4: interrupt-controller@1fd010a0 {
> > > };
> > > };
> > >
> > > +&gmac0 {
> > > + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > +
> > > + phy-handle = <&phy0>;
> > > + phy-mode = "rmii";
> > > +
> > > + mdio0 {
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + compatible = "snps,dwmac-mdio";
> > > +
> > > + phy0: ethernet-phy@13 {
> > > + reg = <0x13>;
> > > + };
> > > + };
> > > +};
> > > +
> > > &uart1 {
> > > interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
> > > };
> > > diff --git a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > index 89c3dfa574f7..a43df21f2904 100644
> > > --- a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > +++ b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > @@ -28,6 +28,14 @@ xtal: xtal {
> > > };
> > > };
> > >
> > > +&gmac0 {
> > > + status = "okay";
> > > +};
> > > +
> > > +&gmac1 {
> > > + status = "okay";
> > > +};
> > > +
> > > &uart0 {
> > > status = "okay";
> > > };
> > > diff --git a/arch/mips/boot/dts/loongson/smartloong_1c.dts b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > index 188aab9e3685..2d8f304aa2c4 100644
> > > --- a/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > +++ b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > @@ -28,6 +28,10 @@ xtal: xtal {
> > > };
> > > };
> > >
> > > +&gmac0 {
> > > + status = "okay";
> > > +};
> > > +
> > > &uart0 {
> > > status = "okay";
> > > };
> > > diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
> > > index 8272b4133e25..817518531b9b 100644
> > > --- a/arch/mips/loongson32/common/platform.c
> > > +++ b/arch/mips/loongson32/common/platform.c
> > > @@ -8,157 +8,13 @@
> > > #include <linux/err.h>
> > > #include <linux/mtd/partitions.h>
> > > #include <linux/sizes.h>
> > > -#include <linux/phy.h>
> > > -#include <linux/stmmac.h>
> > > #include <linux/usb/ehci_pdriver.h>
> > >
> > > #include <platform.h>
> > > #include <loongson1.h>
> > > #include <dma.h>
> > > #include <nand.h>
> > > -
> > > -/* Synopsys Ethernet GMAC */
> > > -static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = {
> > > - .phy_mask = 0,
> > > -};
> > > -
> > > -static struct stmmac_dma_cfg ls1x_eth_dma_cfg = {
> > > - .pbl = 1,
> > > -};
> > > -
> > > -int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
> > > -{
> > > - struct plat_stmmacenet_data *plat_dat = NULL;
> > > - u32 val;
> > > -
> > > - val = __raw_readl(LS1X_MUX_CTRL1);
> > > -
> > > -#if defined(CONFIG_LOONGSON1_LS1B)
> > > - plat_dat = dev_get_platdata(&pdev->dev);
> > > - if (plat_dat->bus_id) {
> > > - __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
> > > - GMAC1_USE_UART0, LS1X_MUX_CTRL0);
> > > - switch (plat_dat->phy_interface) {
> > > - case PHY_INTERFACE_MODE_RGMII:
> > > - val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> > > - break;
> > > - case PHY_INTERFACE_MODE_MII:
> > > - val |= (GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> > > - break;
> > > - default:
> > > - pr_err("unsupported mii mode %d\n",
> > > - plat_dat->phy_interface);
> > > - return -ENOTSUPP;
> > > - }
> > > - val &= ~GMAC1_SHUT;
> > > - } else {
> > > - switch (plat_dat->phy_interface) {
> > > - case PHY_INTERFACE_MODE_RGMII:
> > > - val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> > > - break;
> > > - case PHY_INTERFACE_MODE_MII:
> > > - val |= (GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> > > - break;
> > > - default:
> > > - pr_err("unsupported mii mode %d\n",
> > > - plat_dat->phy_interface);
> > > - return -ENOTSUPP;
> > > - }
> > > - val &= ~GMAC0_SHUT;
> > > - }
> > > - __raw_writel(val, LS1X_MUX_CTRL1);
> > > -#elif defined(CONFIG_LOONGSON1_LS1C)
> > > - plat_dat = dev_get_platdata(&pdev->dev);
> > > -
> > > - val &= ~PHY_INTF_SELI;
> > > - if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
> > > - val |= 0x4 << PHY_INTF_SELI_SHIFT;
> > > - __raw_writel(val, LS1X_MUX_CTRL1);
> > > -
> > > - val = __raw_readl(LS1X_MUX_CTRL0);
> > > - __raw_writel(val & (~GMAC_SHUT), LS1X_MUX_CTRL0);
> > > -#endif
> > > -
> > > - return 0;
> > > -}
> > > -
> > > -static struct plat_stmmacenet_data ls1x_eth0_pdata = {
> > > - .bus_id = 0,
> > > - .phy_addr = -1,
> > > -#if defined(CONFIG_LOONGSON1_LS1B)
> > > - .phy_interface = PHY_INTERFACE_MODE_MII,
> > > -#elif defined(CONFIG_LOONGSON1_LS1C)
> > > - .phy_interface = PHY_INTERFACE_MODE_RMII,
> > > -#endif
> > > - .mdio_bus_data = &ls1x_mdio_bus_data,
> > > - .dma_cfg = &ls1x_eth_dma_cfg,
> > > - .has_gmac = 1,
> > > - .tx_coe = 1,
> > > - .rx_queues_to_use = 1,
> > > - .tx_queues_to_use = 1,
> > > - .init = ls1x_eth_mux_init,
> > > -};
> > > -
> > > -static struct resource ls1x_eth0_resources[] = {
> > > - [0] = {
> > > - .start = LS1X_GMAC0_BASE,
> > > - .end = LS1X_GMAC0_BASE + SZ_64K - 1,
> > > - .flags = IORESOURCE_MEM,
> > > - },
> > > - [1] = {
> > > - .name = "macirq",
> > > - .start = LS1X_GMAC0_IRQ,
> > > - .flags = IORESOURCE_IRQ,
> > > - },
> > > -};
> > > -
> > > -struct platform_device ls1x_eth0_pdev = {
> > > - .name = "stmmaceth",
> > > - .id = 0,
> > > - .num_resources = ARRAY_SIZE(ls1x_eth0_resources),
> > > - .resource = ls1x_eth0_resources,
> > > - .dev = {
> > > - .platform_data = &ls1x_eth0_pdata,
> > > - },
> > > -};
> > > -
> > > -#ifdef CONFIG_LOONGSON1_LS1B
> > > -static struct plat_stmmacenet_data ls1x_eth1_pdata = {
> > > - .bus_id = 1,
> > > - .phy_addr = -1,
> > > - .phy_interface = PHY_INTERFACE_MODE_MII,
> > > - .mdio_bus_data = &ls1x_mdio_bus_data,
> > > - .dma_cfg = &ls1x_eth_dma_cfg,
> > > - .has_gmac = 1,
> > > - .tx_coe = 1,
> > > - .rx_queues_to_use = 1,
> > > - .tx_queues_to_use = 1,
> > > - .init = ls1x_eth_mux_init,
> > > -};
> > > -
> > > -static struct resource ls1x_eth1_resources[] = {
> > > - [0] = {
> > > - .start = LS1X_GMAC1_BASE,
> > > - .end = LS1X_GMAC1_BASE + SZ_64K - 1,
> > > - .flags = IORESOURCE_MEM,
> > > - },
> > > - [1] = {
> > > - .name = "macirq",
> > > - .start = LS1X_GMAC1_IRQ,
> > > - .flags = IORESOURCE_IRQ,
> > > - },
> > > -};
> > > -
> > > -struct platform_device ls1x_eth1_pdev = {
> > > - .name = "stmmaceth",
> > > - .id = 1,
> > > - .num_resources = ARRAY_SIZE(ls1x_eth1_resources),
> > > - .resource = ls1x_eth1_resources,
> > > - .dev = {
> > > - .platform_data = &ls1x_eth1_pdata,
> > > - },
> > > -};
> > > -#endif /* CONFIG_LOONGSON1_LS1B */
> > > +#include <irq.h>
> > >
> > > /* GPIO */
> > > static struct resource ls1x_gpio0_resources[] = {
> > > diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
> > > index e8290f200096..f23e4e5c96ee 100644
> > > --- a/arch/mips/loongson32/ls1b/board.c
> > > +++ b/arch/mips/loongson32/ls1b/board.c
> > > @@ -34,8 +34,6 @@ static const struct gpio_led_platform_data ls1x_led_pdata __initconst = {
> > > };
> > >
> > > static struct platform_device *ls1b_platform_devices[] __initdata = {
> > > - &ls1x_eth0_pdev,
> > > - &ls1x_eth1_pdev,
> > > &ls1x_ehci_pdev,
> > > &ls1x_gpio0_pdev,
> > > &ls1x_gpio1_pdev,
> > > diff --git a/arch/mips/loongson32/ls1c/board.c b/arch/mips/loongson32/ls1c/board.c
> > > index a7096964fb30..29bc467fd149 100644
> > > --- a/arch/mips/loongson32/ls1c/board.c
> > > +++ b/arch/mips/loongson32/ls1c/board.c
> > > @@ -6,7 +6,6 @@
> > > #include <platform.h>
> > >
> > > static struct platform_device *ls1c_platform_devices[] __initdata = {
> > > - &ls1x_eth0_pdev,
> > > &ls1x_rtc_pdev,
> > > &ls1x_wdt_pdev,
> > > };
> > > --
> > > 2.39.2
> > >
>
>
>
> --
> Best regards,
>
> Keguang Zhang


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2023-08-02 13:21:05

by Keguang Zhang

[permalink] [raw]
Subject: Re: [PATCH 08/17] MIPS: loongson32: Convert Ethernet platform device to DT

On Wed, Aug 2, 2023 at 5:44 PM Serge Semin <[email protected]> wrote:
>
> On Wed, Aug 02, 2023 at 11:10:10AM +0800, Keguang Zhang wrote:
> > On Wed, Aug 2, 2023 at 2:21 AM Serge Semin <[email protected]> wrote:
> > >
> > > On Sat, Jul 29, 2023 at 09:43:09PM +0800, Keguang Zhang wrote:
> > > > Add Ethernet device nodes for Loongson-1 boards,
> > > > and drop the legacy platform devices and data accordingly.
> > >
> > > It seems to me that your conversion breaks the RGMII mode support.
> > > What you need to do is to make sure that the respective flags are set
> > > in the MUX space.
> > >
> > > Regarding the MUX-space. It looks as a pinctrl-setting space. If so
> > > adding the new pinctrl driver will be required. Otherwise it can be
> > > defined as a syscon-node and then utilized in the Loongson-1 GMAC
> > > low-level driver.
> > >
>
> > Thanks for your reminder.
> > I planned to add the pinctrl driver later.
> > Now I'm working on it.
>
> I have been having a patch moving the Loongson32 MAC driver to the
> STMMAC driver directory for quite a while in my tree. You can use it
> in your series (completely, as a reference or template, whatever). The
> only thing you'll need to do is to add the pinctrl-based version of
> the ls1b_eth_mux_init()/ls1c_eth_mux_init() methods in there and
> test/debug it of course.
>
> Note 1. It seems to me that it would work better if you defined the
> plat_stmmacenet_data.fix_mac_speed() callback instead of
> plat_stmmacenet_data.init() for LS1B which supports MII and RGMII aka
> 100Mbps and 1000Mbps speeds.
>
Thanks!
I will look into it.
However, I think ls1x_eth_mux_init() belongs to the scope of pinctrl or syscon.
IMHO it is not worth implementing a glue driver for Loongson1.

> Note 2. The patch I've sent was only built-tested. I don't have any
> Loongson hardware.
>
> Note 3. After the suggested patch is applied you can also completely
> move the include/linux/stmmac.h header file to the STMMAC-driver
> directory as a following up cleanup update (it should be renamed to
> stmmac_platform.h since stmmac.h is already available in there).
> It can be done since there won't any users of that file outside the
> STMMAC-driver directory. So there is no point in keeping it in the
> common headers directory anymore.
>
> -Serge(y)
>
> >
> > > -Serge(y)
> > >
> > > >
> > > > Signed-off-by: Keguang Zhang <[email protected]>
> > > > ---
> > > > arch/mips/boot/dts/loongson/loongson1.dtsi | 16 ++
> > > > arch/mips/boot/dts/loongson/loongson1b.dtsi | 53 +++++++
> > > > arch/mips/boot/dts/loongson/loongson1c.dtsi | 17 ++
> > > > arch/mips/boot/dts/loongson/lsgz_1b_dev.dts | 8 +
> > > > arch/mips/boot/dts/loongson/smartloong_1c.dts | 4 +
> > > > arch/mips/loongson32/common/platform.c | 146 +-----------------
> > > > arch/mips/loongson32/ls1b/board.c | 2 -
> > > > arch/mips/loongson32/ls1c/board.c | 1 -
> > > > 8 files changed, 99 insertions(+), 148 deletions(-)
> > > >
> > > > diff --git a/arch/mips/boot/dts/loongson/loongson1.dtsi b/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > > index c77aa2d0f66c..48bb786bbf10 100644
> > > > --- a/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > > +++ b/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > > @@ -71,6 +71,22 @@ intc3: interrupt-controller@1fd01088 {
> > > > interrupt-parent = <&cpu_intc>;
> > > > interrupts = <5>;
> > > > };
> > > > +
> > > > + gmac0: ethernet@1fe10000 {
> > > > + compatible = "snps,dwmac-3.70a";
> > > > + reg = <0x1fe10000 0x10000>;
> > > > +
> > > > + interrupt-parent = <&intc1>;
> > > > + interrupt-names = "macirq";
> > > > +
> > > > + clocks = <&clkc LS1X_CLKID_AHB>;
> > > > + clock-names = "stmmaceth";
> > > > +
> > > > + snps,pbl = <1>;
> > > > +
> > > > + status = "disabled";
> > > > + };
> > > > +
> > > > };
> > > >
> > > > apb: bus@1fe40000 {
> > > > diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > > index 437a77cee163..42b96c557660 100644
> > > > --- a/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > > +++ b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > > @@ -7,6 +7,11 @@
> > > > #include "loongson1.dtsi"
> > > >
> > > > / {
> > > > + aliases {
> > > > + ethernet0 = &gmac0;
> > > > + ethernet1 = &gmac1;
> > > > + };
> > > > +
> > > > cpus {
> > > > #address-cells = <1>;
> > > > #size-cells = <0>;
> > > > @@ -74,6 +79,54 @@ clkc: clock-controller@1fe78030 {
> > > > };
> > > > };
> > > >
> > > > +&ahb {
> > > > + gmac1: ethernet@1fe20000 {
> > > > + compatible = "snps,dwmac-3.70a";
> > > > + reg = <0x1fe20000 0x10000>;
> > > > +
> > > > + interrupt-parent = <&intc1>;
> > > > + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > > + interrupt-names = "macirq";
> > > > +
> > > > + clocks = <&clkc LS1X_CLKID_AHB>;
> > > > + clock-names = "stmmaceth";
> > > > +
> > > > + phy-handle = <&phy1>;
> > > > + phy-mode = "mii";
> > > > +
> > > > + snps,pbl = <1>;
> > > > +
> > > > + status = "disabled";
> > > > +
> > > > + mdio1 {
> > > > + #address-cells = <1>;
> > > > + #size-cells = <0>;
> > > > + compatible = "snps,dwmac-mdio";
> > > > +
> > > > + phy1: ethernet-phy@0 {
> > > > + reg = <0x0>;
> > > > + };
> > > > + };
> > > > + };
> > > > +};
> > > > +
> > > > +&gmac0 {
> > > > + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
> > > > +
> > > > + phy-handle = <&phy0>;
> > > > + phy-mode = "mii";
> > > > +
> > > > + mdio0 {
> > > > + #address-cells = <1>;
> > > > + #size-cells = <0>;
> > > > + compatible = "snps,dwmac-mdio";
> > > > +
> > > > + phy0: ethernet-phy@0 {
> > > > + reg = <0x0>;
> > > > + };
> > > > + };
> > > > +};
> > > > +
> > > > &uart1 {
> > > > interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > > };
> > > > diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > > index 1dd575b7b2f9..5b3e0f9280f6 100644
> > > > --- a/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > > +++ b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > > @@ -41,6 +41,23 @@ intc4: interrupt-controller@1fd010a0 {
> > > > };
> > > > };
> > > >
> > > > +&gmac0 {
> > > > + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > > +
> > > > + phy-handle = <&phy0>;
> > > > + phy-mode = "rmii";
> > > > +
> > > > + mdio0 {
> > > > + #address-cells = <1>;
> > > > + #size-cells = <0>;
> > > > + compatible = "snps,dwmac-mdio";
> > > > +
> > > > + phy0: ethernet-phy@13 {
> > > > + reg = <0x13>;
> > > > + };
> > > > + };
> > > > +};
> > > > +
> > > > &uart1 {
> > > > interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
> > > > };
> > > > diff --git a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > > index 89c3dfa574f7..a43df21f2904 100644
> > > > --- a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > > +++ b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > > @@ -28,6 +28,14 @@ xtal: xtal {
> > > > };
> > > > };
> > > >
> > > > +&gmac0 {
> > > > + status = "okay";
> > > > +};
> > > > +
> > > > +&gmac1 {
> > > > + status = "okay";
> > > > +};
> > > > +
> > > > &uart0 {
> > > > status = "okay";
> > > > };
> > > > diff --git a/arch/mips/boot/dts/loongson/smartloong_1c.dts b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > > index 188aab9e3685..2d8f304aa2c4 100644
> > > > --- a/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > > +++ b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > > @@ -28,6 +28,10 @@ xtal: xtal {
> > > > };
> > > > };
> > > >
> > > > +&gmac0 {
> > > > + status = "okay";
> > > > +};
> > > > +
> > > > &uart0 {
> > > > status = "okay";
> > > > };
> > > > diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
> > > > index 8272b4133e25..817518531b9b 100644
> > > > --- a/arch/mips/loongson32/common/platform.c
> > > > +++ b/arch/mips/loongson32/common/platform.c
> > > > @@ -8,157 +8,13 @@
> > > > #include <linux/err.h>
> > > > #include <linux/mtd/partitions.h>
> > > > #include <linux/sizes.h>
> > > > -#include <linux/phy.h>
> > > > -#include <linux/stmmac.h>
> > > > #include <linux/usb/ehci_pdriver.h>
> > > >
> > > > #include <platform.h>
> > > > #include <loongson1.h>
> > > > #include <dma.h>
> > > > #include <nand.h>
> > > > -
> > > > -/* Synopsys Ethernet GMAC */
> > > > -static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = {
> > > > - .phy_mask = 0,
> > > > -};
> > > > -
> > > > -static struct stmmac_dma_cfg ls1x_eth_dma_cfg = {
> > > > - .pbl = 1,
> > > > -};
> > > > -
> > > > -int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
> > > > -{
> > > > - struct plat_stmmacenet_data *plat_dat = NULL;
> > > > - u32 val;
> > > > -
> > > > - val = __raw_readl(LS1X_MUX_CTRL1);
> > > > -
> > > > -#if defined(CONFIG_LOONGSON1_LS1B)
> > > > - plat_dat = dev_get_platdata(&pdev->dev);
> > > > - if (plat_dat->bus_id) {
> > > > - __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
> > > > - GMAC1_USE_UART0, LS1X_MUX_CTRL0);
> > > > - switch (plat_dat->phy_interface) {
> > > > - case PHY_INTERFACE_MODE_RGMII:
> > > > - val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> > > > - break;
> > > > - case PHY_INTERFACE_MODE_MII:
> > > > - val |= (GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> > > > - break;
> > > > - default:
> > > > - pr_err("unsupported mii mode %d\n",
> > > > - plat_dat->phy_interface);
> > > > - return -ENOTSUPP;
> > > > - }
> > > > - val &= ~GMAC1_SHUT;
> > > > - } else {
> > > > - switch (plat_dat->phy_interface) {
> > > > - case PHY_INTERFACE_MODE_RGMII:
> > > > - val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> > > > - break;
> > > > - case PHY_INTERFACE_MODE_MII:
> > > > - val |= (GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> > > > - break;
> > > > - default:
> > > > - pr_err("unsupported mii mode %d\n",
> > > > - plat_dat->phy_interface);
> > > > - return -ENOTSUPP;
> > > > - }
> > > > - val &= ~GMAC0_SHUT;
> > > > - }
> > > > - __raw_writel(val, LS1X_MUX_CTRL1);
> > > > -#elif defined(CONFIG_LOONGSON1_LS1C)
> > > > - plat_dat = dev_get_platdata(&pdev->dev);
> > > > -
> > > > - val &= ~PHY_INTF_SELI;
> > > > - if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
> > > > - val |= 0x4 << PHY_INTF_SELI_SHIFT;
> > > > - __raw_writel(val, LS1X_MUX_CTRL1);
> > > > -
> > > > - val = __raw_readl(LS1X_MUX_CTRL0);
> > > > - __raw_writel(val & (~GMAC_SHUT), LS1X_MUX_CTRL0);
> > > > -#endif
> > > > -
> > > > - return 0;
> > > > -}
> > > > -
> > > > -static struct plat_stmmacenet_data ls1x_eth0_pdata = {
> > > > - .bus_id = 0,
> > > > - .phy_addr = -1,
> > > > -#if defined(CONFIG_LOONGSON1_LS1B)
> > > > - .phy_interface = PHY_INTERFACE_MODE_MII,
> > > > -#elif defined(CONFIG_LOONGSON1_LS1C)
> > > > - .phy_interface = PHY_INTERFACE_MODE_RMII,
> > > > -#endif
> > > > - .mdio_bus_data = &ls1x_mdio_bus_data,
> > > > - .dma_cfg = &ls1x_eth_dma_cfg,
> > > > - .has_gmac = 1,
> > > > - .tx_coe = 1,
> > > > - .rx_queues_to_use = 1,
> > > > - .tx_queues_to_use = 1,
> > > > - .init = ls1x_eth_mux_init,
> > > > -};
> > > > -
> > > > -static struct resource ls1x_eth0_resources[] = {
> > > > - [0] = {
> > > > - .start = LS1X_GMAC0_BASE,
> > > > - .end = LS1X_GMAC0_BASE + SZ_64K - 1,
> > > > - .flags = IORESOURCE_MEM,
> > > > - },
> > > > - [1] = {
> > > > - .name = "macirq",
> > > > - .start = LS1X_GMAC0_IRQ,
> > > > - .flags = IORESOURCE_IRQ,
> > > > - },
> > > > -};
> > > > -
> > > > -struct platform_device ls1x_eth0_pdev = {
> > > > - .name = "stmmaceth",
> > > > - .id = 0,
> > > > - .num_resources = ARRAY_SIZE(ls1x_eth0_resources),
> > > > - .resource = ls1x_eth0_resources,
> > > > - .dev = {
> > > > - .platform_data = &ls1x_eth0_pdata,
> > > > - },
> > > > -};
> > > > -
> > > > -#ifdef CONFIG_LOONGSON1_LS1B
> > > > -static struct plat_stmmacenet_data ls1x_eth1_pdata = {
> > > > - .bus_id = 1,
> > > > - .phy_addr = -1,
> > > > - .phy_interface = PHY_INTERFACE_MODE_MII,
> > > > - .mdio_bus_data = &ls1x_mdio_bus_data,
> > > > - .dma_cfg = &ls1x_eth_dma_cfg,
> > > > - .has_gmac = 1,
> > > > - .tx_coe = 1,
> > > > - .rx_queues_to_use = 1,
> > > > - .tx_queues_to_use = 1,
> > > > - .init = ls1x_eth_mux_init,
> > > > -};
> > > > -
> > > > -static struct resource ls1x_eth1_resources[] = {
> > > > - [0] = {
> > > > - .start = LS1X_GMAC1_BASE,
> > > > - .end = LS1X_GMAC1_BASE + SZ_64K - 1,
> > > > - .flags = IORESOURCE_MEM,
> > > > - },
> > > > - [1] = {
> > > > - .name = "macirq",
> > > > - .start = LS1X_GMAC1_IRQ,
> > > > - .flags = IORESOURCE_IRQ,
> > > > - },
> > > > -};
> > > > -
> > > > -struct platform_device ls1x_eth1_pdev = {
> > > > - .name = "stmmaceth",
> > > > - .id = 1,
> > > > - .num_resources = ARRAY_SIZE(ls1x_eth1_resources),
> > > > - .resource = ls1x_eth1_resources,
> > > > - .dev = {
> > > > - .platform_data = &ls1x_eth1_pdata,
> > > > - },
> > > > -};
> > > > -#endif /* CONFIG_LOONGSON1_LS1B */
> > > > +#include <irq.h>
> > > >
> > > > /* GPIO */
> > > > static struct resource ls1x_gpio0_resources[] = {
> > > > diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
> > > > index e8290f200096..f23e4e5c96ee 100644
> > > > --- a/arch/mips/loongson32/ls1b/board.c
> > > > +++ b/arch/mips/loongson32/ls1b/board.c
> > > > @@ -34,8 +34,6 @@ static const struct gpio_led_platform_data ls1x_led_pdata __initconst = {
> > > > };
> > > >
> > > > static struct platform_device *ls1b_platform_devices[] __initdata = {
> > > > - &ls1x_eth0_pdev,
> > > > - &ls1x_eth1_pdev,
> > > > &ls1x_ehci_pdev,
> > > > &ls1x_gpio0_pdev,
> > > > &ls1x_gpio1_pdev,
> > > > diff --git a/arch/mips/loongson32/ls1c/board.c b/arch/mips/loongson32/ls1c/board.c
> > > > index a7096964fb30..29bc467fd149 100644
> > > > --- a/arch/mips/loongson32/ls1c/board.c
> > > > +++ b/arch/mips/loongson32/ls1c/board.c
> > > > @@ -6,7 +6,6 @@
> > > > #include <platform.h>
> > > >
> > > > static struct platform_device *ls1c_platform_devices[] __initdata = {
> > > > - &ls1x_eth0_pdev,
> > > > &ls1x_rtc_pdev,
> > > > &ls1x_wdt_pdev,
> > > > };
> > > > --
> > > > 2.39.2
> > > >
> >
> >
> >
> > --
> > Best regards,
> >
> > Keguang Zhang



--
Best regards,

Keguang Zhang

2023-08-02 15:09:02

by Serge Semin

[permalink] [raw]
Subject: Re: [PATCH 08/17] MIPS: loongson32: Convert Ethernet platform device to DT

On Wed, Aug 02, 2023 at 07:19:55PM +0800, Keguang Zhang wrote:
> On Wed, Aug 2, 2023 at 5:44 PM Serge Semin <[email protected]> wrote:
> >
> > On Wed, Aug 02, 2023 at 11:10:10AM +0800, Keguang Zhang wrote:
> > > On Wed, Aug 2, 2023 at 2:21 AM Serge Semin <[email protected]> wrote:
> > > >
> > > > On Sat, Jul 29, 2023 at 09:43:09PM +0800, Keguang Zhang wrote:
> > > > > Add Ethernet device nodes for Loongson-1 boards,
> > > > > and drop the legacy platform devices and data accordingly.
> > > >
> > > > It seems to me that your conversion breaks the RGMII mode support.
> > > > What you need to do is to make sure that the respective flags are set
> > > > in the MUX space.
> > > >
> > > > Regarding the MUX-space. It looks as a pinctrl-setting space. If so
> > > > adding the new pinctrl driver will be required. Otherwise it can be
> > > > defined as a syscon-node and then utilized in the Loongson-1 GMAC
> > > > low-level driver.
> > > >
> >
> > > Thanks for your reminder.
> > > I planned to add the pinctrl driver later.
> > > Now I'm working on it.
> >
> > I have been having a patch moving the Loongson32 MAC driver to the
> > STMMAC driver directory for quite a while in my tree. You can use it
> > in your series (completely, as a reference or template, whatever). The
> > only thing you'll need to do is to add the pinctrl-based version of
> > the ls1b_eth_mux_init()/ls1c_eth_mux_init() methods in there and
> > test/debug it of course.
> >
> > Note 1. It seems to me that it would work better if you defined the
> > plat_stmmacenet_data.fix_mac_speed() callback instead of
> > plat_stmmacenet_data.init() for LS1B which supports MII and RGMII aka
> > 100Mbps and 1000Mbps speeds.
> >

> Thanks!
> I will look into it.
> However, I think ls1x_eth_mux_init() belongs to the scope of pinctrl or syscon.

Partly yes and partly no. The pins-mode setup functionality needs to
be implemented in pinctrl, but switching between RGMII and MII modes
must be done in the GMAC driver (selecting between different pinctrl
states).

Alternatively you can define the MUX1 and MUX2 registers as the
syscon-regmap space, have it referenced in the Loongson32 MAC DT-node
and then switch between the modes manually in a similar way as it done
in the current MAC platform code or in my patch. But IMO implementing
it by means of the pin-controller would be much better. Note it
doesn't prevent you from directly accessing the MUX-registers from the
drivers and using these registers as the regspace for a
syscon-controller driver: see syscon_node_to_regmap() method.

> IMHO it is not worth implementing a glue driver for Loongson1.

Generic DW GMAC driver won't fully work for LS1B which requires the
phy-mode (phy_interface) change. In order for that to work correctly
it needs to be done in the framework of the fix_mac_speed() callback
which is called on each interface open procedure. Note the network
phylink semantic implies that the phy-mode may change in runtime
between interface re-open cycle (for instance in order to be able to
switch between different network PHY-s connected to the same MAC
interface). That's why fix_mac_speed() is the best place for the PHY
modes change, not the init() callback. Due to all of that you won't
escape with just using a combination of the DT-properties.

-Serge(y)

>
> > Note 2. The patch I've sent was only built-tested. I don't have any
> > Loongson hardware.
> >
> > Note 3. After the suggested patch is applied you can also completely
> > move the include/linux/stmmac.h header file to the STMMAC-driver
> > directory as a following up cleanup update (it should be renamed to
> > stmmac_platform.h since stmmac.h is already available in there).
> > It can be done since there won't any users of that file outside the
> > STMMAC-driver directory. So there is no point in keeping it in the
> > common headers directory anymore.
> >
> > -Serge(y)
> >
> > >
> > > > -Serge(y)
> > > >
> > > > >
> > > > > Signed-off-by: Keguang Zhang <[email protected]>
> > > > > ---
> > > > > arch/mips/boot/dts/loongson/loongson1.dtsi | 16 ++
> > > > > arch/mips/boot/dts/loongson/loongson1b.dtsi | 53 +++++++
> > > > > arch/mips/boot/dts/loongson/loongson1c.dtsi | 17 ++
> > > > > arch/mips/boot/dts/loongson/lsgz_1b_dev.dts | 8 +
> > > > > arch/mips/boot/dts/loongson/smartloong_1c.dts | 4 +
> > > > > arch/mips/loongson32/common/platform.c | 146 +-----------------
> > > > > arch/mips/loongson32/ls1b/board.c | 2 -
> > > > > arch/mips/loongson32/ls1c/board.c | 1 -
> > > > > 8 files changed, 99 insertions(+), 148 deletions(-)
> > > > >
> > > > > diff --git a/arch/mips/boot/dts/loongson/loongson1.dtsi b/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > > > index c77aa2d0f66c..48bb786bbf10 100644
> > > > > --- a/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > > > +++ b/arch/mips/boot/dts/loongson/loongson1.dtsi
> > > > > @@ -71,6 +71,22 @@ intc3: interrupt-controller@1fd01088 {
> > > > > interrupt-parent = <&cpu_intc>;
> > > > > interrupts = <5>;
> > > > > };
> > > > > +
> > > > > + gmac0: ethernet@1fe10000 {
> > > > > + compatible = "snps,dwmac-3.70a";
> > > > > + reg = <0x1fe10000 0x10000>;
> > > > > +
> > > > > + interrupt-parent = <&intc1>;
> > > > > + interrupt-names = "macirq";
> > > > > +
> > > > > + clocks = <&clkc LS1X_CLKID_AHB>;
> > > > > + clock-names = "stmmaceth";
> > > > > +
> > > > > + snps,pbl = <1>;
> > > > > +
> > > > > + status = "disabled";
> > > > > + };
> > > > > +
> > > > > };
> > > > >
> > > > > apb: bus@1fe40000 {
> > > > > diff --git a/arch/mips/boot/dts/loongson/loongson1b.dtsi b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > > > index 437a77cee163..42b96c557660 100644
> > > > > --- a/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > > > +++ b/arch/mips/boot/dts/loongson/loongson1b.dtsi
> > > > > @@ -7,6 +7,11 @@
> > > > > #include "loongson1.dtsi"
> > > > >
> > > > > / {
> > > > > + aliases {
> > > > > + ethernet0 = &gmac0;
> > > > > + ethernet1 = &gmac1;
> > > > > + };
> > > > > +
> > > > > cpus {
> > > > > #address-cells = <1>;
> > > > > #size-cells = <0>;
> > > > > @@ -74,6 +79,54 @@ clkc: clock-controller@1fe78030 {
> > > > > };
> > > > > };
> > > > >
> > > > > +&ahb {
> > > > > + gmac1: ethernet@1fe20000 {
> > > > > + compatible = "snps,dwmac-3.70a";
> > > > > + reg = <0x1fe20000 0x10000>;
> > > > > +
> > > > > + interrupt-parent = <&intc1>;
> > > > > + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > > > + interrupt-names = "macirq";
> > > > > +
> > > > > + clocks = <&clkc LS1X_CLKID_AHB>;
> > > > > + clock-names = "stmmaceth";
> > > > > +
> > > > > + phy-handle = <&phy1>;
> > > > > + phy-mode = "mii";
> > > > > +
> > > > > + snps,pbl = <1>;
> > > > > +
> > > > > + status = "disabled";
> > > > > +
> > > > > + mdio1 {
> > > > > + #address-cells = <1>;
> > > > > + #size-cells = <0>;
> > > > > + compatible = "snps,dwmac-mdio";
> > > > > +
> > > > > + phy1: ethernet-phy@0 {
> > > > > + reg = <0x0>;
> > > > > + };
> > > > > + };
> > > > > + };
> > > > > +};
> > > > > +
> > > > > +&gmac0 {
> > > > > + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
> > > > > +
> > > > > + phy-handle = <&phy0>;
> > > > > + phy-mode = "mii";
> > > > > +
> > > > > + mdio0 {
> > > > > + #address-cells = <1>;
> > > > > + #size-cells = <0>;
> > > > > + compatible = "snps,dwmac-mdio";
> > > > > +
> > > > > + phy0: ethernet-phy@0 {
> > > > > + reg = <0x0>;
> > > > > + };
> > > > > + };
> > > > > +};
> > > > > +
> > > > > &uart1 {
> > > > > interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > > > };
> > > > > diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > > > index 1dd575b7b2f9..5b3e0f9280f6 100644
> > > > > --- a/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > > > +++ b/arch/mips/boot/dts/loongson/loongson1c.dtsi
> > > > > @@ -41,6 +41,23 @@ intc4: interrupt-controller@1fd010a0 {
> > > > > };
> > > > > };
> > > > >
> > > > > +&gmac0 {
> > > > > + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
> > > > > +
> > > > > + phy-handle = <&phy0>;
> > > > > + phy-mode = "rmii";
> > > > > +
> > > > > + mdio0 {
> > > > > + #address-cells = <1>;
> > > > > + #size-cells = <0>;
> > > > > + compatible = "snps,dwmac-mdio";
> > > > > +
> > > > > + phy0: ethernet-phy@13 {
> > > > > + reg = <0x13>;
> > > > > + };
> > > > > + };
> > > > > +};
> > > > > +
> > > > > &uart1 {
> > > > > interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
> > > > > };
> > > > > diff --git a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > > > index 89c3dfa574f7..a43df21f2904 100644
> > > > > --- a/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > > > +++ b/arch/mips/boot/dts/loongson/lsgz_1b_dev.dts
> > > > > @@ -28,6 +28,14 @@ xtal: xtal {
> > > > > };
> > > > > };
> > > > >
> > > > > +&gmac0 {
> > > > > + status = "okay";
> > > > > +};
> > > > > +
> > > > > +&gmac1 {
> > > > > + status = "okay";
> > > > > +};
> > > > > +
> > > > > &uart0 {
> > > > > status = "okay";
> > > > > };
> > > > > diff --git a/arch/mips/boot/dts/loongson/smartloong_1c.dts b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > > > index 188aab9e3685..2d8f304aa2c4 100644
> > > > > --- a/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > > > +++ b/arch/mips/boot/dts/loongson/smartloong_1c.dts
> > > > > @@ -28,6 +28,10 @@ xtal: xtal {
> > > > > };
> > > > > };
> > > > >
> > > > > +&gmac0 {
> > > > > + status = "okay";
> > > > > +};
> > > > > +
> > > > > &uart0 {
> > > > > status = "okay";
> > > > > };
> > > > > diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
> > > > > index 8272b4133e25..817518531b9b 100644
> > > > > --- a/arch/mips/loongson32/common/platform.c
> > > > > +++ b/arch/mips/loongson32/common/platform.c
> > > > > @@ -8,157 +8,13 @@
> > > > > #include <linux/err.h>
> > > > > #include <linux/mtd/partitions.h>
> > > > > #include <linux/sizes.h>
> > > > > -#include <linux/phy.h>
> > > > > -#include <linux/stmmac.h>
> > > > > #include <linux/usb/ehci_pdriver.h>
> > > > >
> > > > > #include <platform.h>
> > > > > #include <loongson1.h>
> > > > > #include <dma.h>
> > > > > #include <nand.h>
> > > > > -
> > > > > -/* Synopsys Ethernet GMAC */
> > > > > -static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = {
> > > > > - .phy_mask = 0,
> > > > > -};
> > > > > -
> > > > > -static struct stmmac_dma_cfg ls1x_eth_dma_cfg = {
> > > > > - .pbl = 1,
> > > > > -};
> > > > > -
> > > > > -int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
> > > > > -{
> > > > > - struct plat_stmmacenet_data *plat_dat = NULL;
> > > > > - u32 val;
> > > > > -
> > > > > - val = __raw_readl(LS1X_MUX_CTRL1);
> > > > > -
> > > > > -#if defined(CONFIG_LOONGSON1_LS1B)
> > > > > - plat_dat = dev_get_platdata(&pdev->dev);
> > > > > - if (plat_dat->bus_id) {
> > > > > - __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
> > > > > - GMAC1_USE_UART0, LS1X_MUX_CTRL0);
> > > > > - switch (plat_dat->phy_interface) {
> > > > > - case PHY_INTERFACE_MODE_RGMII:
> > > > > - val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> > > > > - break;
> > > > > - case PHY_INTERFACE_MODE_MII:
> > > > > - val |= (GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
> > > > > - break;
> > > > > - default:
> > > > > - pr_err("unsupported mii mode %d\n",
> > > > > - plat_dat->phy_interface);
> > > > > - return -ENOTSUPP;
> > > > > - }
> > > > > - val &= ~GMAC1_SHUT;
> > > > > - } else {
> > > > > - switch (plat_dat->phy_interface) {
> > > > > - case PHY_INTERFACE_MODE_RGMII:
> > > > > - val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> > > > > - break;
> > > > > - case PHY_INTERFACE_MODE_MII:
> > > > > - val |= (GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
> > > > > - break;
> > > > > - default:
> > > > > - pr_err("unsupported mii mode %d\n",
> > > > > - plat_dat->phy_interface);
> > > > > - return -ENOTSUPP;
> > > > > - }
> > > > > - val &= ~GMAC0_SHUT;
> > > > > - }
> > > > > - __raw_writel(val, LS1X_MUX_CTRL1);
> > > > > -#elif defined(CONFIG_LOONGSON1_LS1C)
> > > > > - plat_dat = dev_get_platdata(&pdev->dev);
> > > > > -
> > > > > - val &= ~PHY_INTF_SELI;
> > > > > - if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
> > > > > - val |= 0x4 << PHY_INTF_SELI_SHIFT;
> > > > > - __raw_writel(val, LS1X_MUX_CTRL1);
> > > > > -
> > > > > - val = __raw_readl(LS1X_MUX_CTRL0);
> > > > > - __raw_writel(val & (~GMAC_SHUT), LS1X_MUX_CTRL0);
> > > > > -#endif
> > > > > -
> > > > > - return 0;
> > > > > -}
> > > > > -
> > > > > -static struct plat_stmmacenet_data ls1x_eth0_pdata = {
> > > > > - .bus_id = 0,
> > > > > - .phy_addr = -1,
> > > > > -#if defined(CONFIG_LOONGSON1_LS1B)
> > > > > - .phy_interface = PHY_INTERFACE_MODE_MII,
> > > > > -#elif defined(CONFIG_LOONGSON1_LS1C)
> > > > > - .phy_interface = PHY_INTERFACE_MODE_RMII,
> > > > > -#endif
> > > > > - .mdio_bus_data = &ls1x_mdio_bus_data,
> > > > > - .dma_cfg = &ls1x_eth_dma_cfg,
> > > > > - .has_gmac = 1,
> > > > > - .tx_coe = 1,
> > > > > - .rx_queues_to_use = 1,
> > > > > - .tx_queues_to_use = 1,
> > > > > - .init = ls1x_eth_mux_init,
> > > > > -};
> > > > > -
> > > > > -static struct resource ls1x_eth0_resources[] = {
> > > > > - [0] = {
> > > > > - .start = LS1X_GMAC0_BASE,
> > > > > - .end = LS1X_GMAC0_BASE + SZ_64K - 1,
> > > > > - .flags = IORESOURCE_MEM,
> > > > > - },
> > > > > - [1] = {
> > > > > - .name = "macirq",
> > > > > - .start = LS1X_GMAC0_IRQ,
> > > > > - .flags = IORESOURCE_IRQ,
> > > > > - },
> > > > > -};
> > > > > -
> > > > > -struct platform_device ls1x_eth0_pdev = {
> > > > > - .name = "stmmaceth",
> > > > > - .id = 0,
> > > > > - .num_resources = ARRAY_SIZE(ls1x_eth0_resources),
> > > > > - .resource = ls1x_eth0_resources,
> > > > > - .dev = {
> > > > > - .platform_data = &ls1x_eth0_pdata,
> > > > > - },
> > > > > -};
> > > > > -
> > > > > -#ifdef CONFIG_LOONGSON1_LS1B
> > > > > -static struct plat_stmmacenet_data ls1x_eth1_pdata = {
> > > > > - .bus_id = 1,
> > > > > - .phy_addr = -1,
> > > > > - .phy_interface = PHY_INTERFACE_MODE_MII,
> > > > > - .mdio_bus_data = &ls1x_mdio_bus_data,
> > > > > - .dma_cfg = &ls1x_eth_dma_cfg,
> > > > > - .has_gmac = 1,
> > > > > - .tx_coe = 1,
> > > > > - .rx_queues_to_use = 1,
> > > > > - .tx_queues_to_use = 1,
> > > > > - .init = ls1x_eth_mux_init,
> > > > > -};
> > > > > -
> > > > > -static struct resource ls1x_eth1_resources[] = {
> > > > > - [0] = {
> > > > > - .start = LS1X_GMAC1_BASE,
> > > > > - .end = LS1X_GMAC1_BASE + SZ_64K - 1,
> > > > > - .flags = IORESOURCE_MEM,
> > > > > - },
> > > > > - [1] = {
> > > > > - .name = "macirq",
> > > > > - .start = LS1X_GMAC1_IRQ,
> > > > > - .flags = IORESOURCE_IRQ,
> > > > > - },
> > > > > -};
> > > > > -
> > > > > -struct platform_device ls1x_eth1_pdev = {
> > > > > - .name = "stmmaceth",
> > > > > - .id = 1,
> > > > > - .num_resources = ARRAY_SIZE(ls1x_eth1_resources),
> > > > > - .resource = ls1x_eth1_resources,
> > > > > - .dev = {
> > > > > - .platform_data = &ls1x_eth1_pdata,
> > > > > - },
> > > > > -};
> > > > > -#endif /* CONFIG_LOONGSON1_LS1B */
> > > > > +#include <irq.h>
> > > > >
> > > > > /* GPIO */
> > > > > static struct resource ls1x_gpio0_resources[] = {
> > > > > diff --git a/arch/mips/loongson32/ls1b/board.c b/arch/mips/loongson32/ls1b/board.c
> > > > > index e8290f200096..f23e4e5c96ee 100644
> > > > > --- a/arch/mips/loongson32/ls1b/board.c
> > > > > +++ b/arch/mips/loongson32/ls1b/board.c
> > > > > @@ -34,8 +34,6 @@ static const struct gpio_led_platform_data ls1x_led_pdata __initconst = {
> > > > > };
> > > > >
> > > > > static struct platform_device *ls1b_platform_devices[] __initdata = {
> > > > > - &ls1x_eth0_pdev,
> > > > > - &ls1x_eth1_pdev,
> > > > > &ls1x_ehci_pdev,
> > > > > &ls1x_gpio0_pdev,
> > > > > &ls1x_gpio1_pdev,
> > > > > diff --git a/arch/mips/loongson32/ls1c/board.c b/arch/mips/loongson32/ls1c/board.c
> > > > > index a7096964fb30..29bc467fd149 100644
> > > > > --- a/arch/mips/loongson32/ls1c/board.c
> > > > > +++ b/arch/mips/loongson32/ls1c/board.c
> > > > > @@ -6,7 +6,6 @@
> > > > > #include <platform.h>
> > > > >
> > > > > static struct platform_device *ls1c_platform_devices[] __initdata = {
> > > > > - &ls1x_eth0_pdev,
> > > > > &ls1x_rtc_pdev,
> > > > > &ls1x_wdt_pdev,
> > > > > };
> > > > > --
> > > > > 2.39.2
> > > > >
> > >
> > >
> > >
> > > --
> > > Best regards,
> > >
> > > Keguang Zhang
>
>
>
> --
> Best regards,
>
> Keguang Zhang