2022-04-04 21:42:28

by Palmer Dabbelt

[permalink] [raw]
Subject: [PATCH] dt-bindings: Fix phandle-array issues in the idle-states bindings

From: Palmer Dabbelt <[email protected]>

As per 39bd2b6a3783 ("dt-bindings: Improve phandle-array schemas"), the
phandle-array bindings have been disambiguated. This fixes the new
generic idle-states bindings to comply with the schema.

Fixes: 1bd524f7e8d8 ("dt-bindings: Add common bindings for ARM and RISC-V idle states")
Signed-off-by: Palmer Dabbelt <[email protected]>
---
.../devicetree/bindings/cpu/idle-states.yaml | 96 +++++++++----------
1 file changed, 48 insertions(+), 48 deletions(-)

diff --git a/Documentation/devicetree/bindings/cpu/idle-states.yaml b/Documentation/devicetree/bindings/cpu/idle-states.yaml
index 95506ffb816c..6f5223659950 100644
--- a/Documentation/devicetree/bindings/cpu/idle-states.yaml
+++ b/Documentation/devicetree/bindings/cpu/idle-states.yaml
@@ -385,8 +385,8 @@ examples:
compatible = "arm,cortex-a57";
reg = <0x0 0x0>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
- &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
+ cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
+ <&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
};

cpu@1 {
@@ -394,8 +394,8 @@ examples:
compatible = "arm,cortex-a57";
reg = <0x0 0x1>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
- &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
+ cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
+ <&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
};

cpu@100 {
@@ -403,8 +403,8 @@ examples:
compatible = "arm,cortex-a57";
reg = <0x0 0x100>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
- &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
+ cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
+ <&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
};

cpu@101 {
@@ -412,8 +412,8 @@ examples:
compatible = "arm,cortex-a57";
reg = <0x0 0x101>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
- &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
+ cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
+ <&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
};

cpu@10000 {
@@ -421,8 +421,8 @@ examples:
compatible = "arm,cortex-a57";
reg = <0x0 0x10000>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
- &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
+ cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
+ <&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
};

cpu@10001 {
@@ -430,8 +430,8 @@ examples:
compatible = "arm,cortex-a57";
reg = <0x0 0x10001>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
- &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
+ cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
+ <&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
};

cpu@10100 {
@@ -439,8 +439,8 @@ examples:
compatible = "arm,cortex-a57";
reg = <0x0 0x10100>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
- &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
+ cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
+ <&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
};

cpu@10101 {
@@ -448,8 +448,8 @@ examples:
compatible = "arm,cortex-a57";
reg = <0x0 0x10101>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
- &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
+ cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
+ <&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
};

cpu@100000000 {
@@ -457,8 +457,8 @@ examples:
compatible = "arm,cortex-a53";
reg = <0x1 0x0>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
- &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
+ cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
+ <&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
};

cpu@100000001 {
@@ -466,8 +466,8 @@ examples:
compatible = "arm,cortex-a53";
reg = <0x1 0x1>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
- &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
+ cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
+ <&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
};

cpu@100000100 {
@@ -475,8 +475,8 @@ examples:
compatible = "arm,cortex-a53";
reg = <0x1 0x100>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
- &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
+ cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
+ <&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
};

cpu@100000101 {
@@ -484,8 +484,8 @@ examples:
compatible = "arm,cortex-a53";
reg = <0x1 0x101>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
- &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
+ cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
+ <&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
};

cpu@100010000 {
@@ -493,8 +493,8 @@ examples:
compatible = "arm,cortex-a53";
reg = <0x1 0x10000>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
- &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
+ cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
+ <&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
};

cpu@100010001 {
@@ -502,8 +502,8 @@ examples:
compatible = "arm,cortex-a53";
reg = <0x1 0x10001>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
- &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
+ cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
+ <&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
};

cpu@100010100 {
@@ -511,8 +511,8 @@ examples:
compatible = "arm,cortex-a53";
reg = <0x1 0x10100>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
- &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
+ cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
+ <&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
};

cpu@100010101 {
@@ -520,8 +520,8 @@ examples:
compatible = "arm,cortex-a53";
reg = <0x1 0x10101>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
- &CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
+ cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
+ <&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
};

idle-states {
@@ -615,56 +615,56 @@ examples:
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x0>;
- cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
+ cpu-idle-states = <&cpu_sleep_0_0>, <&cluster_sleep_0>;
};

cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x1>;
- cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
+ cpu-idle-states = <&cpu_sleep_0_0>, <&cluster_sleep_0>;
};

cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x2>;
- cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
+ cpu-idle-states = <&cpu_sleep_0_0>, <&cluster_sleep_0>;
};

cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x3>;
- cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
+ cpu-idle-states = <&cpu_sleep_0_0>, <&cluster_sleep_0>;
};

cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x100>;
- cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
+ cpu-idle-states = <&cpu_sleep_1_0>, <&cluster_sleep_1>;
};

cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x101>;
- cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
+ cpu-idle-states = <&cpu_sleep_1_0>, <&cluster_sleep_1>;
};

cpu@102 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x102>;
- cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
+ cpu-idle-states = <&cpu_sleep_1_0>, <&cluster_sleep_1>;
};

cpu@103 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x103>;
- cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
+ cpu-idle-states = <&cpu_sleep_1_0>, <&cluster_sleep_1>;
};

idle-states {
@@ -719,8 +719,8 @@ examples:
reg = <0x0>;
riscv,isa = "rv64imafdc";
mmu-type = "riscv,sv48";
- cpu-idle-states = <&CPU_RET_0_0 &CPU_NONRET_0_0
- &CLUSTER_RET_0 &CLUSTER_NONRET_0>;
+ cpu-idle-states = <&CPU_RET_0_0>, <&CPU_NONRET_0_0>,
+ <&CLUSTER_RET_0>, <&CLUSTER_NONRET_0>;

cpu_intc0: interrupt-controller {
#interrupt-cells = <1>;
@@ -735,8 +735,8 @@ examples:
reg = <0x1>;
riscv,isa = "rv64imafdc";
mmu-type = "riscv,sv48";
- cpu-idle-states = <&CPU_RET_0_0 &CPU_NONRET_0_0
- &CLUSTER_RET_0 &CLUSTER_NONRET_0>;
+ cpu-idle-states = <&CPU_RET_0_0>, <&CPU_NONRET_0_0>,
+ <&CLUSTER_RET_0>, <&CLUSTER_NONRET_0>;

cpu_intc1: interrupt-controller {
#interrupt-cells = <1>;
@@ -751,8 +751,8 @@ examples:
reg = <0x10>;
riscv,isa = "rv64imafdc";
mmu-type = "riscv,sv48";
- cpu-idle-states = <&CPU_RET_1_0 &CPU_NONRET_1_0
- &CLUSTER_RET_1 &CLUSTER_NONRET_1>;
+ cpu-idle-states = <&CPU_RET_1_0>, <&CPU_NONRET_1_0>,
+ <&CLUSTER_RET_1>, <&CLUSTER_NONRET_1>;

cpu_intc10: interrupt-controller {
#interrupt-cells = <1>;
@@ -767,8 +767,8 @@ examples:
reg = <0x11>;
riscv,isa = "rv64imafdc";
mmu-type = "riscv,sv48";
- cpu-idle-states = <&CPU_RET_1_0 &CPU_NONRET_1_0
- &CLUSTER_RET_1 &CLUSTER_NONRET_1>;
+ cpu-idle-states = <&CPU_RET_1_0>, <&CPU_NONRET_1_0>,
+ <&CLUSTER_RET_1>, <&CLUSTER_NONRET_1>;

cpu_intc11: interrupt-controller {
#interrupt-cells = <1>;
--
2.34.1


2022-04-05 01:06:06

by Rob Herring (Arm)

[permalink] [raw]
Subject: Re: [PATCH] dt-bindings: Fix phandle-array issues in the idle-states bindings

On Fri, Apr 1, 2022 at 2:32 PM Palmer Dabbelt <[email protected]> wrote:
>
> From: Palmer Dabbelt <[email protected]>
>
> As per 39bd2b6a3783 ("dt-bindings: Improve phandle-array schemas"), the
> phandle-array bindings have been disambiguated. This fixes the new
> generic idle-states bindings to comply with the schema.
>
> Fixes: 1bd524f7e8d8 ("dt-bindings: Add common bindings for ARM and RISC-V idle states")
> Signed-off-by: Palmer Dabbelt <[email protected]>
> ---
> .../devicetree/bindings/cpu/idle-states.yaml | 96 +++++++++----------
> 1 file changed, 48 insertions(+), 48 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/cpu/idle-states.yaml b/Documentation/devicetree/bindings/cpu/idle-states.yaml
> index 95506ffb816c..6f5223659950 100644
> --- a/Documentation/devicetree/bindings/cpu/idle-states.yaml
> +++ b/Documentation/devicetree/bindings/cpu/idle-states.yaml
> @@ -385,8 +385,8 @@ examples:
> compatible = "arm,cortex-a57";
> reg = <0x0 0x0>;
> enable-method = "psci";
> - cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
> - &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
> + cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
> + <&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;

All the Arm examples are already fixed. You need to fix just the RiscV
examples added in your branch. Otherwise, it is a bunch of merge
conflicts.

Rob