LinuxLists.cc - [RFC v4 0/6] MIPS: CI20: Add efuse driver for Ingenic JZ4780 and attach to DM9000 for stable MAC addresses

2020-02-17 17:04:39

Subject: [RFC v4 0/6] MIPS: CI20: Add efuse driver for Ingenic JZ4780 and attach to DM9000 for stable MAC addresses

* removed read_only for nvmem config because there is no write method
* Kconfig: replaced depends MACH_JZ4780 with MACH_INGENIC
* run through checkpatch and fixed issues
* made use of devm_nvram_register() and get rid of jz4780_efuse_remove()
(suggested by Srinivas Kandagatla <[email protected]>)
* squashed previous patch 1/9 and 2/9 into single (regmap based) driver

RFC V3 2020-02-16 20:20:59:

This series is based on and a follow up for

https://lore.kernel.org/patchwork/cover/868157/

("[v2,0/2] Add efuse driver for Ingenic JZ4780 SoC")

Original authors were
PrasannaKumar Muralidharan <[email protected]>
Mathieu Malaterre <[email protected]>

and there are additions / code improvements by
H. Nikolaus Schaller <[email protected]>
Paul Cercueil <[email protected]>

This setup works, if the dm9000 driver is compiled
as a module.

Therefore it is all RFC level. It is also not completely
checkpatched.

H. Nikolaus Schaller (1):
MIPS: DTS: CI20: make DM9000 Ethernet controller use NVMEM to find the
default MAC address

PrasannaKumar Muralidharan (5):
nvmem: add driver for JZ4780 efuse
Bindings: nvmem: add bindings for JZ4780 efuse
Documentation: ABI: nvmem: add documentation for JZ4780 efuse ABI
nvmem: MAINTAINERS: add maintainer for JZ4780 efuse driver
MIPS: DTS: JZ4780: define node for JZ4780 efuse

.../ABI/testing/sysfs-driver-jz4780-efuse | 16 ++
.../bindings/nvmem/ingenic,jz4780-efuse.txt | 17 ++
MAINTAINERS | 5 +
arch/mips/boot/dts/ingenic/ci20.dts | 3 +
arch/mips/boot/dts/ingenic/jz4780.dtsi | 17 +-
drivers/nvmem/Kconfig | 10 +
drivers/nvmem/Makefile | 2 +
drivers/nvmem/jz4780-efuse.c | 229 ++++++++++++++++++
8 files changed, 298 insertions(+), 1 deletion(-)
create mode 100644 Documentation/ABI/testing/sysfs-driver-jz4780-efuse
create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
create mode 100644 drivers/nvmem/jz4780-efuse.c

--
2.23.0

2020-02-17 17:05:18

by H. Nikolaus Schaller

[permalink] [raw]

Subject: [RFC v4 5/6] MIPS: DTS: JZ4780: define node for JZ4780 efuse

From: PrasannaKumar Muralidharan <[email protected]>

This patch brings support for the JZ4780 efuse. Currently it only exposes
a read only access to the entire 8K bits efuse memory and the
ethernet mac address for the davicom dm9000 chip on the CI20 board.

It also changes the nemc reg range to avoid overlap.

Tested-by: Mathieu Malaterre <[email protected]>
Signed-off-by: PrasannaKumar Muralidharan <[email protected]>
Signed-off-by: Mathieu Malaterre <[email protected]>
Signed-off-by: H. Nikolaus Schaller <[email protected]>
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index f928329b034b..c9461310aa8b 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -358,7 +358,7 @@

nemc: nemc@13410000 {
compatible = "ingenic,jz4780-nemc";
- reg = <0x13410000 0x10000>;
+ reg = <0x13410000 0x4c>;
#address-cells = <2>;
#size-cells = <1>;
ranges = <1 0 0x1b000000 0x1000000
@@ -373,6 +373,21 @@
status = "disabled";
};

+ efuse: efuse@134100d0 {
+ compatible = "ingenic,jz4780-efuse";
+ reg = <0x134100d0 0x2c>;
+
+ clocks = <&cgu JZ4780_CLK_AHB2>;
+ clock-names = "bus_clk";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ eth0_addr: eth-mac-addr@0x22 {
+ reg = <0x22 0x6>;
+ };
+ };
+
dma: dma@13420000 {
compatible = "ingenic,jz4780-dma";
reg = <0x13420000 0x400
--
2.23.0

2020-02-17 17:06:30

by H. Nikolaus Schaller

[permalink] [raw]

Subject: [RFC v4 1/6] nvmem: add driver for JZ4780 efuse

From: PrasannaKumar Muralidharan <[email protected]>

This patch brings support for the JZ4780 efuse. Currently it only exposes
a read only access to the entire 8K bits efuse memory and nvmem cells.

Tested-by: Mathieu Malaterre <[email protected]>
Signed-off-by: PrasannaKumar Muralidharan <[email protected]>
Signed-off-by: Mathieu Malaterre <[email protected]>
Signed-off-by: H. Nikolaus Schaller <[email protected]>
Signed-off-by: Paul Cercueil <[email protected]>
---
drivers/nvmem/Kconfig | 10 ++
drivers/nvmem/Makefile | 2 +
drivers/nvmem/jz4780-efuse.c | 229 +++++++++++++++++++++++++++++++++++
3 files changed, 241 insertions(+)
create mode 100644 drivers/nvmem/jz4780-efuse.c

diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
index 35efab1ba8d9..8143e6e1dd82 100644
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -55,6 +55,16 @@ config NVMEM_IMX_OCOTP_SCU
This is a driver for the SCU On-Chip OTP Controller (OCOTP)
available on i.MX8 SoCs.

+config JZ4780_EFUSE
+ tristate "JZ4780 EFUSE Memory Support"
+ depends on MACH_INGENIC || COMPILE_TEST
+ depends on HAS_IOMEM
+ help
+ Say Y here to include support for JZ4780 efuse memory found on
+ all JZ4780 SoC based devices.
+ To compile this driver as a module, choose M here: the module
+ will be called nvmem_jz4780_efuse.
+
config NVMEM_LPC18XX_EEPROM
tristate "NXP LPC18XX EEPROM Memory Support"
depends on ARCH_LPC18XX || COMPILE_TEST
diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
index 6b466cd1427b..65a268d17807 100644
--- a/drivers/nvmem/Makefile
+++ b/drivers/nvmem/Makefile
@@ -18,6 +18,8 @@ obj-$(CONFIG_NVMEM_IMX_OCOTP) += nvmem-imx-ocotp.o
nvmem-imx-ocotp-y := imx-ocotp.o
obj-$(CONFIG_NVMEM_IMX_OCOTP_SCU) += nvmem-imx-ocotp-scu.o
nvmem-imx-ocotp-scu-y := imx-ocotp-scu.o
+obj-$(CONFIG_JZ4780_EFUSE) += nvmem_jz4780_efuse.o
+nvmem_jz4780_efuse-y := jz4780-efuse.o
obj-$(CONFIG_NVMEM_LPC18XX_EEPROM) += nvmem_lpc18xx_eeprom.o
nvmem_lpc18xx_eeprom-y := lpc18xx_eeprom.o
obj-$(CONFIG_NVMEM_LPC18XX_OTP) += nvmem_lpc18xx_otp.o
diff --git a/drivers/nvmem/jz4780-efuse.c b/drivers/nvmem/jz4780-efuse.c
new file mode 100644
index 000000000000..08b63de0e9cc
--- /dev/null
+++ b/drivers/nvmem/jz4780-efuse.c
@@ -0,0 +1,229 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * JZ4780 EFUSE Memory Support driver
+ *
+ * Copyright (c) 2017 PrasannaKumar Muralidharan <[email protected]>
+ * Copyright (c) 2020 H. Nikolaus Schaller <[email protected]>
+ */
+
+/*
+ * Currently supports JZ4780 efuse which has 8K programmable bit.
+ * Efuse is separated into seven segments as below:
+ *
+ * -----------------------------------------------------------------------
+ * | 64 bit | 128 bit | 128 bit | 3520 bit | 8 bit | 2296 bit | 2048 bit |
+ * -----------------------------------------------------------------------
+ *
+ * The rom itself is accessed using a 9 bit address line and an 8 word wide bus
+ * which reads/writes based on strobes. The strobe is configured in the config
+ * register and is based on number of cycles of the bus clock.
+ *
+ * Driver supports read only as the writes are done in the Factory.
+ */
+
+#include <linux/bitops.h>
+#include <linux/clk.h>
+#include <linux/module.h>
+#include <linux/nvmem-provider.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/timer.h>
+
+#define JZ_EFUCTRL (0x0) /* Control Register */
+#define JZ_EFUCFG (0x4) /* Configure Register*/
+#define JZ_EFUSTATE (0x8) /* Status Register */
+#define JZ_EFUDATA(n) (0xC + (n) * 4)
+
+#define EFUCTRL_ADDR_MASK 0x3FF
+#define EFUCTRL_ADDR_SHIFT 21
+#define EFUCTRL_LEN_MASK 0x1F
+#define EFUCTRL_LEN_SHIFT 16
+#define EFUCTRL_PG_EN BIT(15)
+#define EFUCTRL_WR_EN BIT(1)
+#define EFUCTRL_RD_EN BIT(0)
+
+#define EFUCFG_INT_EN BIT(31)
+#define EFUCFG_RD_ADJ_MASK 0xF
+#define EFUCFG_RD_ADJ_SHIFT 20
+#define EFUCFG_RD_STR_MASK 0xF
+#define EFUCFG_RD_STR_SHIFT 16
+#define EFUCFG_WR_ADJ_MASK 0xF
+#define EFUCFG_WR_ADJ_SHIFT 12
+#define EFUCFG_WR_STR_MASK 0xFFF
+#define EFUCFG_WR_STR_SHIFT 0
+
+#define EFUSTATE_WR_DONE BIT(1)
+#define EFUSTATE_RD_DONE BIT(0)
+
+struct jz4780_efuse {
+ struct device *dev;
+ struct regmap *map;
+ struct clk *clk;
+ unsigned int rd_adj;
+ unsigned int rd_strobe;
+};
+
+/* We read 32 byte chunks to avoid complexity in the driver. */
+static int jz4780_efuse_read_32bytes(struct jz4780_efuse *efuse, char *buf,
+ unsigned int addr)
+{
+ unsigned int tmp;
+ u32 ctrl;
+ int ret;
+ const int size = 32;
+
+ ctrl = (addr << EFUCTRL_ADDR_SHIFT)
+ | ((size - 1) << EFUCTRL_LEN_SHIFT)
+ | EFUCTRL_RD_EN;
+
+ regmap_update_bits(efuse->map, JZ_EFUCTRL,
+ (EFUCTRL_ADDR_MASK << EFUCTRL_ADDR_SHIFT) |
+ (EFUCTRL_LEN_MASK << EFUCTRL_LEN_SHIFT) |
+ EFUCTRL_PG_EN | EFUCTRL_WR_EN | EFUCTRL_RD_EN, ctrl);
+
+ ret = regmap_read_poll_timeout(efuse->map, JZ_EFUSTATE,
+ tmp, tmp & EFUSTATE_RD_DONE,
+ 1 * MSEC_PER_SEC, 50 * MSEC_PER_SEC);
+ if (ret < 0) {
+ dev_err(efuse->dev, "Time out while reading efuse data");
+ return ret;
+ }
+
+ return regmap_bulk_read(efuse->map, JZ_EFUDATA(0),
+ buf, size / sizeof(u32));
+}
+
+/* main entry point */
+static int jz4780_efuse_read(void *context, unsigned int offset,
+ void *val, size_t bytes)
+{
+ struct jz4780_efuse *efuse = context;
+ int ret;
+ const int size = 32;
+
+ while (bytes > 0) {
+ unsigned int start = offset & ~(size - 1);
+ unsigned int chunk = min(bytes, (start + size) - offset);
+
+ if (start == offset && chunk == size) {
+ ret = jz4780_efuse_read_32bytes(efuse, val, start);
+ if (ret < 0)
+ return ret;
+
+ } else {
+ char buf[32];
+
+ ret = jz4780_efuse_read_32bytes(efuse, buf, start);
+ if (ret < 0)
+ return ret;
+
+ memcpy(val, &buf[offset - start], chunk);
+ }
+
+ val += chunk;
+ offset += chunk;
+ bytes -= chunk;
+ }
+
+ return 0;
+}
+
+static struct nvmem_config jz4780_efuse_nvmem_config __initdata = {
+ .name = "jz4780-efuse",
+ .size = 1024,
+ .word_size = 1,
+ .stride = 1,
+ .owner = THIS_MODULE,
+ .reg_read = jz4780_efuse_read,
+};
+
+static const struct regmap_config jz4780_efuse_regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+ .max_register = JZ_EFUDATA(7),
+};
+
+static int jz4780_efuse_probe(struct platform_device *pdev)
+{
+ struct nvmem_device *nvmem;
+ struct jz4780_efuse *efuse;
+ struct nvmem_config cfg;
+ unsigned long clk_rate;
+ struct device *dev = &pdev->dev;
+ void __iomem *regs;
+
+ efuse = devm_kzalloc(dev, sizeof(*efuse), GFP_KERNEL);
+ if (!efuse)
+ return -ENOMEM;
+
+ regs = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(regs))
+ return PTR_ERR(regs);
+
+ efuse->map = devm_regmap_init_mmio(dev, regs,
+ &jz4780_efuse_regmap_config);
+ if (IS_ERR(efuse->map))
+ return PTR_ERR(efuse->map);
+
+ efuse->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(efuse->clk))
+ return PTR_ERR(efuse->clk);
+
+ clk_rate = clk_get_rate(efuse->clk);
+
+ efuse->dev = dev;
+ /*
+ * rd_adj and rd_strobe are 4 bit values
+ * bus clk period * (rd_adj + 1) > 6.5ns
+ * bus clk period * (rd_adj + 5 + rd_strobe) > 35ns
+ */
+ efuse->rd_adj = (((6500 * (clk_rate / 1000000)) / 1000000) + 1) - 1;
+ efuse->rd_strobe = ((((35000 * (clk_rate / 1000000)) / 1000000) + 1)
+ - 5 - efuse->rd_adj);
+
+ if (efuse->rd_adj > 0x1F || efuse->rd_strobe > 0x1F) {
+ dev_err(&pdev->dev, "Cannot set clock configuration\n");
+ return -EINVAL;
+ }
+
+ regmap_update_bits(efuse->map, JZ_EFUCFG,
+ (EFUCFG_RD_ADJ_MASK << EFUCFG_RD_ADJ_SHIFT) |
+ (EFUCFG_RD_STR_MASK << EFUCFG_RD_STR_SHIFT),
+ (efuse->rd_adj << EFUCFG_RD_ADJ_SHIFT) |
+ (efuse->rd_strobe << EFUCFG_RD_STR_SHIFT));
+
+ cfg = jz4780_efuse_nvmem_config;
+ cfg.dev = &pdev->dev;
+ cfg.priv = efuse;
+
+ nvmem = devm_nvmem_register(dev, &cfg);
+ if (IS_ERR(nvmem))
+ return PTR_ERR(nvmem);
+
+ platform_set_drvdata(pdev, nvmem);
+
+ return 0;
+}
+
+static const struct of_device_id jz4780_efuse_match[] = {
+ { .compatible = "ingenic,jz4780-efuse" },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, jz4780_efuse_match);
+
+static struct platform_driver jz4780_efuse_driver = {
+ .probe = jz4780_efuse_probe,
+ .driver = {
+ .name = "jz4780-efuse",
+ .of_match_table = jz4780_efuse_match,
+ },
+};
+module_platform_driver(jz4780_efuse_driver);
+
+MODULE_AUTHOR("PrasannaKumar Muralidharan <[email protected]>");
+MODULE_AUTHOR("H. Nikolaus Schaller <[email protected]>");
+MODULE_AUTHOR("Paul Cercueil <[email protected]>");
+MODULE_DESCRIPTION("Ingenic JZ4780 efuse driver");
+MODULE_LICENSE("GPL v2");
--
2.23.0

2020-02-17 17:06:38

by H. Nikolaus Schaller

[permalink] [raw]

Subject: [RFC v4 3/6] Documentation: ABI: nvmem: add documentation for JZ4780 efuse ABI

2020-02-17 17:06:52

by H. Nikolaus Schaller

[permalink] [raw]

Subject: [RFC v4 6/6] MIPS: DTS: CI20: make DM9000 Ethernet controller use NVMEM to find the default MAC address

There is a unique MAC address programmed into the eFuses
of the JZ4780 chip in the CI20 factory. By using this
for initializing the DM9000 Ethernet controller, every
CI20 board has an individual - but stable - MAC address
and DHCP can assign stable IP addresses.

Signed-off-by: H. Nikolaus Schaller <[email protected]>
---
arch/mips/boot/dts/ingenic/ci20.dts | 3 +++
1 file changed, 3 insertions(+)

diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
index 37b93166bf22..6dc1f9eeff00 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -355,6 +355,9 @@

interrupt-parent = <&gpe>;
interrupts = <19 4>;
+
+ nvmem-cells = <&eth0_addr>;
+ nvmem-cell-names = "mac-address";
};
};

--
2.23.0

2020-02-17 17:07:15

by H. Nikolaus Schaller

[permalink] [raw]

Subject: [RFC v4 4/6] nvmem: MAINTAINERS: add maintainer for JZ4780 efuse driver

2020-02-17 17:08:06

by H. Nikolaus Schaller

[permalink] [raw]

Subject: [RFC v4 2/6] Bindings: nvmem: add bindings for JZ4780 efuse

2020-02-18 21:26:31

by Rob Herring (Arm)

[permalink] [raw]

Subject: Re: [RFC v4 2/6] Bindings: nvmem: add bindings for JZ4780 efuse

On Mon, Feb 17, 2020 at 05:55:26PM +0100, H. Nikolaus Schaller wrote:
> From: PrasannaKumar Muralidharan <[email protected]>
>
> This patch brings support for the JZ4780 efuse. Currently it only expose
> a read only access to the entire 8K bits efuse memory.
>
> Tested-by: Mathieu Malaterre <[email protected]>
> Signed-off-by: PrasannaKumar Muralidharan <[email protected]>
> Signed-off-by: Mathieu Malaterre <[email protected]>
> Signed-off-by: H. Nikolaus Schaller <[email protected]>
> ---
> .../bindings/nvmem/ingenic,jz4780-efuse.txt | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt

Please convert to a DT schema.

> diff --git a/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
> new file mode 100644
> index 000000000000..339e74daa9a9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
> @@ -0,0 +1,17 @@
> +Ingenic JZ EFUSE driver bindings
> +
> +Required properties:
> +- "compatible" Must be set to "ingenic,jz4780-efuse"
> +- "reg" Register location and length
> +- "clocks" Handle for the ahb clock for the efuse.
> +- "clock-names" Must be "bus_clk"

'clk' is redundant. How about 'ahb'?

> +
> +Example:
> +
> +efuse: efuse@134100d0 {
> + compatible = "ingenic,jz4780-efuse";
> + reg = <0x134100d0 0x2c>;
> +
> + clocks = <&cgu JZ4780_CLK_AHB2>;
> + clock-names = "bus_clk";
> +};
> --
> 2.23.0
>

2020-02-19 05:49:35

by H. Nikolaus Schaller

[permalink] [raw]

Subject: Re: [RFC v4 2/6] Bindings: nvmem: add bindings for JZ4780 efuse

> Am 18.02.2020 um 22:26 schrieb Rob Herring <[email protected]>:
>
> On Mon, Feb 17, 2020 at 05:55:26PM +0100, H. Nikolaus Schaller wrote:
>> From: PrasannaKumar Muralidharan <[email protected]>
>>
>> This patch brings support for the JZ4780 efuse. Currently it only expose
>> a read only access to the entire 8K bits efuse memory.
>>
>> Tested-by: Mathieu Malaterre <[email protected]>
>> Signed-off-by: PrasannaKumar Muralidharan <[email protected]>
>> Signed-off-by: Mathieu Malaterre <[email protected]>
>> Signed-off-by: H. Nikolaus Schaller <[email protected]>
>> ---
>> .../bindings/nvmem/ingenic,jz4780-efuse.txt | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
>
> Please convert to a DT schema.

Is there someone of you who can help to do that?

DT schemas are still like a Chinese dialect for me (i.e. I can decipher with help but neither speak nor write).

BR and thanks,
Nikolaus

>
>> diff --git a/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
>> new file mode 100644
>> index 000000000000..339e74daa9a9
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
>> @@ -0,0 +1,17 @@
>> +Ingenic JZ EFUSE driver bindings
>> +
>> +Required properties:
>> +- "compatible" Must be set to "ingenic,jz4780-efuse"
>> +- "reg" Register location and length
>> +- "clocks" Handle for the ahb clock for the efuse.
>> +- "clock-names" Must be "bus_clk"
>
> 'clk' is redundant. How about 'ahb'?
>
>> +
>> +Example:
>> +
>> +efuse: efuse@134100d0 {
>> + compatible = "ingenic,jz4780-efuse";
>> + reg = <0x134100d0 0x2c>;
>> +
>> + clocks = <&cgu JZ4780_CLK_AHB2>;
>> + clock-names = "bus_clk";
>> +};
>> --
>> 2.23.0
>>

2020-02-19 10:39:39

by Zhou Yanjie

[permalink] [raw]

Subject: Re: [RFC v4 2/6] Bindings: nvmem: add bindings for JZ4780 efuse

Hi Nikolaus,

On 2020年02月19日 13:48, H. Nikolaus Schaller wrote:
>> Am 18.02.2020 um 22:26 schrieb Rob Herring <[email protected]>:
>>
>> On Mon, Feb 17, 2020 at 05:55:26PM +0100, H. Nikolaus Schaller wrote:
>>> From: PrasannaKumar Muralidharan <[email protected]>
>>>
>>> This patch brings support for the JZ4780 efuse. Currently it only expose
>>> a read only access to the entire 8K bits efuse memory.
>>>
>>> Tested-by: Mathieu Malaterre <[email protected]>
>>> Signed-off-by: PrasannaKumar Muralidharan <[email protected]>
>>> Signed-off-by: Mathieu Malaterre <[email protected]>
>>> Signed-off-by: H. Nikolaus Schaller <[email protected]>
>>> ---
>>> .../bindings/nvmem/ingenic,jz4780-efuse.txt | 17 +++++++++++++++++
>>> 1 file changed, 17 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
>> Please convert to a DT schema.
> Is there someone of you who can help to do that?
>
> DT schemas are still like a Chinese dialect for me (i.e. I can decipher with help but neither speak nor write).
>
> BR and thanks,
> Nikolaus

I am also suffering from this, and I am going to ask Paul for advice.

>
>>> diff --git a/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
>>> new file mode 100644
>>> index 000000000000..339e74daa9a9
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
>>> @@ -0,0 +1,17 @@
>>> +Ingenic JZ EFUSE driver bindings
>>> +
>>> +Required properties:
>>> +- "compatible" Must be set to "ingenic,jz4780-efuse"
>>> +- "reg" Register location and length
>>> +- "clocks" Handle for the ahb clock for the efuse.
>>> +- "clock-names" Must be "bus_clk"
>> 'clk' is redundant. How about 'ahb'?

How about replace "bus_clk" with "efuse"? Other SoCs (like T21, X1000,
X1500, X1830, X2000) has a dedicated bit in the CLKGR register to
control the EFUSE clock.
A corresponding "XXX_CLK_EFUSE" is provided in the "xxx-cgu.c" driver.

Thanks and best regards!

>>> +
>>> +Example:
>>> +
>>> +efuse: efuse@134100d0 {
>>> + compatible = "ingenic,jz4780-efuse";
>>> + reg = <0x134100d0 0x2c>;
>>> +
>>> + clocks = <&cgu JZ4780_CLK_AHB2>;
>>> + clock-names = "bus_clk";
>>> +};
>>> --
>>> 2.23.0
>>>

2020-02-19 11:04:22

by Srinivas Kandagatla

[permalink] [raw]

Subject: Re: [RFC v4 2/6] Bindings: nvmem: add bindings for JZ4780 efuse

On 19/02/2020 05:48, H. Nikolaus Schaller wrote:
>>> .../bindings/nvmem/ingenic,jz4780-efuse.txt | 17 +++++++++++++++++
>>> 1 file changed, 17 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
>> Please convert to a DT schema.
> Is there someone of you who can help to do that?
>
> DT schemas are still like a Chinese dialect for me (i.e. I can decipher with help but neither speak nor write).

Have a look at an example here:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml?h=v5.6-rc2

Some documentation:
https://lwn.net/Articles/771621/

--srini

>
> BR and thanks,
> Nikolaus
>

2020-02-20 06:01:07

by Andreas Kemnade

[permalink] [raw]

Subject: [PATCH RFC] Bindings: nvmem: add bindings for JZ4780 efuse

From: PrasannaKumar Muralidharan <[email protected]>

This patch brings support for the JZ4780 efuse. Currently it only expose
a read only access to the entire 8K bits efuse memory.

Tested-by: Mathieu Malaterre <[email protected]>
Signed-off-by: PrasannaKumar Muralidharan <[email protected]>
Signed-off-by: Mathieu Malaterre <[email protected]>
Signed-off-by: H. Nikolaus Schaller <[email protected]>
[converted to yaml]
Signed-off-by: Andreas Kemnade <[email protected]>
---
I will not update/maintain this, just have the impression that here some
more work is needed to make somebody comfortable with yaml than stick
to the usual pointing to documentation and I have not the ingredients
for doing
cat Antihistamines >/dev/brain ;-)
and I do not want to see the other patches get lost.

.../bindings/nvmem/ingenic,jz4780-efuse.yaml | 51 +++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml

diff --git a/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml
new file mode 100644
index 000000000000..ad56c17b0bd5
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/ingenic,jz4780-efuse.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic JZ EFUSE driver bindings
+
+maintainers:
+ - tbd <tbd@tbd>
+
+allOf:
+ - $ref: "nvmem.yaml#"
+
+properties:
+ compatible:
+ enum:
+ - ingenic,jz4780-efuse
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ # Handle for the ahb for the efuse.
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: bus_clk
+
+required:
+ - compatible
+ - reg
+ - clock
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/jz4780-cgu.h>
+
+ efuse@134100d0 {
+ compatible = "ingenic,jz4780-efuse";
+ reg = <0x134100d0 0x2c>;
+
+ clocks = <&cgu JZ4780_CLK_AHB2>;
+ clock-names = "bus_clk";
+ };
+
+...
--
2.20.1

2020-02-20 13:59:14

by Jiaxun Yang

[permalink] [raw]

Subject: Re: [RFC v4 2/6] Bindings: nvmem: add bindings for JZ4780 efuse

--
Jiaxun Yang

---- 在星期三, 2020-02-19 13:48:56 H. Nikolaus Schaller <[email protected]> 撰写 ----
>
> > Am 18.02.2020 um 22:26 schrieb Rob Herring <[email protected]>:
> >
> > On Mon, Feb 17, 2020 at 05:55:26PM +0100, H. Nikolaus Schaller wrote:
> >> From: PrasannaKumar Muralidharan <[email protected]>
> >>
> >> This patch brings support for the JZ4780 efuse. Currently it only expose
> >> a read only access to the entire 8K bits efuse memory.
> >>
> >> Tested-by: Mathieu Malaterre <[email protected]>
> >> Signed-off-by: PrasannaKumar Muralidharan <[email protected]>
> >> Signed-off-by: Mathieu Malaterre <[email protected]>
> >> Signed-off-by: H. Nikolaus Schaller <[email protected]>
> >> ---
> >> .../bindings/nvmem/ingenic,jz4780-efuse.txt | 17 +++++++++++++++++
> >> 1 file changed, 17 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.txt
> >
> > Please convert to a DT schema.
>
> Is there someone of you who can help to do that?
>
> DT schemas are still like a Chinese dialect for me (i.e. I can decipher with help but neither speak nor write).

I just had a try.

https://paste.ubuntu.com/p/xgDdmwnGsz/

Not sure if it's correct.

Thanks.

--
Jiaxun Yang

2020-02-20 19:55:23

by Rob Herring (Arm)

[permalink] [raw]

Subject: Re: [PATCH RFC] Bindings: nvmem: add bindings for JZ4780 efuse

On Thu, Feb 20, 2020 at 12:00 AM Andreas Kemnade <[email protected]> wrote:
>
> From: PrasannaKumar Muralidharan <[email protected]>
>
> This patch brings support for the JZ4780 efuse. Currently it only expose
> a read only access to the entire 8K bits efuse memory.
>
> Tested-by: Mathieu Malaterre <[email protected]>
> Signed-off-by: PrasannaKumar Muralidharan <[email protected]>
> Signed-off-by: Mathieu Malaterre <[email protected]>
> Signed-off-by: H. Nikolaus Schaller <[email protected]>
> [converted to yaml]
> Signed-off-by: Andreas Kemnade <[email protected]>
> ---
> I will not update/maintain this, just have the impression that here some
> more work is needed to make somebody comfortable with yaml than stick
> to the usual pointing to documentation and I have not the ingredients
> for doing
> cat Antihistamines >/dev/brain ;-)
> and I do not want to see the other patches get lost.

Looks about right...

>
> .../bindings/nvmem/ingenic,jz4780-efuse.yaml | 51 +++++++++++++++++++
> 1 file changed, 51 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml
>
> diff --git a/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml
> new file mode 100644
> index 000000000000..ad56c17b0bd5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: GPL-2.0

Dual license new bindings please:

(GPL-2.0-only OR BSD-2-Clause)

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/nvmem/ingenic,jz4780-efuse.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Ingenic JZ EFUSE driver bindings
> +
> +maintainers:
> + - tbd <tbd@tbd>
> +
> +allOf:
> + - $ref: "nvmem.yaml#"
> +
> +properties:
> + compatible:
> + enum:
> + - ingenic,jz4780-efuse
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + # Handle for the ahb for the efuse.
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: bus_clk

My prior comment still applies.

Also, for a single clock, you don't really need a name.

> +
> +required:
> + - compatible
> + - reg
> + - clock

'make dt_binding_check' would have pointed the error here for you:

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.example.dt.yaml:
efuse@134100d0: 'clock' is a required property

> + - clock-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/jz4780-cgu.h>
> +
> + efuse@134100d0 {
> + compatible = "ingenic,jz4780-efuse";
> + reg = <0x134100d0 0x2c>;
> +
> + clocks = <&cgu JZ4780_CLK_AHB2>;
> + clock-names = "bus_clk";
> + };
> +
> +...
> --
> 2.20.1
>

2020-02-24 06:50:33

by Andreas Kemnade

[permalink] [raw]

Subject: Re: [PATCH RFC] Bindings: nvmem: add bindings for JZ4780 efuse

On Thu, 20 Feb 2020 13:53:55 -0600
Rob Herring <[email protected]> wrote:

[...]
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clock
>
> 'make dt_binding_check' would have pointed the error here for you:
>
I did run make dt_binding_check...
It stopped because the jz4780-cgu.h included was missing. Then I have added
that line and have started dt_binding_check again.
At least here it is doing a full rerun in the second part.
After some time I scrolled back and noticed DTC passed
and missed that

> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.example.dt.yaml:
> efuse@134100d0: 'clock' is a required property
>
in the CHECKS line. Well, dt_binding_check is a bit noisy. I guess I should
have redirected all output to a text file, before and after my changes. and
diffed the results.
Is there any script ready for that?

Regards,
Andreas

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2020-02-24 15:15:38

by Rob Herring (Arm)

[permalink] [raw]

Subject: Re: [PATCH RFC] Bindings: nvmem: add bindings for JZ4780 efuse

On Mon, Feb 24, 2020 at 12:48 AM Andreas Kemnade <[email protected]> wrote:
>
> On Thu, 20 Feb 2020 13:53:55 -0600
> Rob Herring <[email protected]> wrote:
>
> [...]
> > > +
> > > +required:
> > > + - compatible
> > > + - reg
> > > + - clock
> >
> > 'make dt_binding_check' would have pointed the error here for you:
> >
> I did run make dt_binding_check...
> It stopped because the jz4780-cgu.h included was missing. Then I have added
> that line and have started dt_binding_check again.
> At least here it is doing a full rerun in the second part.
> After some time I scrolled back and noticed DTC passed
> and missed that
>
> > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.example.dt.yaml:
> > efuse@134100d0: 'clock' is a required property
> >
> in the CHECKS line. Well, dt_binding_check is a bit noisy. I guess I should
> have redirected all output to a text file, before and after my changes. and
> diffed the results.
> Is there any script ready for that?

grep 'ingenic,jz4780-efuse' <build log> ?

Noisy? There's 8 warnings on Linus' master currently[1]. I try to keep
that at 0, but I wouldn't call 8 noisy.

Rob

[1] https://gitlab.com/robherring/linux-dt-bindings/-/jobs/447630363