2021-12-06 18:52:48

by Florian Fainelli

[permalink] [raw]
Subject: [PATCH v2 0/5] Convert iProc PCIe binding to YAML

This patch series converts the iProc PCIe binding to YAML. Given there
is a majority of DTS changes, it would make sense for me to pull this
via the Broadcom ARM SoC git tree.

Thanks!

Changes in v2:

- document msi sub-node compatible string

Florian Fainelli (5):
ARM: dts: Cygnus: Fixed iProc PCIe controller properties
ARM: dts: HR2: Fixed iProc PCIe controller properties
ARM: dts: NSP: Fixed iProc PCIe controller properties
arm64: dts: ns2: Add missing interrupt-controller property
dt-bindings: pci: Convert iProc PCIe to YAML

.../bindings/pci/brcm,iproc-pcie.txt | 133 -------------
.../bindings/pci/brcm,iproc-pcie.yaml | 179 ++++++++++++++++++
arch/arm/boot/dts/bcm-cygnus.dtsi | 14 +-
arch/arm/boot/dts/bcm-hr2.dtsi | 6 +-
arch/arm/boot/dts/bcm-nsp.dtsi | 9 +-
.../boot/dts/broadcom/northstar2/ns2.dtsi | 2 +
6 files changed, 199 insertions(+), 144 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
create mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml

--
2.25.1



2021-12-06 18:52:50

by Florian Fainelli

[permalink] [raw]
Subject: [PATCH v2 1/5] ARM: dts: Cygnus: Fixed iProc PCIe controller properties

Rename the msi controller unit name to 'msi' to avoid collisions
with the 'msi-controller' boolean property and add the missing
'interrupt-controller' property which is necessary. We also need to
re-arrange the 'ranges' property to show the two cells as being separate
instead of combined since the DT checker is not able to differentiate
otherwise.

Signed-off-by: Florian Fainelli <[email protected]>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 8ecb7861ce10..ea19d1b56400 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -263,6 +263,7 @@ pcie0: pcie@18012000 {
compatible = "brcm,iproc-pcie";
reg = <0x18012000 0x1000>;

+ interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
@@ -274,8 +275,8 @@ pcie0: pcie@18012000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- ranges = <0x81000000 0 0 0x28000000 0 0x00010000
- 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
+ ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
+ <0x82000000 0 0x20000000 0x20000000 0 0x04000000>;

phys = <&pcie0_phy>;
phy-names = "pcie-phy";
@@ -283,7 +284,7 @@ pcie0: pcie@18012000 {
status = "disabled";

msi-parent = <&msi0>;
- msi0: msi-controller {
+ msi0: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
@@ -298,6 +299,7 @@ pcie1: pcie@18013000 {
compatible = "brcm,iproc-pcie";
reg = <0x18013000 0x1000>;

+ interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
@@ -309,8 +311,8 @@ pcie1: pcie@18013000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- ranges = <0x81000000 0 0 0x48000000 0 0x00010000
- 0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
+ ranges = <0x81000000 0 0 0x48000000 0 0x00010000>,
+ <0x82000000 0 0x40000000 0x40000000 0 0x04000000>;

phys = <&pcie1_phy>;
phy-names = "pcie-phy";
@@ -318,7 +320,7 @@ pcie1: pcie@18013000 {
status = "disabled";

msi-parent = <&msi1>;
- msi1: msi-controller {
+ msi1: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
--
2.25.1


2021-12-06 18:52:57

by Florian Fainelli

[permalink] [raw]
Subject: [PATCH v2 3/5] ARM: dts: NSP: Fixed iProc PCIe controller properties

Rename the msi controller unit name to 'msi' to avoid collisions
with the 'msi-controller' boolean property and add the missing
'interrupt-controller' property which is necessary.

Signed-off-by: Florian Fainelli <[email protected]>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 1c08daa18858..8c57e904be7b 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -566,6 +566,7 @@ pcie0: pcie@18012000 {
compatible = "brcm,iproc-pcie";
reg = <0x18012000 0x1000>;

+ interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
@@ -587,7 +588,7 @@ pcie0: pcie@18012000 {
status = "disabled";

msi-parent = <&msi0>;
- msi0: msi-controller {
+ msi0: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
@@ -603,6 +604,7 @@ pcie1: pcie@18013000 {
compatible = "brcm,iproc-pcie";
reg = <0x18013000 0x1000>;

+ interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
@@ -624,7 +626,7 @@ pcie1: pcie@18013000 {
status = "disabled";

msi-parent = <&msi1>;
- msi1: msi-controller {
+ msi1: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
@@ -640,6 +642,7 @@ pcie2: pcie@18014000 {
compatible = "brcm,iproc-pcie";
reg = <0x18014000 0x1000>;

+ interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
@@ -661,7 +664,7 @@ pcie2: pcie@18014000 {
status = "disabled";

msi-parent = <&msi2>;
- msi2: msi-controller {
+ msi2: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
--
2.25.1


2021-12-06 18:52:58

by Florian Fainelli

[permalink] [raw]
Subject: [PATCH v2 2/5] ARM: dts: HR2: Fixed iProc PCIe controller properties

Rename the msi controller unit name to 'msi' to avoid collisions with
the 'msi-controller' boolean property and add the missing
'interrupt-controller' property which is necessary.

Signed-off-by: Florian Fainelli <[email protected]>
---
arch/arm/boot/dts/bcm-hr2.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/bcm-hr2.dtsi b/arch/arm/boot/dts/bcm-hr2.dtsi
index 84cda16f68a2..bd2f1d04161f 100644
--- a/arch/arm/boot/dts/bcm-hr2.dtsi
+++ b/arch/arm/boot/dts/bcm-hr2.dtsi
@@ -298,6 +298,7 @@ pcie0: pcie@18012000 {
compatible = "brcm,iproc-pcie";
reg = <0x18012000 0x1000>;

+ interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
@@ -318,7 +319,7 @@ pcie0: pcie@18012000 {
status = "disabled";

msi-parent = <&msi0>;
- msi0: msi-controller {
+ msi0: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
@@ -334,6 +335,7 @@ pcie1: pcie@18013000 {
compatible = "brcm,iproc-pcie";
reg = <0x18013000 0x1000>;

+ interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
@@ -354,7 +356,7 @@ pcie1: pcie@18013000 {
status = "disabled";

msi-parent = <&msi1>;
- msi1: msi-controller {
+ msi1: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
--
2.25.1


2021-12-06 18:53:00

by Florian Fainelli

[permalink] [raw]
Subject: [PATCH v2 4/5] arm64: dts: ns2: Add missing interrupt-controller property

Add the missing interrupt-controller property to the Northstar 2 iProc
PCIe controller node(s) in preparation for validating the PCIe
controller DT.

Signed-off-by: Florian Fainelli <[email protected]>
---
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
index 2cfeaf3b0a87..0e10d2dd38cf 100644
--- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
@@ -116,6 +116,7 @@ pcie0: pcie@20020000 {
reg = <0 0x20020000 0 0x1000>;
dma-coherent;

+ interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>;
@@ -147,6 +148,7 @@ pcie4: pcie@50020000 {
reg = <0 0x50020000 0 0x1000>;
dma-coherent;

+ interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
--
2.25.1


2021-12-06 18:53:03

by Florian Fainelli

[permalink] [raw]
Subject: [PATCH v2 5/5] dt-bindings: pci: Convert iProc PCIe to YAML

Conver the iProc PCIe controller Device Tree binding to YAML now that
all DTS in arch/arm and arch/arm64 have been fixed to be compliant.

Signed-off-by: Florian Fainelli <[email protected]>
---
.../bindings/pci/brcm,iproc-pcie.txt | 133 -------------
.../bindings/pci/brcm,iproc-pcie.yaml | 179 ++++++++++++++++++
2 files changed, 179 insertions(+), 133 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
create mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml

diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
deleted file mode 100644
index df065aa53a83..000000000000
--- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
+++ /dev/null
@@ -1,133 +0,0 @@
-* Broadcom iProc PCIe controller with the platform bus interface
-
-Required properties:
-- compatible:
- "brcm,iproc-pcie" for the first generation of PAXB based controller,
-used in SoCs including NSP, Cygnus, NS2, and Pegasus
- "brcm,iproc-pcie-paxb-v2" for the second generation of PAXB-based
-controllers, used in Stingray
- "brcm,iproc-pcie-paxc" for the first generation of PAXC based
-controller, used in NS2
- "brcm,iproc-pcie-paxc-v2" for the second generation of PAXC based
-controller, used in Stingray
- PAXB-based root complex is used for external endpoint devices. PAXC-based
-root complex is connected to emulated endpoint devices internal to the ASIC
-- reg: base address and length of the PCIe controller I/O register space
-- #interrupt-cells: set to <1>
-- interrupt-map-mask and interrupt-map, standard PCI properties to define the
- mapping of the PCIe interface to interrupt numbers
-- linux,pci-domain: PCI domain ID. Should be unique for each host controller
-- bus-range: PCI bus numbers covered
-- #address-cells: set to <3>
-- #size-cells: set to <2>
-- device_type: set to "pci"
-- ranges: ranges for the PCI memory and I/O regions
-
-Optional properties:
-- phys: phandle of the PCIe PHY device
-- phy-names: must be "pcie-phy"
-- dma-coherent: present if DMA operations are coherent
-- dma-ranges: Some PAXB-based root complexes do not have inbound mapping done
- by the ASIC after power on reset. In this case, SW is required to configure
-the mapping, based on inbound memory regions specified by this property.
-
-- brcm,pcie-ob: Some iProc SoCs do not have the outbound address mapping done
-by the ASIC after power on reset. In this case, SW needs to configure it
-
-If the brcm,pcie-ob property is present, the following properties become
-effective:
-
-Required:
-- brcm,pcie-ob-axi-offset: The offset from the AXI address to the internal
-address used by the iProc PCIe core (not the PCIe address)
-
-MSI support (optional):
-
-For older platforms without MSI integrated in the GIC, iProc PCIe core provides
-an event queue based MSI support. The iProc MSI uses host memories to store
-MSI posted writes in the event queues
-
-On newer iProc platforms, gicv2m or gicv3-its based MSI support should be used
-
-- msi-map: Maps a Requester ID to an MSI controller and associated MSI
-sideband data
-
-- msi-parent: Link to the device node of the MSI controller, used when no MSI
-sideband data is passed between the iProc PCIe controller and the MSI
-controller
-
-Refer to the following binding documents for more detailed description on
-the use of 'msi-map' and 'msi-parent':
- Documentation/devicetree/bindings/pci/pci-msi.txt
- Documentation/devicetree/bindings/interrupt-controller/msi.txt
-
-When the iProc event queue based MSI is used, one needs to define the
-following properties in the MSI device node:
-- compatible: Must be "brcm,iproc-msi"
-- msi-controller: claims itself as an MSI controller
-- interrupts: List of interrupt IDs from its parent interrupt device
-
-Optional properties:
-- brcm,pcie-msi-inten: Needs to be present for some older iProc platforms that
-require the interrupt enable registers to be set explicitly to enable MSI
-
-Example:
- pcie0: pcie@18012000 {
- compatible = "brcm,iproc-pcie";
- reg = <0x18012000 0x1000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
-
- linux,pci-domain = <0>;
-
- bus-range = <0x00 0xff>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x81000000 0 0 0x28000000 0 0x00010000
- 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
-
- phys = <&phy 0 5>;
- phy-names = "pcie-phy";
-
- brcm,pcie-ob;
- brcm,pcie-ob-axi-offset = <0x00000000>;
-
- msi-parent = <&msi0>;
-
- /* iProc event queue based MSI */
- msi0: msi@18012000 {
- compatible = "brcm,iproc-msi";
- msi-controller;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
- <GIC_SPI 97 IRQ_TYPE_NONE>,
- <GIC_SPI 98 IRQ_TYPE_NONE>,
- <GIC_SPI 99 IRQ_TYPE_NONE>,
- };
- };
-
- pcie1: pcie@18013000 {
- compatible = "brcm,iproc-pcie";
- reg = <0x18013000 0x1000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
-
- linux,pci-domain = <1>;
-
- bus-range = <0x00 0xff>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x81000000 0 0 0x48000000 0 0x00010000
- 0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
-
- phys = <&phy 1 6>;
- phy-names = "pcie-phy";
- };
diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
new file mode 100644
index 000000000000..6d7853f572dd
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
@@ -0,0 +1,179 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/brcm,iproc-pcie.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom iProc PCIe controller with the platform bus interface
+
+maintainers:
+ - Ray Jui <[email protected]>
+ - Scott Branden <[email protected]>
+
+allOf:
+ - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/interrupt-controller/msi-controller.yaml#
+
+properties:
+ compatible:
+ items:
+ - enum:
+ # for the first generation of PAXB based controller, used in SoCs
+ # including NSP, Cygnus, NS2, and Pegasus
+ - brcm,iproc-pcie
+ # for the second generation of PAXB-based controllers, used in
+ # Stingray
+ - brcm,iproc-pcie-paxb-v2
+ # For the first generation of PAXC based controller, used in NS2
+ - brcm,iproc-pcie-paxc
+ # For the second generation of PAXC based controller, used in Stingray
+ - brcm,iproc-pcie-paxc-v2
+
+ reg:
+ maxItems: 1
+ description: >
+ Base address and length of the PCIe controller I/O register space
+
+ interrupt-map: true
+
+ interrupt-map-mask: true
+
+ "#interrupt-cells":
+ const: 1
+
+ ranges:
+ minItems: 1
+ maxItems: 2
+ description: >
+ Ranges for the PCI memory and I/O regions
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ items:
+ - const: pcie-phy
+
+ dma-coherent: true
+
+ "brcm,pcie-ob":
+ type: boolean
+ description: >
+ Some iProc SoCs do not have the outbound address mapping done by the
+ ASIC after power on reset. In this case, SW needs to configure it
+
+ "brcm,pcie-ob-axi-offset":
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: >
+ The offset from the AXI address to the internal address used by the
+ iProc PCIe core (not the PCIe address)
+
+ msi:
+ type: object
+ properties:
+ compatible:
+ items:
+ - const: brcm,iproc-msi
+
+ msi-parent: true
+
+ msi-controller: true
+
+ "brcm,pcie-msi-inten":
+ type: boolean
+ description: >
+ Needs to be present for some older iProc platforms that require the
+ interrupt enable registers to be set explicitly to enable MSI
+
+dependencies:
+ "brcm,pcie-ob-axi-offset": ["brcm,pcie-ob"]
+ "brcm,pcie-msi-inten": [msi-controller]
+
+required:
+ - compatible
+ - reg
+ - ranges
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - brcm,iproc-pcie
+then:
+ required:
+ - interrupt-controller
+ - interrupt-map
+ - interrupt-map-mask
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ bus {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ pcie0: pcie@18012000 {
+ compatible = "brcm,iproc-pcie";
+ reg = <0x18012000 0x1000>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
+
+ linux,pci-domain = <0>;
+
+ bus-range = <0x00 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
+ <0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
+
+ phys = <&phy 0 5>;
+ phy-names = "pcie-phy";
+
+ brcm,pcie-ob;
+ brcm,pcie-ob-axi-offset = <0x00000000>;
+
+ msi-parent = <&msi0>;
+
+ /* iProc event queue based MSI */
+ msi0: msi {
+ compatible = "brcm,iproc-msi";
+ msi-controller;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
+ <GIC_SPI 97 IRQ_TYPE_NONE>,
+ <GIC_SPI 98 IRQ_TYPE_NONE>,
+ <GIC_SPI 99 IRQ_TYPE_NONE>;
+ };
+ };
+
+ pcie1: pcie@18013000 {
+ compatible = "brcm,iproc-pcie";
+ reg = <0x18013000 0x1000>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
+
+ linux,pci-domain = <1>;
+
+ bus-range = <0x00 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0x48000000 0 0x00010000>,
+ <0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
+
+ phys = <&phy 1 6>;
+ phy-names = "pcie-phy";
+ };
+ };
--
2.25.1


2021-12-07 13:49:21

by Rob Herring

[permalink] [raw]
Subject: Re: [PATCH v2 1/5] ARM: dts: Cygnus: Fixed iProc PCIe controller properties

On Mon, Dec 6, 2021 at 12:52 PM Florian Fainelli <[email protected]> wrote:
>
> Rename the msi controller unit name to 'msi' to avoid collisions
> with the 'msi-controller' boolean property and add the missing
> 'interrupt-controller' property which is necessary. We also need to
> re-arrange the 'ranges' property to show the two cells as being separate
> instead of combined since the DT checker is not able to differentiate
> otherwise.
>
> Signed-off-by: Florian Fainelli <[email protected]>
> ---
> arch/arm/boot/dts/bcm-cygnus.dtsi | 14 ++++++++------
> 1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
> index 8ecb7861ce10..ea19d1b56400 100644
> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
> @@ -263,6 +263,7 @@ pcie0: pcie@18012000 {
> compatible = "brcm,iproc-pcie";
> reg = <0x18012000 0x1000>;
>
> + interrupt-controller;

How is this a fix? This doesn't even work before v5.16 with commit
041284181226 ("of/irq: Allow matching of an interrupt-map local to an
interrupt controller").


> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 0>;
> interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
> @@ -274,8 +275,8 @@ pcie0: pcie@18012000 {
> #address-cells = <3>;
> #size-cells = <2>;
> device_type = "pci";
> - ranges = <0x81000000 0 0 0x28000000 0 0x00010000
> - 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
> + ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
> + <0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
>
> phys = <&pcie0_phy>;
> phy-names = "pcie-phy";
> @@ -283,7 +284,7 @@ pcie0: pcie@18012000 {
> status = "disabled";
>
> msi-parent = <&msi0>;
> - msi0: msi-controller {
> + msi0: msi {
> compatible = "brcm,iproc-msi";
> msi-controller;
> interrupt-parent = <&gic>;
> @@ -298,6 +299,7 @@ pcie1: pcie@18013000 {
> compatible = "brcm,iproc-pcie";
> reg = <0x18013000 0x1000>;
>
> + interrupt-controller;
> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 0>;
> interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> @@ -309,8 +311,8 @@ pcie1: pcie@18013000 {
> #address-cells = <3>;
> #size-cells = <2>;
> device_type = "pci";
> - ranges = <0x81000000 0 0 0x48000000 0 0x00010000
> - 0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
> + ranges = <0x81000000 0 0 0x48000000 0 0x00010000>,
> + <0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
>
> phys = <&pcie1_phy>;
> phy-names = "pcie-phy";
> @@ -318,7 +320,7 @@ pcie1: pcie@18013000 {
> status = "disabled";
>
> msi-parent = <&msi1>;
> - msi1: msi-controller {
> + msi1: msi {
> compatible = "brcm,iproc-msi";
> msi-controller;
> interrupt-parent = <&gic>;
> --
> 2.25.1
>

2021-12-07 17:44:30

by Florian Fainelli

[permalink] [raw]
Subject: Re: [PATCH v2 1/5] ARM: dts: Cygnus: Fixed iProc PCIe controller properties

On 12/7/21 5:49 AM, Rob Herring wrote:
> On Mon, Dec 6, 2021 at 12:52 PM Florian Fainelli <[email protected]> wrote:
>>
>> Rename the msi controller unit name to 'msi' to avoid collisions
>> with the 'msi-controller' boolean property and add the missing
>> 'interrupt-controller' property which is necessary. We also need to
>> re-arrange the 'ranges' property to show the two cells as being separate
>> instead of combined since the DT checker is not able to differentiate
>> otherwise.
>>
>> Signed-off-by: Florian Fainelli <[email protected]>
>> ---
>> arch/arm/boot/dts/bcm-cygnus.dtsi | 14 ++++++++------
>> 1 file changed, 8 insertions(+), 6 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
>> index 8ecb7861ce10..ea19d1b56400 100644
>> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
>> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
>> @@ -263,6 +263,7 @@ pcie0: pcie@18012000 {
>> compatible = "brcm,iproc-pcie";
>> reg = <0x18012000 0x1000>;
>>
>> + interrupt-controller;
>
> How is this a fix? This doesn't even work before v5.16 with commit
> 041284181226 ("of/irq: Allow matching of an interrupt-map local to an
> interrupt controller").

What is the path forward? I suppose I could make the
interrupt-controller property not required for this controller but then
the default interrupt-controller schema is not terribly happy about
seeing an interrupt-map/interrupt-map-mask properties without
interrupt-controller.
--
Florian

2021-12-07 20:08:45

by Rob Herring

[permalink] [raw]
Subject: Re: [PATCH v2 1/5] ARM: dts: Cygnus: Fixed iProc PCIe controller properties

On Tue, Dec 7, 2021 at 11:44 AM Florian Fainelli <[email protected]> wrote:
>
> On 12/7/21 5:49 AM, Rob Herring wrote:
> > On Mon, Dec 6, 2021 at 12:52 PM Florian Fainelli <[email protected]> wrote:
> >>
> >> Rename the msi controller unit name to 'msi' to avoid collisions
> >> with the 'msi-controller' boolean property and add the missing
> >> 'interrupt-controller' property which is necessary. We also need to
> >> re-arrange the 'ranges' property to show the two cells as being separate
> >> instead of combined since the DT checker is not able to differentiate
> >> otherwise.
> >>
> >> Signed-off-by: Florian Fainelli <[email protected]>
> >> ---
> >> arch/arm/boot/dts/bcm-cygnus.dtsi | 14 ++++++++------
> >> 1 file changed, 8 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
> >> index 8ecb7861ce10..ea19d1b56400 100644
> >> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
> >> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
> >> @@ -263,6 +263,7 @@ pcie0: pcie@18012000 {
> >> compatible = "brcm,iproc-pcie";
> >> reg = <0x18012000 0x1000>;
> >>
> >> + interrupt-controller;
> >
> > How is this a fix? This doesn't even work before v5.16 with commit
> > 041284181226 ("of/irq: Allow matching of an interrupt-map local to an
> > interrupt controller").
>
> What is the path forward? I suppose I could make the
> interrupt-controller property not required for this controller but then
> the default interrupt-controller schema is not terribly happy about
> seeing an interrupt-map/interrupt-map-mask properties without
> interrupt-controller.

There's certainly no requirement for having 'interrupt-controller'.
What error are you getting?

Rob

2021-12-07 22:49:50

by Florian Fainelli

[permalink] [raw]
Subject: Re: [PATCH v2 1/5] ARM: dts: Cygnus: Fixed iProc PCIe controller properties

On 12/7/21 12:08 PM, Rob Herring wrote:
> On Tue, Dec 7, 2021 at 11:44 AM Florian Fainelli <[email protected]> wrote:
>>
>> On 12/7/21 5:49 AM, Rob Herring wrote:
>>> On Mon, Dec 6, 2021 at 12:52 PM Florian Fainelli <[email protected]> wrote:
>>>>
>>>> Rename the msi controller unit name to 'msi' to avoid collisions
>>>> with the 'msi-controller' boolean property and add the missing
>>>> 'interrupt-controller' property which is necessary. We also need to
>>>> re-arrange the 'ranges' property to show the two cells as being separate
>>>> instead of combined since the DT checker is not able to differentiate
>>>> otherwise.
>>>>
>>>> Signed-off-by: Florian Fainelli <[email protected]>
>>>> ---
>>>> arch/arm/boot/dts/bcm-cygnus.dtsi | 14 ++++++++------
>>>> 1 file changed, 8 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
>>>> index 8ecb7861ce10..ea19d1b56400 100644
>>>> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
>>>> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
>>>> @@ -263,6 +263,7 @@ pcie0: pcie@18012000 {
>>>> compatible = "brcm,iproc-pcie";
>>>> reg = <0x18012000 0x1000>;
>>>>
>>>> + interrupt-controller;
>>>
>>> How is this a fix? This doesn't even work before v5.16 with commit
>>> 041284181226 ("of/irq: Allow matching of an interrupt-map local to an
>>> interrupt controller").
>>
>> What is the path forward? I suppose I could make the
>> interrupt-controller property not required for this controller but then
>> the default interrupt-controller schema is not terribly happy about
>> seeing an interrupt-map/interrupt-map-mask properties without
>> interrupt-controller.
>
> There's certainly no requirement for having 'interrupt-controller'.
> What error are you getting?

This was the error I was getting because I had made the
'interrupt-controller' a required property in the brcm,iproc-pcie.yaml
binding, silly me:

/home/fainelli/dev/linux/arch/arm/boot/dts/bcm958300k.dt.yaml:
pcie@18012000: 'interrupt-controller' is a required property
From schema:
/home/fainelli/dev/linux/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml

after taking it out from the required property there are no more
warnings, I will spin a v3 with the changes, thanks!
--
Florian