Google Chameleon v3 is a testing device capable of emulating multiple
DisplayPort monitors, used for testing purposes. It is based on an Arria
10 SoCFPGA. This patchset adds V4L2 drivers for two IP blocks used in the
device's FPGA: the Chameleon v3 video interface, and the Intel DisplayPort
RX IP. The former is a video capture device that takes video signal and
writes frames into memory, which can be later processed by userspace.
The latter is a DisplayPort receiver IP from Intel, its datasheet can
be found at:
https://www.intel.com/programmable/technical-pdfs/683273.pdf
The video interface driver is a regular v4l2 capture device driver, while
the DP RX driver is a v4l2 subdevice driver. In order to avoid code
duplication, some parts of the DisplayPort code from the DRM subsystem
were put into headers usable by the DP RX driver.
This patchset depends on changes merged into the linux-media tree at:
git://linuxtv.org/hverkuil/media_tree.git tags/br-v6.10d
Here is the output of `v4l2-compliance -s` run on a Chameleon v3 for
/dev/video0 (no attached subdevice):
```
v4l2-compliance 1.27.0-5204, 32 bits, 32-bit time_t
v4l2-compliance SHA: dd049328e528 2024-04-29 13:40:09
Compliance test for chv3-video device /dev/video0:
Driver Info:
Driver name : chv3-video
Card type : Chameleon v3 video
Bus info : platform:c0060500.video
Driver version : 6.9.0
Capabilities : 0x84200001
Video Capture
Streaming
Extended Pix Format
Device Capabilities
Device Caps : 0x04200001
Video Capture
Streaming
Extended Pix Format
Required ioctls:
test VIDIOC_QUERYCAP: OK
test invalid ioctls: OK
Allow for multiple opens:
test second /dev/video0 open: OK
test VIDIOC_QUERYCAP: OK
test VIDIOC_G/S_PRIORITY: OK
test for unlimited opens: OK
Debug ioctls:
test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
test VIDIOC_LOG_STATUS: OK (Not Supported)
Input ioctls:
test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
test VIDIOC_ENUMAUDIO: OK (Not Supported)
test VIDIOC_G/S/ENUMINPUT: OK
test VIDIOC_G/S_AUDIO: OK (Not Supported)
Inputs: 1 Audio Inputs: 0 Tuners: 0
Output ioctls:
test VIDIOC_G/S_MODULATOR: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_ENUMAUDOUT: OK (Not Supported)
test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
test VIDIOC_G/S_AUDOUT: OK (Not Supported)
Outputs: 0 Audio Outputs: 0 Modulators: 0
Input/Output configuration ioctls:
test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK
test VIDIOC_DV_TIMINGS_CAP: OK
test VIDIOC_G/S_EDID: OK (Not Supported)
Control ioctls (Input 0):
test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
test VIDIOC_QUERYCTRL: OK
test VIDIOC_G/S_CTRL: OK
test VIDIOC_G/S/TRY_EXT_CTRLS: OK
test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
Standard Controls: 2 Private Controls: 0
Format ioctls (Input 0):
test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
test VIDIOC_G/S_PARM: OK (Not Supported)
test VIDIOC_G_FBUF: OK (Not Supported)
test VIDIOC_G_FMT: OK
test VIDIOC_TRY_FMT: OK
test VIDIOC_S_FMT: OK
test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
test Cropping: OK (Not Supported)
test Composing: OK (Not Supported)
test Scaling: OK (Not Supported)
Codec ioctls (Input 0):
test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
test VIDIOC_G_ENC_INDEX: OK (Not Supported)
test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)
Buffer ioctls (Input 0):
test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
test CREATE_BUFS maximum buffers: OK
test VIDIOC_REMOVE_BUFS: OK
test VIDIOC_EXPBUF: OK
test Requests: OK (Not Supported)
test TIME32/64: OK
Test input 0:
Streaming ioctls:
test read/write: OK (Not Supported)
test blocking wait: OK
test MMAP (no poll): OK
test MMAP (select): OK
test MMAP (epoll): OK
test USERPTR (no poll): OK (Not Supported)
test USERPTR (select): OK (Not Supported)
test DMABUF: Cannot test, specify --expbuf-device
Total for chv3-video device /dev/video0: 55, Succeeded: 55, Failed: 0, Warnings: 0
```
Here is the output of `v4l2-compliance -s` run on a Chameleon v3 for
/dev/video4 (attached subdevice):
```
v4l2-compliance 1.27.0-5204, 32 bits, 32-bit time_t
v4l2-compliance SHA: dd049328e528 2024-04-29 13:40:09
Compliance test for chv3-video device /dev/video4:
Driver Info:
Driver name : chv3-video
Card type : Chameleon v3 video
Bus info : platform:c0060600.video
Driver version : 6.9.0
Capabilities : 0x84200001
Video Capture
Streaming
Extended Pix Format
Device Capabilities
Device Caps : 0x04200001
Video Capture
Streaming
Extended Pix Format
Required ioctls:
test VIDIOC_QUERYCAP: OK
test invalid ioctls: OK
Allow for multiple opens:
test second /dev/video4 open: OK
test VIDIOC_QUERYCAP: OK
test VIDIOC_G/S_PRIORITY: OK
test for unlimited opens: OK
Debug ioctls:
test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
test VIDIOC_LOG_STATUS: OK (Not Supported)
Input ioctls:
test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
test VIDIOC_ENUMAUDIO: OK (Not Supported)
test VIDIOC_G/S/ENUMINPUT: OK
test VIDIOC_G/S_AUDIO: OK (Not Supported)
Inputs: 1 Audio Inputs: 0 Tuners: 0
Output ioctls:
test VIDIOC_G/S_MODULATOR: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_ENUMAUDOUT: OK (Not Supported)
test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
test VIDIOC_G/S_AUDOUT: OK (Not Supported)
Outputs: 0 Audio Outputs: 0 Modulators: 0
Input/Output configuration ioctls:
test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK
test VIDIOC_DV_TIMINGS_CAP: OK
test VIDIOC_G/S_EDID: OK
Control ioctls (Input 0):
test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
test VIDIOC_QUERYCTRL: OK
test VIDIOC_G/S_CTRL: OK
test VIDIOC_G/S/TRY_EXT_CTRLS: OK
test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
Standard Controls: 2 Private Controls: 0
Format ioctls (Input 0):
test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
test VIDIOC_G/S_PARM: OK (Not Supported)
test VIDIOC_G_FBUF: OK (Not Supported)
test VIDIOC_G_FMT: OK
test VIDIOC_TRY_FMT: OK
test VIDIOC_S_FMT: OK
test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
test Cropping: OK (Not Supported)
test Composing: OK (Not Supported)
test Scaling: OK (Not Supported)
Codec ioctls (Input 0):
test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
test VIDIOC_G_ENC_INDEX: OK (Not Supported)
test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)
Buffer ioctls (Input 0):
test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
test CREATE_BUFS maximum buffers: OK
test VIDIOC_REMOVE_BUFS: OK
test VIDIOC_EXPBUF: OK
test Requests: OK (Not Supported)
test TIME32/64: OK
Test input 0:
Streaming ioctls:
test read/write: OK (Not Supported)
test blocking wait: OK
test MMAP (no poll): OK
test MMAP (select): OK
test MMAP (epoll): OK
test USERPTR (no poll): OK (Not Supported)
test USERPTR (select): OK (Not Supported)
test DMABUF: Cannot test, specify --expbuf-device
Total for chv3-video device /dev/video4: 55, Succeeded: 55, Failed: 0, Warnings: 0
```
v3 changes:
- Send v4l2-subdev API changes as a separate patchset
- Drop chameleonv3/ directory
- Change capture device name from "framebuffer" to "video interface"
- Set sensible min and max dv timing caps
- Set pixelclock to htotal * vtotal * 24Hz (we can't detect the actual value)
- Remove enum_framesizes
- Use v4l2_match_dv_timings()
- Add V4L2_CID_DV_RX_POWER_PRESENT control
- Use V4L2_DV_BT_CEA_1920X1080P60 as default timing
- Use vb2_video_unregister_device()
- Move subdev pad initialization to probe
- Change subdev entity function to MEDIA_ENT_F_DV_DECODER
- Drop dprx 'port' property and always use 'ports' instead
- Remove legacy-format property and use multiple compats
- Cleanup notifier only in non-fallback mode
- Cleanup subdev entity using media_entity_cleanup()
- Increase HPD pulse length to 500ms (see comment in dprx_set_edid())
- Pull HPD low before updating EDID
- Add a DisplayPort media bus type
- Move receiver properties to port endpoint (data-lanes, link-frequencies)
v2 changes:
- Add missing includes in dt binding examples
- Add version number to intel,dprx compatible
- Use generic node names in dts
- Add and document IP configuration parameters
- Remove IRQ registers from intel-dprx (they're not a part of the IP)
- Remove no-endpoint property and check for "port" node instead
Paweł Anikiel (10):
media: Add Chameleon v3 video interface driver
drm/dp_mst: Move DRM-independent structures to separate header
lib: Move DisplayPort CRC functions to common lib
drm/display: Add mask definitions for DP_PAYLOAD_ALLOCATE_* registers
media: dt-bindings: video-interfaces: Support DisplayPort MST
media: v4l2-mediabus: Add support for DisplayPort media bus
media: intel: Add Displayport RX IP driver
media: dt-bindings: Add Chameleon v3 video interface
media: dt-bindings: Add Intel Displayport RX IP
ARM: dts: chameleonv3: Add video device nodes
.../bindings/media/google,chv3-video.yaml | 64 +
.../devicetree/bindings/media/intel,dprx.yaml | 172 ++
.../bindings/media/video-interfaces.yaml | 7 +
.../socfpga/socfpga_arria10_chameleonv3.dts | 194 ++
drivers/gpu/drm/display/Kconfig | 1 +
drivers/gpu/drm/display/drm_dp_mst_topology.c | 76 +-
drivers/media/platform/Kconfig | 1 +
drivers/media/platform/Makefile | 1 +
drivers/media/platform/google/Kconfig | 13 +
drivers/media/platform/google/Makefile | 3 +
drivers/media/platform/google/chv3-video.c | 891 +++++++
drivers/media/platform/intel/Kconfig | 12 +
drivers/media/platform/intel/Makefile | 1 +
drivers/media/platform/intel/intel-dprx.c | 2283 +++++++++++++++++
drivers/media/v4l2-core/v4l2-fwnode.c | 38 +
include/drm/display/drm_dp.h | 9 +-
include/drm/display/drm_dp_mst.h | 238 ++
include/drm/display/drm_dp_mst_helper.h | 232 +-
include/dt-bindings/media/video-interfaces.h | 2 +
include/linux/crc-dp.h | 10 +
include/media/v4l2-fwnode.h | 5 +
include/media/v4l2-mediabus.h | 17 +
lib/Kconfig | 8 +
lib/Makefile | 1 +
lib/crc-dp.c | 78 +
25 files changed, 4053 insertions(+), 304 deletions(-)
create mode 100644 Documentation/devicetree/bindings/media/google,chv3-video.yaml
create mode 100644 Documentation/devicetree/bindings/media/intel,dprx.yaml
create mode 100644 drivers/media/platform/google/Kconfig
create mode 100644 drivers/media/platform/google/Makefile
create mode 100644 drivers/media/platform/google/chv3-video.c
create mode 100644 drivers/media/platform/intel/intel-dprx.c
create mode 100644 include/drm/display/drm_dp_mst.h
create mode 100644 include/linux/crc-dp.h
create mode 100644 lib/crc-dp.c
--
2.45.0.rc1.225.g2a3ae87e7f-goog
Move structures describing MST sideband messages into a separate header
so that non-DRM code can use them.
Signed-off-by: Paweł Anikiel <[email protected]>
---
include/drm/display/drm_dp_mst.h | 238 ++++++++++++++++++++++++
include/drm/display/drm_dp_mst_helper.h | 232 +----------------------
2 files changed, 239 insertions(+), 231 deletions(-)
create mode 100644 include/drm/display/drm_dp_mst.h
diff --git a/include/drm/display/drm_dp_mst.h b/include/drm/display/drm_dp_mst.h
new file mode 100644
index 000000000000..4e398bfd3ee3
--- /dev/null
+++ b/include/drm/display/drm_dp_mst.h
@@ -0,0 +1,238 @@
+/* SPDX-License-Identifier: MIT */
+
+#ifndef _DRM_DP_MST_H_
+#define _DRM_DP_MST_H_
+
+#include <linux/types.h>
+
+struct drm_dp_nak_reply {
+ u8 guid[16];
+ u8 reason;
+ u8 nak_data;
+};
+
+struct drm_dp_link_address_ack_reply {
+ u8 guid[16];
+ u8 nports;
+ struct drm_dp_link_addr_reply_port {
+ bool input_port;
+ u8 peer_device_type;
+ u8 port_number;
+ bool mcs;
+ bool ddps;
+ bool legacy_device_plug_status;
+ u8 dpcd_revision;
+ u8 peer_guid[16];
+ u8 num_sdp_streams;
+ u8 num_sdp_stream_sinks;
+ } ports[16];
+};
+
+struct drm_dp_remote_dpcd_read_ack_reply {
+ u8 port_number;
+ u8 num_bytes;
+ u8 bytes[255];
+};
+
+struct drm_dp_remote_dpcd_write_ack_reply {
+ u8 port_number;
+};
+
+struct drm_dp_remote_dpcd_write_nak_reply {
+ u8 port_number;
+ u8 reason;
+ u8 bytes_written_before_failure;
+};
+
+struct drm_dp_remote_i2c_read_ack_reply {
+ u8 port_number;
+ u8 num_bytes;
+ u8 bytes[255];
+};
+
+struct drm_dp_remote_i2c_read_nak_reply {
+ u8 port_number;
+ u8 nak_reason;
+ u8 i2c_nak_transaction;
+};
+
+struct drm_dp_remote_i2c_write_ack_reply {
+ u8 port_number;
+};
+
+struct drm_dp_query_stream_enc_status_ack_reply {
+ /* Bit[23:16]- Stream Id */
+ u8 stream_id;
+
+ /* Bit[15]- Signed */
+ bool reply_signed;
+
+ /* Bit[10:8]- Stream Output Sink Type */
+ bool unauthorizable_device_present;
+ bool legacy_device_present;
+ bool query_capable_device_present;
+
+ /* Bit[12:11]- Stream Output CP Type */
+ bool hdcp_1x_device_present;
+ bool hdcp_2x_device_present;
+
+ /* Bit[4]- Stream Authentication */
+ bool auth_completed;
+
+ /* Bit[3]- Stream Encryption */
+ bool encryption_enabled;
+
+ /* Bit[2]- Stream Repeater Function Present */
+ bool repeater_present;
+
+ /* Bit[1:0]- Stream State */
+ u8 state;
+};
+
+#define DRM_DP_MAX_SDP_STREAMS 16
+struct drm_dp_allocate_payload {
+ u8 port_number;
+ u8 number_sdp_streams;
+ u8 vcpi;
+ u16 pbn;
+ u8 sdp_stream_sink[DRM_DP_MAX_SDP_STREAMS];
+};
+
+struct drm_dp_allocate_payload_ack_reply {
+ u8 port_number;
+ u8 vcpi;
+ u16 allocated_pbn;
+};
+
+struct drm_dp_connection_status_notify {
+ u8 guid[16];
+ u8 port_number;
+ bool legacy_device_plug_status;
+ bool displayport_device_plug_status;
+ bool message_capability_status;
+ bool input_port;
+ u8 peer_device_type;
+};
+
+struct drm_dp_remote_dpcd_read {
+ u8 port_number;
+ u32 dpcd_address;
+ u8 num_bytes;
+};
+
+struct drm_dp_remote_dpcd_write {
+ u8 port_number;
+ u32 dpcd_address;
+ u8 num_bytes;
+ u8 *bytes;
+};
+
+#define DP_REMOTE_I2C_READ_MAX_TRANSACTIONS 4
+struct drm_dp_remote_i2c_read {
+ u8 num_transactions;
+ u8 port_number;
+ struct drm_dp_remote_i2c_read_tx {
+ u8 i2c_dev_id;
+ u8 num_bytes;
+ u8 *bytes;
+ u8 no_stop_bit;
+ u8 i2c_transaction_delay;
+ } transactions[DP_REMOTE_I2C_READ_MAX_TRANSACTIONS];
+ u8 read_i2c_device_id;
+ u8 num_bytes_read;
+};
+
+struct drm_dp_remote_i2c_write {
+ u8 port_number;
+ u8 write_i2c_device_id;
+ u8 num_bytes;
+ u8 *bytes;
+};
+
+struct drm_dp_query_stream_enc_status {
+ u8 stream_id;
+ u8 client_id[7]; /* 56-bit nonce */
+ u8 stream_event;
+ bool valid_stream_event;
+ u8 stream_behavior;
+ u8 valid_stream_behavior;
+};
+
+/* this covers ENUM_RESOURCES, POWER_DOWN_PHY, POWER_UP_PHY */
+struct drm_dp_port_number_req {
+ u8 port_number;
+};
+
+struct drm_dp_enum_path_resources_ack_reply {
+ u8 port_number;
+ bool fec_capable;
+ u16 full_payload_bw_number;
+ u16 avail_payload_bw_number;
+};
+
+/* covers POWER_DOWN_PHY, POWER_UP_PHY */
+struct drm_dp_port_number_rep {
+ u8 port_number;
+};
+
+struct drm_dp_query_payload {
+ u8 port_number;
+ u8 vcpi;
+};
+
+struct drm_dp_resource_status_notify {
+ u8 port_number;
+ u8 guid[16];
+ u16 available_pbn;
+};
+
+struct drm_dp_query_payload_ack_reply {
+ u8 port_number;
+ u16 allocated_pbn;
+};
+
+struct drm_dp_sideband_msg_req_body {
+ u8 req_type;
+ union ack_req {
+ struct drm_dp_connection_status_notify conn_stat;
+ struct drm_dp_port_number_req port_num;
+ struct drm_dp_resource_status_notify resource_stat;
+
+ struct drm_dp_query_payload query_payload;
+ struct drm_dp_allocate_payload allocate_payload;
+
+ struct drm_dp_remote_dpcd_read dpcd_read;
+ struct drm_dp_remote_dpcd_write dpcd_write;
+
+ struct drm_dp_remote_i2c_read i2c_read;
+ struct drm_dp_remote_i2c_write i2c_write;
+
+ struct drm_dp_query_stream_enc_status enc_status;
+ } u;
+};
+
+struct drm_dp_sideband_msg_reply_body {
+ u8 reply_type;
+ u8 req_type;
+ union ack_replies {
+ struct drm_dp_nak_reply nak;
+ struct drm_dp_link_address_ack_reply link_addr;
+ struct drm_dp_port_number_rep port_number;
+
+ struct drm_dp_enum_path_resources_ack_reply path_resources;
+ struct drm_dp_allocate_payload_ack_reply allocate_payload;
+ struct drm_dp_query_payload_ack_reply query_payload;
+
+ struct drm_dp_remote_dpcd_read_ack_reply remote_dpcd_read_ack;
+ struct drm_dp_remote_dpcd_write_ack_reply remote_dpcd_write_ack;
+ struct drm_dp_remote_dpcd_write_nak_reply remote_dpcd_write_nack;
+
+ struct drm_dp_remote_i2c_read_ack_reply remote_i2c_read_ack;
+ struct drm_dp_remote_i2c_read_nak_reply remote_i2c_read_nack;
+ struct drm_dp_remote_i2c_write_ack_reply remote_i2c_write_ack;
+
+ struct drm_dp_query_stream_enc_status_ack_reply enc_status;
+ } u;
+};
+
+#endif
diff --git a/include/drm/display/drm_dp_mst_helper.h b/include/drm/display/drm_dp_mst_helper.h
index 9b19d8bd520a..61add6f6accd 100644
--- a/include/drm/display/drm_dp_mst_helper.h
+++ b/include/drm/display/drm_dp_mst_helper.h
@@ -23,6 +23,7 @@
#define _DRM_DP_MST_HELPER_H_
#include <linux/types.h>
+#include <drm/display/drm_dp_mst.h>
#include <drm/display/drm_dp_helper.h>
#include <drm/drm_atomic.h>
#include <drm/drm_fixed.h>
@@ -248,237 +249,6 @@ struct drm_dp_mst_branch {
u8 guid[16];
};
-
-struct drm_dp_nak_reply {
- u8 guid[16];
- u8 reason;
- u8 nak_data;
-};
-
-struct drm_dp_link_address_ack_reply {
- u8 guid[16];
- u8 nports;
- struct drm_dp_link_addr_reply_port {
- bool input_port;
- u8 peer_device_type;
- u8 port_number;
- bool mcs;
- bool ddps;
- bool legacy_device_plug_status;
- u8 dpcd_revision;
- u8 peer_guid[16];
- u8 num_sdp_streams;
- u8 num_sdp_stream_sinks;
- } ports[16];
-};
-
-struct drm_dp_remote_dpcd_read_ack_reply {
- u8 port_number;
- u8 num_bytes;
- u8 bytes[255];
-};
-
-struct drm_dp_remote_dpcd_write_ack_reply {
- u8 port_number;
-};
-
-struct drm_dp_remote_dpcd_write_nak_reply {
- u8 port_number;
- u8 reason;
- u8 bytes_written_before_failure;
-};
-
-struct drm_dp_remote_i2c_read_ack_reply {
- u8 port_number;
- u8 num_bytes;
- u8 bytes[255];
-};
-
-struct drm_dp_remote_i2c_read_nak_reply {
- u8 port_number;
- u8 nak_reason;
- u8 i2c_nak_transaction;
-};
-
-struct drm_dp_remote_i2c_write_ack_reply {
- u8 port_number;
-};
-
-struct drm_dp_query_stream_enc_status_ack_reply {
- /* Bit[23:16]- Stream Id */
- u8 stream_id;
-
- /* Bit[15]- Signed */
- bool reply_signed;
-
- /* Bit[10:8]- Stream Output Sink Type */
- bool unauthorizable_device_present;
- bool legacy_device_present;
- bool query_capable_device_present;
-
- /* Bit[12:11]- Stream Output CP Type */
- bool hdcp_1x_device_present;
- bool hdcp_2x_device_present;
-
- /* Bit[4]- Stream Authentication */
- bool auth_completed;
-
- /* Bit[3]- Stream Encryption */
- bool encryption_enabled;
-
- /* Bit[2]- Stream Repeater Function Present */
- bool repeater_present;
-
- /* Bit[1:0]- Stream State */
- u8 state;
-};
-
-#define DRM_DP_MAX_SDP_STREAMS 16
-struct drm_dp_allocate_payload {
- u8 port_number;
- u8 number_sdp_streams;
- u8 vcpi;
- u16 pbn;
- u8 sdp_stream_sink[DRM_DP_MAX_SDP_STREAMS];
-};
-
-struct drm_dp_allocate_payload_ack_reply {
- u8 port_number;
- u8 vcpi;
- u16 allocated_pbn;
-};
-
-struct drm_dp_connection_status_notify {
- u8 guid[16];
- u8 port_number;
- bool legacy_device_plug_status;
- bool displayport_device_plug_status;
- bool message_capability_status;
- bool input_port;
- u8 peer_device_type;
-};
-
-struct drm_dp_remote_dpcd_read {
- u8 port_number;
- u32 dpcd_address;
- u8 num_bytes;
-};
-
-struct drm_dp_remote_dpcd_write {
- u8 port_number;
- u32 dpcd_address;
- u8 num_bytes;
- u8 *bytes;
-};
-
-#define DP_REMOTE_I2C_READ_MAX_TRANSACTIONS 4
-struct drm_dp_remote_i2c_read {
- u8 num_transactions;
- u8 port_number;
- struct drm_dp_remote_i2c_read_tx {
- u8 i2c_dev_id;
- u8 num_bytes;
- u8 *bytes;
- u8 no_stop_bit;
- u8 i2c_transaction_delay;
- } transactions[DP_REMOTE_I2C_READ_MAX_TRANSACTIONS];
- u8 read_i2c_device_id;
- u8 num_bytes_read;
-};
-
-struct drm_dp_remote_i2c_write {
- u8 port_number;
- u8 write_i2c_device_id;
- u8 num_bytes;
- u8 *bytes;
-};
-
-struct drm_dp_query_stream_enc_status {
- u8 stream_id;
- u8 client_id[7]; /* 56-bit nonce */
- u8 stream_event;
- bool valid_stream_event;
- u8 stream_behavior;
- u8 valid_stream_behavior;
-};
-
-/* this covers ENUM_RESOURCES, POWER_DOWN_PHY, POWER_UP_PHY */
-struct drm_dp_port_number_req {
- u8 port_number;
-};
-
-struct drm_dp_enum_path_resources_ack_reply {
- u8 port_number;
- bool fec_capable;
- u16 full_payload_bw_number;
- u16 avail_payload_bw_number;
-};
-
-/* covers POWER_DOWN_PHY, POWER_UP_PHY */
-struct drm_dp_port_number_rep {
- u8 port_number;
-};
-
-struct drm_dp_query_payload {
- u8 port_number;
- u8 vcpi;
-};
-
-struct drm_dp_resource_status_notify {
- u8 port_number;
- u8 guid[16];
- u16 available_pbn;
-};
-
-struct drm_dp_query_payload_ack_reply {
- u8 port_number;
- u16 allocated_pbn;
-};
-
-struct drm_dp_sideband_msg_req_body {
- u8 req_type;
- union ack_req {
- struct drm_dp_connection_status_notify conn_stat;
- struct drm_dp_port_number_req port_num;
- struct drm_dp_resource_status_notify resource_stat;
-
- struct drm_dp_query_payload query_payload;
- struct drm_dp_allocate_payload allocate_payload;
-
- struct drm_dp_remote_dpcd_read dpcd_read;
- struct drm_dp_remote_dpcd_write dpcd_write;
-
- struct drm_dp_remote_i2c_read i2c_read;
- struct drm_dp_remote_i2c_write i2c_write;
-
- struct drm_dp_query_stream_enc_status enc_status;
- } u;
-};
-
-struct drm_dp_sideband_msg_reply_body {
- u8 reply_type;
- u8 req_type;
- union ack_replies {
- struct drm_dp_nak_reply nak;
- struct drm_dp_link_address_ack_reply link_addr;
- struct drm_dp_port_number_rep port_number;
-
- struct drm_dp_enum_path_resources_ack_reply path_resources;
- struct drm_dp_allocate_payload_ack_reply allocate_payload;
- struct drm_dp_query_payload_ack_reply query_payload;
-
- struct drm_dp_remote_dpcd_read_ack_reply remote_dpcd_read_ack;
- struct drm_dp_remote_dpcd_write_ack_reply remote_dpcd_write_ack;
- struct drm_dp_remote_dpcd_write_nak_reply remote_dpcd_write_nack;
-
- struct drm_dp_remote_i2c_read_ack_reply remote_i2c_read_ack;
- struct drm_dp_remote_i2c_read_nak_reply remote_i2c_read_nack;
- struct drm_dp_remote_i2c_write_ack_reply remote_i2c_write_ack;
-
- struct drm_dp_query_stream_enc_status_ack_reply enc_status;
- } u;
-};
-
/* msg is queued to be put into a slot */
#define DRM_DP_SIDEBAND_TX_QUEUED 0
/* msg has started transmitting on a slot - still on msgq */
--
2.45.0.rc1.225.g2a3ae87e7f-goog
Add a DisplayPort bus type and a multi-stream-support property
indicating whether the interface supports MST.
Signed-off-by: Paweł Anikiel <[email protected]>
---
.../devicetree/bindings/media/video-interfaces.yaml | 7 +++++++
include/dt-bindings/media/video-interfaces.h | 2 ++
2 files changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/video-interfaces.yaml b/Documentation/devicetree/bindings/media/video-interfaces.yaml
index 26e3e7d7c67b..7bf3a2c09a5b 100644
--- a/Documentation/devicetree/bindings/media/video-interfaces.yaml
+++ b/Documentation/devicetree/bindings/media/video-interfaces.yaml
@@ -94,6 +94,7 @@ properties:
- 5 # Parallel
- 6 # BT.656
- 7 # DPI
+ - 8 # DisplayPort
description:
Data bus type.
@@ -217,4 +218,10 @@ properties:
Whether the clock signal is used as clock (0) or strobe (1). Used with
CCP2, for instance.
+ multi-stream-support:
+ type: boolean
+ description:
+ Support transport of multiple independent streams. Used for
+ DisplayPort MST-capable interfaces.
+
additionalProperties: true
diff --git a/include/dt-bindings/media/video-interfaces.h b/include/dt-bindings/media/video-interfaces.h
index 68ac4e05e37f..b236806f4482 100644
--- a/include/dt-bindings/media/video-interfaces.h
+++ b/include/dt-bindings/media/video-interfaces.h
@@ -12,5 +12,7 @@
#define MEDIA_BUS_TYPE_CSI2_DPHY 4
#define MEDIA_BUS_TYPE_PARALLEL 5
#define MEDIA_BUS_TYPE_BT656 6
+#define MEDIA_BUS_TYPE_DPI 7
+#define MEDIA_BUS_TYPE_DISPLAYPORT 8
#endif /* __DT_BINDINGS_MEDIA_VIDEO_INTERFACES_H__ */
--
2.45.0.rc1.225.g2a3ae87e7f-goog
Add dt binding for the Intel Displayport receiver FPGA IP.
It is a part of the DisplayPort Intel FPGA IP Core, and supports
DisplayPort 1.4, HBR3 video capture and Multi-Stream Transport.
The user guide can be found here:
https://www.intel.com/programmable/technical-pdfs/683273.pdf
Signed-off-by: Paweł Anikiel <[email protected]>
---
.../devicetree/bindings/media/intel,dprx.yaml | 172 ++++++++++++++++++
1 file changed, 172 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/intel,dprx.yaml
diff --git a/Documentation/devicetree/bindings/media/intel,dprx.yaml b/Documentation/devicetree/bindings/media/intel,dprx.yaml
new file mode 100644
index 000000000000..01bed858f746
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/intel,dprx.yaml
@@ -0,0 +1,172 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/intel,dprx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel DisplayPort RX IP
+
+maintainers:
+ - Paweł Anikiel <[email protected]>
+
+description: |
+ The Intel Displayport RX IP is a part of the DisplayPort Intel FPGA IP
+ Core. It implements a DisplayPort 1.4 receiver capable of HBR3 video
+ capture and Multi-Stream Transport.
+
+ The IP features a large number of configuration parameters, found at:
+ https://www.intel.com/content/www/us/en/docs/programmable/683273/23-3-20-0-1/sink-parameters.html
+
+ The following parameters have to be enabled:
+ - Support DisplayPort sink
+ - Enable GPU control
+ The following parameters have to be set in the devicetree:
+ - RX maximum link rate (using link-frequencies)
+ - Maximum lane count (using data-lanes)
+ - Support MST (using multi-stream-support)
+ - Max stream count (inferred from the number of ports)
+
+properties:
+ compatible:
+ const: intel,dprx-20.0.1
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ description: MST virtual channel 0 or SST main link
+
+ properties:
+ endpoint:
+ $ref: /schemas/media/video-interfaces.yaml#
+
+ properties:
+ link-frequencies: true
+
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+ multi-stream-support: true
+
+ required:
+ - data-lanes
+ - link-frequencies
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: MST virtual channel 0 or SST main link
+
+ port@2:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: MST virtual channel 1
+
+ port@3:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: MST virtual channel 2
+
+ port@4:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: MST virtual channel 3
+
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ dp-receiver@c0062000 {
+ compatible = "intel,dprx-20.0.1";
+ reg = <0xc0062000 0x800>;
+ interrupt-parent = <&dprx_mst_irq>;
+ interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dprx_mst_in: endpoint {
+ remote-endpoint = <&dp_input_mst_0>;
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000
+ 5400000000 8100000000>;
+ multi-stream-support;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dprx_mst_0: endpoint {
+ remote-endpoint = <&video_mst0_0>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ dprx_mst_1: endpoint {
+ remote-endpoint = <&video_mst1_0>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+ dprx_mst_2: endpoint {
+ remote-endpoint = <&video_mst2_0>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ dprx_mst_3: endpoint {
+ remote-endpoint = <&video_mst3_0>;
+ };
+ };
+ };
+ };
+
+ - |
+ dp-receiver@c0064000 {
+ compatible = "intel,dprx-20.0.1";
+ reg = <0xc0064000 0x800>;
+ interrupt-parent = <&dprx_sst_irq>;
+ interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dprx_sst_in: endpoint {
+ remote-endpoint = <&dp_input_sst_0>;
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000
+ 5400000000 8100000000>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dprx_sst_0: endpoint {
+ remote-endpoint = <&video_sst_0>;
+ };
+ };
+ };
+ };
--
2.45.0.rc1.225.g2a3ae87e7f-goog
On Tue, May 07, 2024 at 03:54:08PM +0000, Paweł Anikiel wrote:
> Add a DisplayPort bus type and a multi-stream-support property
> indicating whether the interface supports MST.
>
> Signed-off-by: Paweł Anikiel <[email protected]>
> ---
> .../devicetree/bindings/media/video-interfaces.yaml | 7 +++++++
> include/dt-bindings/media/video-interfaces.h | 2 ++
> 2 files changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/media/video-interfaces.yaml b/Documentation/devicetree/bindings/media/video-interfaces.yaml
> index 26e3e7d7c67b..7bf3a2c09a5b 100644
> --- a/Documentation/devicetree/bindings/media/video-interfaces.yaml
> +++ b/Documentation/devicetree/bindings/media/video-interfaces.yaml
> @@ -94,6 +94,7 @@ properties:
> - 5 # Parallel
> - 6 # BT.656
> - 7 # DPI
> + - 8 # DisplayPort
> description:
> Data bus type.
>
> @@ -217,4 +218,10 @@ properties:
> Whether the clock signal is used as clock (0) or strobe (1). Used with
> CCP2, for instance.
>
> + multi-stream-support:
If MST is a known term for DP, then perhaps "dp-mst-support" for the
name. In any case, 'dp' should be in there somewhere.
> + type: boolean
> + description:
> + Support transport of multiple independent streams. Used for
> + DisplayPort MST-capable interfaces.
Wouldn't this be implied by the devices at each end of the link? The
drivers for each device should really list out features supported for
the link. The mode used is then the union of those 2 lists with DT
properties only used when the union is not definitive.
> +
> additionalProperties: true
> diff --git a/include/dt-bindings/media/video-interfaces.h b/include/dt-bindings/media/video-interfaces.h
> index 68ac4e05e37f..b236806f4482 100644
> --- a/include/dt-bindings/media/video-interfaces.h
> +++ b/include/dt-bindings/media/video-interfaces.h
> @@ -12,5 +12,7 @@
> #define MEDIA_BUS_TYPE_CSI2_DPHY 4
> #define MEDIA_BUS_TYPE_PARALLEL 5
> #define MEDIA_BUS_TYPE_BT656 6
> +#define MEDIA_BUS_TYPE_DPI 7
> +#define MEDIA_BUS_TYPE_DISPLAYPORT 8
>
> #endif /* __DT_BINDINGS_MEDIA_VIDEO_INTERFACES_H__ */
> --
> 2.45.0.rc1.225.g2a3ae87e7f-goog
>
On Tue, May 07, 2024 at 03:54:12PM +0000, Paweł Anikiel wrote:
> Add dt binding for the Intel Displayport receiver FPGA IP.
> It is a part of the DisplayPort Intel FPGA IP Core, and supports
> DisplayPort 1.4, HBR3 video capture and Multi-Stream Transport.
>
> The user guide can be found here:
> https://www.intel.com/programmable/technical-pdfs/683273.pdf
>
> Signed-off-by: Paweł Anikiel <[email protected]>
> ---
> .../devicetree/bindings/media/intel,dprx.yaml | 172 ++++++++++++++++++
> 1 file changed, 172 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/intel,dprx.yaml
>
> diff --git a/Documentation/devicetree/bindings/media/intel,dprx.yaml b/Documentation/devicetree/bindings/media/intel,dprx.yaml
> new file mode 100644
> index 000000000000..01bed858f746
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/intel,dprx.yaml
> @@ -0,0 +1,172 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/intel,dprx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel DisplayPort RX IP
> +
> +maintainers:
> + - Paweł Anikiel <[email protected]>
> +
> +description: |
> + The Intel Displayport RX IP is a part of the DisplayPort Intel FPGA IP
> + Core. It implements a DisplayPort 1.4 receiver capable of HBR3 video
> + capture and Multi-Stream Transport.
> +
> + The IP features a large number of configuration parameters, found at:
> + https://www.intel.com/content/www/us/en/docs/programmable/683273/23-3-20-0-1/sink-parameters.html
> +
> + The following parameters have to be enabled:
> + - Support DisplayPort sink
> + - Enable GPU control
> + The following parameters have to be set in the devicetree:
> + - RX maximum link rate (using link-frequencies)
> + - Maximum lane count (using data-lanes)
> + - Support MST (using multi-stream-support)
> + - Max stream count (inferred from the number of ports)
> +
> +properties:
> + compatible:
> + const: intel,dprx-20.0.1
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + description: MST virtual channel 0 or SST main link
> +
> + properties:
> + endpoint:
> + $ref: /schemas/media/video-interfaces.yaml#
> +
> + properties:
> + link-frequencies: true
> +
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + multi-stream-support: true
> +
> + required:
> + - data-lanes
> + - link-frequencies
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: MST virtual channel 0 or SST main link
How can port@0 also be "MST virtual channel 0 or SST main link"?
> +
> + port@2:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: MST virtual channel 1
> +
> + port@3:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: MST virtual channel 2
> +
> + port@4:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: MST virtual channel 3
> +
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + dp-receiver@c0062000 {
> + compatible = "intel,dprx-20.0.1";
> + reg = <0xc0062000 0x800>;
> + interrupt-parent = <&dprx_mst_irq>;
> + interrupts = <0 IRQ_TYPE_EDGE_RISING>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dprx_mst_in: endpoint {
> + remote-endpoint = <&dp_input_mst_0>;
> + data-lanes = <0 1 2 3>;
> + link-frequencies = /bits/ 64 <1620000000 2700000000
> + 5400000000 8100000000>;
> + multi-stream-support;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dprx_mst_0: endpoint {
> + remote-endpoint = <&video_mst0_0>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> + dprx_mst_1: endpoint {
> + remote-endpoint = <&video_mst1_0>;
> + };
> + };
> +
> + port@3 {
> + reg = <3>;
> + dprx_mst_2: endpoint {
> + remote-endpoint = <&video_mst2_0>;
> + };
> + };
> +
> + port@4 {
> + reg = <4>;
> + dprx_mst_3: endpoint {
> + remote-endpoint = <&video_mst3_0>;
> + };
> + };
> + };
> + };
> +
> + - |
> + dp-receiver@c0064000 {
> + compatible = "intel,dprx-20.0.1";
> + reg = <0xc0064000 0x800>;
> + interrupt-parent = <&dprx_sst_irq>;
> + interrupts = <0 IRQ_TYPE_EDGE_RISING>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dprx_sst_in: endpoint {
> + remote-endpoint = <&dp_input_sst_0>;
> + data-lanes = <0 1 2 3>;
> + link-frequencies = /bits/ 64 <1620000000 2700000000
> + 5400000000 8100000000>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dprx_sst_0: endpoint {
> + remote-endpoint = <&video_sst_0>;
> + };
> + };
> + };
> + };
> --
> 2.45.0.rc1.225.g2a3ae87e7f-goog
>
On Fri, May 10, 2024 at 11:24 PM Rob Herring <[email protected]> wrote:
>
> On Tue, May 07, 2024 at 03:54:12PM +0000, Paweł Anikiel wrote:
> > Add dt binding for the Intel Displayport receiver FPGA IP.
> > It is a part of the DisplayPort Intel FPGA IP Core, and supports
> > DisplayPort 1.4, HBR3 video capture and Multi-Stream Transport.
> >
> > The user guide can be found here:
> > https://www.intel.com/programmable/technical-pdfs/683273.pdf
> >
> > Signed-off-by: Paweł Anikiel <[email protected]>
> > ---
> > .../devicetree/bindings/media/intel,dprx.yaml | 172 ++++++++++++++++++
> > 1 file changed, 172 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/media/intel,dprx.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/media/intel,dprx.yaml b/Documentation/devicetree/bindings/media/intel,dprx.yaml
> > new file mode 100644
> > index 000000000000..01bed858f746
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/intel,dprx.yaml
> > @@ -0,0 +1,172 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/media/intel,dprx.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Intel DisplayPort RX IP
> > +
> > +maintainers:
> > + - Paweł Anikiel <[email protected]>
> > +
> > +description: |
> > + The Intel Displayport RX IP is a part of the DisplayPort Intel FPGA IP
> > + Core. It implements a DisplayPort 1.4 receiver capable of HBR3 video
> > + capture and Multi-Stream Transport.
> > +
> > + The IP features a large number of configuration parameters, found at:
> > + https://www.intel.com/content/www/us/en/docs/programmable/683273/23-3-20-0-1/sink-parameters.html
> > +
> > + The following parameters have to be enabled:
> > + - Support DisplayPort sink
> > + - Enable GPU control
> > + The following parameters have to be set in the devicetree:
> > + - RX maximum link rate (using link-frequencies)
> > + - Maximum lane count (using data-lanes)
> > + - Support MST (using multi-stream-support)
> > + - Max stream count (inferred from the number of ports)
> > +
> > +properties:
> > + compatible:
> > + const: intel,dprx-20.0.1
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + ports:
> > + $ref: /schemas/graph.yaml#/properties/ports
> > +
> > + properties:
> > + port@0:
> > + $ref: /schemas/graph.yaml#/$defs/port-base
> > + description: MST virtual channel 0 or SST main link
> > +
> > + properties:
> > + endpoint:
> > + $ref: /schemas/media/video-interfaces.yaml#
> > +
> > + properties:
> > + link-frequencies: true
> > +
> > + data-lanes:
> > + minItems: 1
> > + maxItems: 4
> > +
> > + multi-stream-support: true
> > +
> > + required:
> > + - data-lanes
> > + - link-frequencies
> > +
> > + port@1:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description: MST virtual channel 0 or SST main link
>
> How can port@0 also be "MST virtual channel 0 or SST main link"?
Sorry, I made a mistake. port@0 should be something like "Input port".
>
> > +
> > + port@2:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description: MST virtual channel 1
> > +
> > + port@3:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description: MST virtual channel 2
> > +
> > + port@4:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description: MST virtual channel 3
> > +
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - ports
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > + dp-receiver@c0062000 {
> > + compatible = "intel,dprx-20.0.1";
> > + reg = <0xc0062000 0x800>;
> > + interrupt-parent = <&dprx_mst_irq>;
> > + interrupts = <0 IRQ_TYPE_EDGE_RISING>;
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > + dprx_mst_in: endpoint {
> > + remote-endpoint = <&dp_input_mst_0>;
> > + data-lanes = <0 1 2 3>;
> > + link-frequencies = /bits/ 64 <1620000000 2700000000
> > + 5400000000 8100000000>;
> > + multi-stream-support;
> > + };
> > + };
> > +
> > + port@1 {
> > + reg = <1>;
> > + dprx_mst_0: endpoint {
> > + remote-endpoint = <&video_mst0_0>;
> > + };
> > + };
> > +
> > + port@2 {
> > + reg = <2>;
> > + dprx_mst_1: endpoint {
> > + remote-endpoint = <&video_mst1_0>;
> > + };
> > + };
> > +
> > + port@3 {
> > + reg = <3>;
> > + dprx_mst_2: endpoint {
> > + remote-endpoint = <&video_mst2_0>;
> > + };
> > + };
> > +
> > + port@4 {
> > + reg = <4>;
> > + dprx_mst_3: endpoint {
> > + remote-endpoint = <&video_mst3_0>;
> > + };
> > + };
> > + };
> > + };
> > +
> > + - |
> > + dp-receiver@c0064000 {
> > + compatible = "intel,dprx-20.0.1";
> > + reg = <0xc0064000 0x800>;
> > + interrupt-parent = <&dprx_sst_irq>;
> > + interrupts = <0 IRQ_TYPE_EDGE_RISING>;
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > + dprx_sst_in: endpoint {
> > + remote-endpoint = <&dp_input_sst_0>;
> > + data-lanes = <0 1 2 3>;
> > + link-frequencies = /bits/ 64 <1620000000 2700000000
> > + 5400000000 8100000000>;
> > + };
> > + };
> > +
> > + port@1 {
> > + reg = <1>;
> > + dprx_sst_0: endpoint {
> > + remote-endpoint = <&video_sst_0>;
> > + };
> > + };
> > + };
> > + };
> > --
> > 2.45.0.rc1.225.g2a3ae87e7f-goog
> >
On Fri, May 10, 2024 at 11:16 PM Rob Herring <[email protected]> wrote:
>
> On Tue, May 07, 2024 at 03:54:08PM +0000, Paweł Anikiel wrote:
> > Add a DisplayPort bus type and a multi-stream-support property
> > indicating whether the interface supports MST.
> >
> > Signed-off-by: Paweł Anikiel <[email protected]>
> > ---
> > .../devicetree/bindings/media/video-interfaces.yaml | 7 +++++++
> > include/dt-bindings/media/video-interfaces.h | 2 ++
> > 2 files changed, 9 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/media/video-interfaces.yaml b/Documentation/devicetree/bindings/media/video-interfaces.yaml
> > index 26e3e7d7c67b..7bf3a2c09a5b 100644
> > --- a/Documentation/devicetree/bindings/media/video-interfaces.yaml
> > +++ b/Documentation/devicetree/bindings/media/video-interfaces.yaml
> > @@ -94,6 +94,7 @@ properties:
> > - 5 # Parallel
> > - 6 # BT.656
> > - 7 # DPI
> > + - 8 # DisplayPort
> > description:
> > Data bus type.
> >
> > @@ -217,4 +218,10 @@ properties:
> > Whether the clock signal is used as clock (0) or strobe (1). Used with
> > CCP2, for instance.
> >
> > + multi-stream-support:
>
> If MST is a known term for DP, then perhaps "dp-mst-support" for the
> name. In any case, 'dp' should be in there somewhere.
I tried to keep the name generic, for the use case of some other bus
with a similar feature, e.g. CSI-2 and virtual channels.
>
> > + type: boolean
> > + description:
> > + Support transport of multiple independent streams. Used for
> > + DisplayPort MST-capable interfaces.
>
> Wouldn't this be implied by the devices at each end of the link?
For the case of the Intel DP receiver, MST support is an IP
configuration option which cannot be determined at probe time, so it
needs to be read from DT. Having learned that the receiver should use
properties from video-interfaces, I decided to put this property here.
Do you think that's a good idea?
> The drivers for each device should really list out features supported for
> the link. The mode used is then the union of those 2 lists with DT
> properties only used when the union is not definitive.
The mode that actually gets used (MST vs non-MST) is negotiated during
link setup as part of the DP protocol - the sink reports to the source
if it supports MST, and it's up to the source's ability to enable MST
or not.
The property I'm adding here is only useful for the driver to know if
the hw supports MST or not (in the case it can't determine it itself).
>
>
> > +
> > additionalProperties: true
> > diff --git a/include/dt-bindings/media/video-interfaces.h b/include/dt-bindings/media/video-interfaces.h
> > index 68ac4e05e37f..b236806f4482 100644
> > --- a/include/dt-bindings/media/video-interfaces.h
> > +++ b/include/dt-bindings/media/video-interfaces.h
> > @@ -12,5 +12,7 @@
> > #define MEDIA_BUS_TYPE_CSI2_DPHY 4
> > #define MEDIA_BUS_TYPE_PARALLEL 5
> > #define MEDIA_BUS_TYPE_BT656 6
> > +#define MEDIA_BUS_TYPE_DPI 7
> > +#define MEDIA_BUS_TYPE_DISPLAYPORT 8
> >
> > #endif /* __DT_BINDINGS_MEDIA_VIDEO_INTERFACES_H__ */
> > --
> > 2.45.0.rc1.225.g2a3ae87e7f-goog
> >
On Tue, 07 May 2024 15:54:08 +0000, Paweł Anikiel wrote:
> Add a DisplayPort bus type and a multi-stream-support property
> indicating whether the interface supports MST.
>
> Signed-off-by: Paweł Anikiel <[email protected]>
> ---
> .../devicetree/bindings/media/video-interfaces.yaml | 7 +++++++
> include/dt-bindings/media/video-interfaces.h | 2 ++
> 2 files changed, 9 insertions(+)
>
Reviewed-by: Rob Herring (Arm) <[email protected]>
Hi Paweł,
On 07/05/2024 17:54, Paweł Anikiel wrote:
> Google Chameleon v3 is a testing device capable of emulating multiple
> DisplayPort monitors, used for testing purposes. It is based on an Arria
> 10 SoCFPGA. This patchset adds V4L2 drivers for two IP blocks used in the
> device's FPGA: the Chameleon v3 video interface, and the Intel DisplayPort
> RX IP. The former is a video capture device that takes video signal and
> writes frames into memory, which can be later processed by userspace.
> The latter is a DisplayPort receiver IP from Intel, its datasheet can
> be found at:
> https://www.intel.com/programmable/technical-pdfs/683273.pdf
>
> The video interface driver is a regular v4l2 capture device driver, while
> the DP RX driver is a v4l2 subdevice driver. In order to avoid code
> duplication, some parts of the DisplayPort code from the DRM subsystem
> were put into headers usable by the DP RX driver.
>
> This patchset depends on changes merged into the linux-media tree at:
> git://linuxtv.org/hverkuil/media_tree.git tags/br-v6.10d
>
> Here is the output of `v4l2-compliance -s` run on a Chameleon v3 for
> /dev/video0 (no attached subdevice):
This v3 series looks pretty good to me, so from a V4L2 perspective I believe
a v4 should be OK.
But I need Acked-by for the drm and bindings patches before I can
merge a v4.
Regards,
Hans
>
> ```
> v4l2-compliance 1.27.0-5204, 32 bits, 32-bit time_t
> v4l2-compliance SHA: dd049328e528 2024-04-29 13:40:09
>
> Compliance test for chv3-video device /dev/video0:
>
> Driver Info:
> Driver name : chv3-video
> Card type : Chameleon v3 video
> Bus info : platform:c0060500.video
> Driver version : 6.9.0
> Capabilities : 0x84200001
> Video Capture
> Streaming
> Extended Pix Format
> Device Capabilities
> Device Caps : 0x04200001
> Video Capture
> Streaming
> Extended Pix Format
>
> Required ioctls:
> test VIDIOC_QUERYCAP: OK
> test invalid ioctls: OK
>
> Allow for multiple opens:
> test second /dev/video0 open: OK
> test VIDIOC_QUERYCAP: OK
> test VIDIOC_G/S_PRIORITY: OK
> test for unlimited opens: OK
>
> Debug ioctls:
> test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
> test VIDIOC_LOG_STATUS: OK (Not Supported)
>
> Input ioctls:
> test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
> test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
> test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
> test VIDIOC_ENUMAUDIO: OK (Not Supported)
> test VIDIOC_G/S/ENUMINPUT: OK
> test VIDIOC_G/S_AUDIO: OK (Not Supported)
> Inputs: 1 Audio Inputs: 0 Tuners: 0
>
> Output ioctls:
> test VIDIOC_G/S_MODULATOR: OK (Not Supported)
> test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
> test VIDIOC_ENUMAUDOUT: OK (Not Supported)
> test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
> test VIDIOC_G/S_AUDOUT: OK (Not Supported)
> Outputs: 0 Audio Outputs: 0 Modulators: 0
>
> Input/Output configuration ioctls:
> test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
> test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK
> test VIDIOC_DV_TIMINGS_CAP: OK
> test VIDIOC_G/S_EDID: OK (Not Supported)
>
> Control ioctls (Input 0):
> test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
> test VIDIOC_QUERYCTRL: OK
> test VIDIOC_G/S_CTRL: OK
> test VIDIOC_G/S/TRY_EXT_CTRLS: OK
> test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
> test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
> Standard Controls: 2 Private Controls: 0
>
> Format ioctls (Input 0):
> test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
> test VIDIOC_G/S_PARM: OK (Not Supported)
> test VIDIOC_G_FBUF: OK (Not Supported)
> test VIDIOC_G_FMT: OK
> test VIDIOC_TRY_FMT: OK
> test VIDIOC_S_FMT: OK
> test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
> test Cropping: OK (Not Supported)
> test Composing: OK (Not Supported)
> test Scaling: OK (Not Supported)
>
> Codec ioctls (Input 0):
> test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
> test VIDIOC_G_ENC_INDEX: OK (Not Supported)
> test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)
>
> Buffer ioctls (Input 0):
> test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
> test CREATE_BUFS maximum buffers: OK
> test VIDIOC_REMOVE_BUFS: OK
> test VIDIOC_EXPBUF: OK
> test Requests: OK (Not Supported)
> test TIME32/64: OK
>
> Test input 0:
>
> Streaming ioctls:
> test read/write: OK (Not Supported)
> test blocking wait: OK
> test MMAP (no poll): OK
> test MMAP (select): OK
> test MMAP (epoll): OK
> test USERPTR (no poll): OK (Not Supported)
> test USERPTR (select): OK (Not Supported)
> test DMABUF: Cannot test, specify --expbuf-device
>
> Total for chv3-video device /dev/video0: 55, Succeeded: 55, Failed: 0, Warnings: 0
> ```
>
> Here is the output of `v4l2-compliance -s` run on a Chameleon v3 for
> /dev/video4 (attached subdevice):
>
> ```
> v4l2-compliance 1.27.0-5204, 32 bits, 32-bit time_t
> v4l2-compliance SHA: dd049328e528 2024-04-29 13:40:09
>
> Compliance test for chv3-video device /dev/video4:
>
> Driver Info:
> Driver name : chv3-video
> Card type : Chameleon v3 video
> Bus info : platform:c0060600.video
> Driver version : 6.9.0
> Capabilities : 0x84200001
> Video Capture
> Streaming
> Extended Pix Format
> Device Capabilities
> Device Caps : 0x04200001
> Video Capture
> Streaming
> Extended Pix Format
>
> Required ioctls:
> test VIDIOC_QUERYCAP: OK
> test invalid ioctls: OK
>
> Allow for multiple opens:
> test second /dev/video4 open: OK
> test VIDIOC_QUERYCAP: OK
> test VIDIOC_G/S_PRIORITY: OK
> test for unlimited opens: OK
>
> Debug ioctls:
> test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
> test VIDIOC_LOG_STATUS: OK (Not Supported)
>
> Input ioctls:
> test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
> test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
> test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
> test VIDIOC_ENUMAUDIO: OK (Not Supported)
> test VIDIOC_G/S/ENUMINPUT: OK
> test VIDIOC_G/S_AUDIO: OK (Not Supported)
> Inputs: 1 Audio Inputs: 0 Tuners: 0
>
> Output ioctls:
> test VIDIOC_G/S_MODULATOR: OK (Not Supported)
> test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
> test VIDIOC_ENUMAUDOUT: OK (Not Supported)
> test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
> test VIDIOC_G/S_AUDOUT: OK (Not Supported)
> Outputs: 0 Audio Outputs: 0 Modulators: 0
>
> Input/Output configuration ioctls:
> test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
> test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK
> test VIDIOC_DV_TIMINGS_CAP: OK
> test VIDIOC_G/S_EDID: OK
>
> Control ioctls (Input 0):
> test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
> test VIDIOC_QUERYCTRL: OK
> test VIDIOC_G/S_CTRL: OK
> test VIDIOC_G/S/TRY_EXT_CTRLS: OK
> test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
> test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
> Standard Controls: 2 Private Controls: 0
>
> Format ioctls (Input 0):
> test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
> test VIDIOC_G/S_PARM: OK (Not Supported)
> test VIDIOC_G_FBUF: OK (Not Supported)
> test VIDIOC_G_FMT: OK
> test VIDIOC_TRY_FMT: OK
> test VIDIOC_S_FMT: OK
> test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
> test Cropping: OK (Not Supported)
> test Composing: OK (Not Supported)
> test Scaling: OK (Not Supported)
>
> Codec ioctls (Input 0):
> test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
> test VIDIOC_G_ENC_INDEX: OK (Not Supported)
> test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)
>
> Buffer ioctls (Input 0):
> test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
> test CREATE_BUFS maximum buffers: OK
> test VIDIOC_REMOVE_BUFS: OK
> test VIDIOC_EXPBUF: OK
> test Requests: OK (Not Supported)
> test TIME32/64: OK
>
> Test input 0:
>
> Streaming ioctls:
> test read/write: OK (Not Supported)
> test blocking wait: OK
> test MMAP (no poll): OK
> test MMAP (select): OK
> test MMAP (epoll): OK
> test USERPTR (no poll): OK (Not Supported)
> test USERPTR (select): OK (Not Supported)
> test DMABUF: Cannot test, specify --expbuf-device
>
> Total for chv3-video device /dev/video4: 55, Succeeded: 55, Failed: 0, Warnings: 0
> ```
>
> v3 changes:
> - Send v4l2-subdev API changes as a separate patchset
> - Drop chameleonv3/ directory
> - Change capture device name from "framebuffer" to "video interface"
> - Set sensible min and max dv timing caps
> - Set pixelclock to htotal * vtotal * 24Hz (we can't detect the actual value)
> - Remove enum_framesizes
> - Use v4l2_match_dv_timings()
> - Add V4L2_CID_DV_RX_POWER_PRESENT control
> - Use V4L2_DV_BT_CEA_1920X1080P60 as default timing
> - Use vb2_video_unregister_device()
> - Move subdev pad initialization to probe
> - Change subdev entity function to MEDIA_ENT_F_DV_DECODER
> - Drop dprx 'port' property and always use 'ports' instead
> - Remove legacy-format property and use multiple compats
> - Cleanup notifier only in non-fallback mode
> - Cleanup subdev entity using media_entity_cleanup()
> - Increase HPD pulse length to 500ms (see comment in dprx_set_edid())
> - Pull HPD low before updating EDID
> - Add a DisplayPort media bus type
> - Move receiver properties to port endpoint (data-lanes, link-frequencies)
>
> v2 changes:
> - Add missing includes in dt binding examples
> - Add version number to intel,dprx compatible
> - Use generic node names in dts
> - Add and document IP configuration parameters
> - Remove IRQ registers from intel-dprx (they're not a part of the IP)
> - Remove no-endpoint property and check for "port" node instead
>
> Paweł Anikiel (10):
> media: Add Chameleon v3 video interface driver
> drm/dp_mst: Move DRM-independent structures to separate header
> lib: Move DisplayPort CRC functions to common lib
> drm/display: Add mask definitions for DP_PAYLOAD_ALLOCATE_* registers
> media: dt-bindings: video-interfaces: Support DisplayPort MST
> media: v4l2-mediabus: Add support for DisplayPort media bus
> media: intel: Add Displayport RX IP driver
> media: dt-bindings: Add Chameleon v3 video interface
> media: dt-bindings: Add Intel Displayport RX IP
> ARM: dts: chameleonv3: Add video device nodes
>
> .../bindings/media/google,chv3-video.yaml | 64 +
> .../devicetree/bindings/media/intel,dprx.yaml | 172 ++
> .../bindings/media/video-interfaces.yaml | 7 +
> .../socfpga/socfpga_arria10_chameleonv3.dts | 194 ++
> drivers/gpu/drm/display/Kconfig | 1 +
> drivers/gpu/drm/display/drm_dp_mst_topology.c | 76 +-
> drivers/media/platform/Kconfig | 1 +
> drivers/media/platform/Makefile | 1 +
> drivers/media/platform/google/Kconfig | 13 +
> drivers/media/platform/google/Makefile | 3 +
> drivers/media/platform/google/chv3-video.c | 891 +++++++
> drivers/media/platform/intel/Kconfig | 12 +
> drivers/media/platform/intel/Makefile | 1 +
> drivers/media/platform/intel/intel-dprx.c | 2283 +++++++++++++++++
> drivers/media/v4l2-core/v4l2-fwnode.c | 38 +
> include/drm/display/drm_dp.h | 9 +-
> include/drm/display/drm_dp_mst.h | 238 ++
> include/drm/display/drm_dp_mst_helper.h | 232 +-
> include/dt-bindings/media/video-interfaces.h | 2 +
> include/linux/crc-dp.h | 10 +
> include/media/v4l2-fwnode.h | 5 +
> include/media/v4l2-mediabus.h | 17 +
> lib/Kconfig | 8 +
> lib/Makefile | 1 +
> lib/crc-dp.c | 78 +
> 25 files changed, 4053 insertions(+), 304 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/media/google,chv3-video.yaml
> create mode 100644 Documentation/devicetree/bindings/media/intel,dprx.yaml
> create mode 100644 drivers/media/platform/google/Kconfig
> create mode 100644 drivers/media/platform/google/Makefile
> create mode 100644 drivers/media/platform/google/chv3-video.c
> create mode 100644 drivers/media/platform/intel/intel-dprx.c
> create mode 100644 include/drm/display/drm_dp_mst.h
> create mode 100644 include/linux/crc-dp.h
> create mode 100644 lib/crc-dp.c
>