[PATCH 00/20] pinctrl: ralink: fix ABI, improve driver, move to mediatek, improve dt-bindings
This is an ambitious effort I've been wanting to do for months.
Straight off the bat, I'm fixing the ABI that I broke a while back, by
reintroducing the ralink,rt2880-pinmux compatible string.
If you take a look at the schema for mt7620 and rt305x, some functions got
multiple lists for groups. Like refclk on mt7620. Because mt7620 and
mt7628/mt7688 SoCs use the same compatible string, it's impossible to
differentiate on the binding which SoC a devicetree is actually for.
Therefore, the binding will allow all groups listed for that function. For
example, if the SoC is mt7620, only the refclk function for the mdio group
can be used. If one were to put "spi cs1" as the function there, there
wouldn't be a warning.
I address this by introducing new compatible strings for these SoCs, then
split the schemas. I also separate mt7628/mt7688 from mt7620 pinctrl
subdriver in the process.
I wanted to split the rt305x driver too but too much code would be reused
so I backed down from that.
This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
introduced new SoCs which utilise this platform. We're moving the Ralink
pinctrl driver to MediaTek, and rename the schemas for MediaTek SoCs to
mediatek.
I've renamed the ralink core driver to mtmips. I decided to call the core
mtmips as I've seen folks from MediaTek use the same name when they added
support for MT7621 pinctrl on U-Boot. Feel free to comment on this.
Arınç
RFC to v1:
- Address Rob and Krzysztof's reviews, add Rob's acked-by.
- More cleanups, hooray!
- Keep ralink,rt2880-pinmux deprecated.
- Deprecate ralink,mt7620-pinctrl. Another one bites the dust!
- More slight changes I can't currently remember to mention.
Arınç ÜNAL (20):
pinctrl: ralink: reintroduce ralink,rt2880-pinmux compatible string
pinctrl: ralink: {mt7620,mt7621}: add new mediatek compatible strings
pinctrl: ralink: rt305x: add new compatible string for every SoC
pinctrl: ralink: mt7620: split out to mt76x8
pinctrl: ralink: move to mediatek as mtmips
pinctrl: mediatek: remove OF_GPIO as reverse dependency
dt-bindings: pinctrl: ralink: improve bindings
dt-bindings: pinctrl: ralink: add new compatible strings
dt-bindings: pinctrl: ralink: {mt7620,mt7621}: rename to mediatek
dt-bindings: pinctrl: mediatek: mt6795: rename to mediatek,mt6795-pinctrl
dt-bindings: pinctrl: mediatek: mt8186: rename to mediatek,mt8186-pinctrl
dt-bindings: pinctrl: mediatek: mt8192: rename to mediatek,mt8192-pinctrl
dt-bindings: pinctrl: mediatek: mt8195: rename to mediatek,mt8195-pinctrl
dt-bindings: pinctrl: mediatek: fix naming inconsistency
dt-bindings: pinctrl: {mediatek,ralink}: fix formatting
dt-bindings: pinctrl: mediatek: drop quotes from referred schemas
dt-bindings: pinctrl: mediatek: mt7986: fix patternProperties regex
dt-bindings: pinctrl: ralink: rt305x: split binding
dt-bindings: pinctrl: mediatek: mt7620: split binding
MAINTAINERS: move ralink pinctrl to mediatek mips pinctrl
.../pinctrl/mediatek,mt65xx-pinctrl.yaml | 28 +-
.../pinctrl/mediatek,mt6779-pinctrl.yaml | 37 +-
...mt6795.yaml => mediatek,mt6795-pinctrl.yaml} | 39 +-
.../pinctrl/mediatek,mt7620-pinctrl.yaml | 298 ++++++++++++++
...inctrl.yaml => mediatek,mt7621-pinctrl.yaml} | 23 +-
.../pinctrl/mediatek,mt7622-pinctrl.yaml | 32 +-
...inctrl.yaml => mediatek,mt76x8-pinctrl.yaml} | 252 ++----------
.../pinctrl/mediatek,mt7981-pinctrl.yaml | 35 +-
.../pinctrl/mediatek,mt7986-pinctrl.yaml | 72 ++--
.../pinctrl/mediatek,mt8183-pinctrl.yaml | 30 +-
...mt8186.yaml => mediatek,mt8186-pinctrl.yaml} | 51 ++-
.../pinctrl/mediatek,mt8188-pinctrl.yaml | 76 ++--
...mt8192.yaml => mediatek,mt8192-pinctrl.yaml} | 53 +--
...mt8195.yaml => mediatek,mt8195-pinctrl.yaml} | 44 +--
.../pinctrl/mediatek,mt8365-pinctrl.yaml | 28 +-
.../bindings/pinctrl/ralink,rt2880-pinctrl.yaml | 11 +-
.../bindings/pinctrl/ralink,rt305x-pinctrl.yaml | 89 +----
.../bindings/pinctrl/ralink,rt3352-pinctrl.yaml | 243 ++++++++++++
.../bindings/pinctrl/ralink,rt3883-pinctrl.yaml | 11 +-
.../bindings/pinctrl/ralink,rt5350-pinctrl.yaml | 206 ++++++++++
MAINTAINERS | 29 +-
drivers/pinctrl/Kconfig | 1 -
drivers/pinctrl/Makefile | 1 -
drivers/pinctrl/mediatek/Kconfig | 54 ++-
drivers/pinctrl/mediatek/Makefile | 63 +--
drivers/pinctrl/mediatek/pinctrl-mt7620.c | 138 +++++++
.../{ralink => mediatek}/pinctrl-mt7621.c | 32 +-
drivers/pinctrl/mediatek/pinctrl-mt76x8.c | 283 ++++++++++++++
.../pinctrl-mtmips.c} | 90 ++---
.../pinctrl-mtmips.h} | 16 +-
.../{ralink => mediatek}/pinctrl-rt2880.c | 21 +-
.../{ralink => mediatek}/pinctrl-rt305x.c | 47 +--
.../{ralink => mediatek}/pinctrl-rt3883.c | 29 +-
drivers/pinctrl/ralink/Kconfig | 35 --
drivers/pinctrl/ralink/Makefile | 8 -
drivers/pinctrl/ralink/pinctrl-mt7620.c | 391 -------------------
36 files changed, 1723 insertions(+), 1173 deletions(-)
From: Arınç ÜNAL <[email protected]>
There have been stable releases with the ralink,rt2880-pinmux compatible
string included. Having it removed breaks the ABI. Reintroduce it.
Fixes: e5981cd46183 ("pinctrl: ralink: add new compatible strings for each pinctrl subdriver")
Signed-off-by: Arınç ÜNAL <[email protected]>
---
drivers/pinctrl/ralink/pinctrl-mt7620.c | 1 +
drivers/pinctrl/ralink/pinctrl-mt7621.c | 1 +
drivers/pinctrl/ralink/pinctrl-rt2880.c | 1 +
drivers/pinctrl/ralink/pinctrl-rt305x.c | 1 +
drivers/pinctrl/ralink/pinctrl-rt3883.c | 1 +
5 files changed, 5 insertions(+)
diff --git a/drivers/pinctrl/ralink/pinctrl-mt7620.c b/drivers/pinctrl/ralink/pinctrl-mt7620.c
index 4e8d26bb3430..06b86c726839 100644
--- a/drivers/pinctrl/ralink/pinctrl-mt7620.c
+++ b/drivers/pinctrl/ralink/pinctrl-mt7620.c
@@ -372,6 +372,7 @@ static int mt7620_pinctrl_probe(struct platform_device *pdev)
static const struct of_device_id mt7620_pinctrl_match[] = {
{ .compatible = "ralink,mt7620-pinctrl" },
+ { .compatible = "ralink,rt2880-pinmux" },
{}
};
MODULE_DEVICE_TABLE(of, mt7620_pinctrl_match);
diff --git a/drivers/pinctrl/ralink/pinctrl-mt7621.c b/drivers/pinctrl/ralink/pinctrl-mt7621.c
index eddc0ba6d468..fb5824922e78 100644
--- a/drivers/pinctrl/ralink/pinctrl-mt7621.c
+++ b/drivers/pinctrl/ralink/pinctrl-mt7621.c
@@ -97,6 +97,7 @@ static int mt7621_pinctrl_probe(struct platform_device *pdev)
static const struct of_device_id mt7621_pinctrl_match[] = {
{ .compatible = "ralink,mt7621-pinctrl" },
+ { .compatible = "ralink,rt2880-pinmux" },
{}
};
MODULE_DEVICE_TABLE(of, mt7621_pinctrl_match);
diff --git a/drivers/pinctrl/ralink/pinctrl-rt2880.c b/drivers/pinctrl/ralink/pinctrl-rt2880.c
index 3e2f1aaaf095..d7a65fcc7755 100644
--- a/drivers/pinctrl/ralink/pinctrl-rt2880.c
+++ b/drivers/pinctrl/ralink/pinctrl-rt2880.c
@@ -41,6 +41,7 @@ static int rt2880_pinctrl_probe(struct platform_device *pdev)
static const struct of_device_id rt2880_pinctrl_match[] = {
{ .compatible = "ralink,rt2880-pinctrl" },
+ { .compatible = "ralink,rt2880-pinmux" },
{}
};
MODULE_DEVICE_TABLE(of, rt2880_pinctrl_match);
diff --git a/drivers/pinctrl/ralink/pinctrl-rt305x.c b/drivers/pinctrl/ralink/pinctrl-rt305x.c
index bdaee5ce1ee0..f6092c64383e 100644
--- a/drivers/pinctrl/ralink/pinctrl-rt305x.c
+++ b/drivers/pinctrl/ralink/pinctrl-rt305x.c
@@ -118,6 +118,7 @@ static int rt305x_pinctrl_probe(struct platform_device *pdev)
static const struct of_device_id rt305x_pinctrl_match[] = {
{ .compatible = "ralink,rt305x-pinctrl" },
+ { .compatible = "ralink,rt2880-pinmux" },
{}
};
MODULE_DEVICE_TABLE(of, rt305x_pinctrl_match);
diff --git a/drivers/pinctrl/ralink/pinctrl-rt3883.c b/drivers/pinctrl/ralink/pinctrl-rt3883.c
index 392208662355..5f766d76bafa 100644
--- a/drivers/pinctrl/ralink/pinctrl-rt3883.c
+++ b/drivers/pinctrl/ralink/pinctrl-rt3883.c
@@ -88,6 +88,7 @@ static int rt3883_pinctrl_probe(struct platform_device *pdev)
static const struct of_device_id rt3883_pinctrl_match[] = {
{ .compatible = "ralink,rt3883-pinctrl" },
+ { .compatible = "ralink,rt2880-pinmux" },
{}
};
MODULE_DEVICE_TABLE(of, rt3883_pinctrl_match);
--
2.37.2
From: Arınç ÜNAL <[email protected]>
This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
introduced these SoCs which utilise this platform. Add new compatible
strings to address the incorrect naming.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
drivers/pinctrl/ralink/pinctrl-mt7620.c | 1 +
drivers/pinctrl/ralink/pinctrl-mt7621.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/pinctrl/ralink/pinctrl-mt7620.c b/drivers/pinctrl/ralink/pinctrl-mt7620.c
index 06b86c726839..88b0c6a4ee18 100644
--- a/drivers/pinctrl/ralink/pinctrl-mt7620.c
+++ b/drivers/pinctrl/ralink/pinctrl-mt7620.c
@@ -371,6 +371,7 @@ static int mt7620_pinctrl_probe(struct platform_device *pdev)
}
static const struct of_device_id mt7620_pinctrl_match[] = {
+ { .compatible = "mediatek,mt7620-pinctrl" },
{ .compatible = "ralink,mt7620-pinctrl" },
{ .compatible = "ralink,rt2880-pinmux" },
{}
diff --git a/drivers/pinctrl/ralink/pinctrl-mt7621.c b/drivers/pinctrl/ralink/pinctrl-mt7621.c
index fb5824922e78..2128a94f6d1b 100644
--- a/drivers/pinctrl/ralink/pinctrl-mt7621.c
+++ b/drivers/pinctrl/ralink/pinctrl-mt7621.c
@@ -96,6 +96,7 @@ static int mt7621_pinctrl_probe(struct platform_device *pdev)
}
static const struct of_device_id mt7621_pinctrl_match[] = {
+ { .compatible = "mediatek,mt7621-pinctrl" },
{ .compatible = "ralink,mt7621-pinctrl" },
{ .compatible = "ralink,rt2880-pinmux" },
{}
--
2.37.2
From: Arınç ÜNAL <[email protected]>
Add new compatible strings to make every SoC, or SoCs that use the same
pinmux data have a unique compatible string. This ensures that the pin
muxing information of every SoC, or a set of SoCs that use the same pinmux
data can be properly documented.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
drivers/pinctrl/ralink/pinctrl-rt305x.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/ralink/pinctrl-rt305x.c b/drivers/pinctrl/ralink/pinctrl-rt305x.c
index f6092c64383e..fa3743c7680f 100644
--- a/drivers/pinctrl/ralink/pinctrl-rt305x.c
+++ b/drivers/pinctrl/ralink/pinctrl-rt305x.c
@@ -118,6 +118,8 @@ static int rt305x_pinctrl_probe(struct platform_device *pdev)
static const struct of_device_id rt305x_pinctrl_match[] = {
{ .compatible = "ralink,rt305x-pinctrl" },
+ { .compatible = "ralink,rt3352-pinctrl" },
+ { .compatible = "ralink,rt5350-pinctrl" },
{ .compatible = "ralink,rt2880-pinmux" },
{}
};
--
2.37.2
From: Arınç ÜNAL <[email protected]>
Split the driver out to pinctrl-mt76x8.c. Remove including the unnecessary
headers since is_mt76x8() is not being used anymore.
Introduce a new compatible string to be able to document the pin muxing
information properly.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
drivers/pinctrl/ralink/Kconfig | 5 +
drivers/pinctrl/ralink/Makefile | 1 +
drivers/pinctrl/ralink/pinctrl-mt7620.c | 257 +--------------------
drivers/pinctrl/ralink/pinctrl-mt76x8.c | 283 ++++++++++++++++++++++++
4 files changed, 290 insertions(+), 256 deletions(-)
create mode 100644 drivers/pinctrl/ralink/pinctrl-mt76x8.c
diff --git a/drivers/pinctrl/ralink/Kconfig b/drivers/pinctrl/ralink/Kconfig
index 1e4c5e43d69b..c5fe4c31aaea 100644
--- a/drivers/pinctrl/ralink/Kconfig
+++ b/drivers/pinctrl/ralink/Kconfig
@@ -17,6 +17,11 @@ config PINCTRL_MT7621
depends on RALINK && SOC_MT7621
select PINCTRL_RALINK
+config PINCTRL_MT76X8
+ bool "MT76X8 pinctrl subdriver"
+ depends on RALINK && SOC_MT7620
+ select PINCTRL_RALINK
+
config PINCTRL_RT2880
bool "RT2880 pinctrl subdriver"
depends on RALINK && SOC_RT288X
diff --git a/drivers/pinctrl/ralink/Makefile b/drivers/pinctrl/ralink/Makefile
index 0ebbe552526d..be9acf2e27fd 100644
--- a/drivers/pinctrl/ralink/Makefile
+++ b/drivers/pinctrl/ralink/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_PINCTRL_RALINK) += pinctrl-ralink.o
obj-$(CONFIG_PINCTRL_MT7620) += pinctrl-mt7620.o
obj-$(CONFIG_PINCTRL_MT7621) += pinctrl-mt7621.o
+obj-$(CONFIG_PINCTRL_MT76X8) += pinctrl-mt76x8.o
obj-$(CONFIG_PINCTRL_RT2880) += pinctrl-rt2880.o
obj-$(CONFIG_PINCTRL_RT305X) += pinctrl-rt305x.o
obj-$(CONFIG_PINCTRL_RT3883) += pinctrl-rt3883.o
diff --git a/drivers/pinctrl/ralink/pinctrl-mt7620.c b/drivers/pinctrl/ralink/pinctrl-mt7620.c
index 88b0c6a4ee18..b2245fd65c72 100644
--- a/drivers/pinctrl/ralink/pinctrl-mt7620.c
+++ b/drivers/pinctrl/ralink/pinctrl-mt7620.c
@@ -1,7 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
-#include <asm/mach-ralink/ralink_regs.h>
-#include <asm/mach-ralink/mt7620.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
@@ -112,262 +110,9 @@ static struct ralink_pmx_group mt7620a_pinmux_data[] = {
{ 0 }
};
-static struct ralink_pmx_func pwm1_grp_mt76x8[] = {
- FUNC("sdxc d6", 3, 19, 1),
- FUNC("utif", 2, 19, 1),
- FUNC("gpio", 1, 19, 1),
- FUNC("pwm1", 0, 19, 1),
-};
-
-static struct ralink_pmx_func pwm0_grp_mt76x8[] = {
- FUNC("sdxc d7", 3, 18, 1),
- FUNC("utif", 2, 18, 1),
- FUNC("gpio", 1, 18, 1),
- FUNC("pwm0", 0, 18, 1),
-};
-
-static struct ralink_pmx_func uart2_grp_mt76x8[] = {
- FUNC("sdxc d5 d4", 3, 20, 2),
- FUNC("pwm", 2, 20, 2),
- FUNC("gpio", 1, 20, 2),
- FUNC("uart2", 0, 20, 2),
-};
-
-static struct ralink_pmx_func uart1_grp_mt76x8[] = {
- FUNC("sw_r", 3, 45, 2),
- FUNC("pwm", 2, 45, 2),
- FUNC("gpio", 1, 45, 2),
- FUNC("uart1", 0, 45, 2),
-};
-
-static struct ralink_pmx_func i2c_grp_mt76x8[] = {
- FUNC("-", 3, 4, 2),
- FUNC("debug", 2, 4, 2),
- FUNC("gpio", 1, 4, 2),
- FUNC("i2c", 0, 4, 2),
-};
-
-static struct ralink_pmx_func refclk_grp_mt76x8[] = { FUNC("refclk", 0, 37, 1) };
-static struct ralink_pmx_func perst_grp_mt76x8[] = { FUNC("perst", 0, 36, 1) };
-static struct ralink_pmx_func wdt_grp_mt76x8[] = { FUNC("wdt", 0, 38, 1) };
-static struct ralink_pmx_func spi_grp_mt76x8[] = { FUNC("spi", 0, 7, 4) };
-
-static struct ralink_pmx_func sd_mode_grp_mt76x8[] = {
- FUNC("jtag", 3, 22, 8),
- FUNC("utif", 2, 22, 8),
- FUNC("gpio", 1, 22, 8),
- FUNC("sdxc", 0, 22, 8),
-};
-
-static struct ralink_pmx_func uart0_grp_mt76x8[] = {
- FUNC("-", 3, 12, 2),
- FUNC("-", 2, 12, 2),
- FUNC("gpio", 1, 12, 2),
- FUNC("uart0", 0, 12, 2),
-};
-
-static struct ralink_pmx_func i2s_grp_mt76x8[] = {
- FUNC("antenna", 3, 0, 4),
- FUNC("pcm", 2, 0, 4),
- FUNC("gpio", 1, 0, 4),
- FUNC("i2s", 0, 0, 4),
-};
-
-static struct ralink_pmx_func spi_cs1_grp_mt76x8[] = {
- FUNC("-", 3, 6, 1),
- FUNC("refclk", 2, 6, 1),
- FUNC("gpio", 1, 6, 1),
- FUNC("spi cs1", 0, 6, 1),
-};
-
-static struct ralink_pmx_func spis_grp_mt76x8[] = {
- FUNC("pwm_uart2", 3, 14, 4),
- FUNC("utif", 2, 14, 4),
- FUNC("gpio", 1, 14, 4),
- FUNC("spis", 0, 14, 4),
-};
-
-static struct ralink_pmx_func gpio_grp_mt76x8[] = {
- FUNC("pcie", 3, 11, 1),
- FUNC("refclk", 2, 11, 1),
- FUNC("gpio", 1, 11, 1),
- FUNC("gpio", 0, 11, 1),
-};
-
-static struct ralink_pmx_func p4led_kn_grp_mt76x8[] = {
- FUNC("jtag", 3, 30, 1),
- FUNC("utif", 2, 30, 1),
- FUNC("gpio", 1, 30, 1),
- FUNC("p4led_kn", 0, 30, 1),
-};
-
-static struct ralink_pmx_func p3led_kn_grp_mt76x8[] = {
- FUNC("jtag", 3, 31, 1),
- FUNC("utif", 2, 31, 1),
- FUNC("gpio", 1, 31, 1),
- FUNC("p3led_kn", 0, 31, 1),
-};
-
-static struct ralink_pmx_func p2led_kn_grp_mt76x8[] = {
- FUNC("jtag", 3, 32, 1),
- FUNC("utif", 2, 32, 1),
- FUNC("gpio", 1, 32, 1),
- FUNC("p2led_kn", 0, 32, 1),
-};
-
-static struct ralink_pmx_func p1led_kn_grp_mt76x8[] = {
- FUNC("jtag", 3, 33, 1),
- FUNC("utif", 2, 33, 1),
- FUNC("gpio", 1, 33, 1),
- FUNC("p1led_kn", 0, 33, 1),
-};
-
-static struct ralink_pmx_func p0led_kn_grp_mt76x8[] = {
- FUNC("jtag", 3, 34, 1),
- FUNC("rsvd", 2, 34, 1),
- FUNC("gpio", 1, 34, 1),
- FUNC("p0led_kn", 0, 34, 1),
-};
-
-static struct ralink_pmx_func wled_kn_grp_mt76x8[] = {
- FUNC("rsvd", 3, 35, 1),
- FUNC("rsvd", 2, 35, 1),
- FUNC("gpio", 1, 35, 1),
- FUNC("wled_kn", 0, 35, 1),
-};
-
-static struct ralink_pmx_func p4led_an_grp_mt76x8[] = {
- FUNC("jtag", 3, 39, 1),
- FUNC("utif", 2, 39, 1),
- FUNC("gpio", 1, 39, 1),
- FUNC("p4led_an", 0, 39, 1),
-};
-
-static struct ralink_pmx_func p3led_an_grp_mt76x8[] = {
- FUNC("jtag", 3, 40, 1),
- FUNC("utif", 2, 40, 1),
- FUNC("gpio", 1, 40, 1),
- FUNC("p3led_an", 0, 40, 1),
-};
-
-static struct ralink_pmx_func p2led_an_grp_mt76x8[] = {
- FUNC("jtag", 3, 41, 1),
- FUNC("utif", 2, 41, 1),
- FUNC("gpio", 1, 41, 1),
- FUNC("p2led_an", 0, 41, 1),
-};
-
-static struct ralink_pmx_func p1led_an_grp_mt76x8[] = {
- FUNC("jtag", 3, 42, 1),
- FUNC("utif", 2, 42, 1),
- FUNC("gpio", 1, 42, 1),
- FUNC("p1led_an", 0, 42, 1),
-};
-
-static struct ralink_pmx_func p0led_an_grp_mt76x8[] = {
- FUNC("jtag", 3, 43, 1),
- FUNC("rsvd", 2, 43, 1),
- FUNC("gpio", 1, 43, 1),
- FUNC("p0led_an", 0, 43, 1),
-};
-
-static struct ralink_pmx_func wled_an_grp_mt76x8[] = {
- FUNC("rsvd", 3, 44, 1),
- FUNC("rsvd", 2, 44, 1),
- FUNC("gpio", 1, 44, 1),
- FUNC("wled_an", 0, 44, 1),
-};
-
-#define MT76X8_GPIO_MODE_MASK 0x3
-
-#define MT76X8_GPIO_MODE_P4LED_KN 58
-#define MT76X8_GPIO_MODE_P3LED_KN 56
-#define MT76X8_GPIO_MODE_P2LED_KN 54
-#define MT76X8_GPIO_MODE_P1LED_KN 52
-#define MT76X8_GPIO_MODE_P0LED_KN 50
-#define MT76X8_GPIO_MODE_WLED_KN 48
-#define MT76X8_GPIO_MODE_P4LED_AN 42
-#define MT76X8_GPIO_MODE_P3LED_AN 40
-#define MT76X8_GPIO_MODE_P2LED_AN 38
-#define MT76X8_GPIO_MODE_P1LED_AN 36
-#define MT76X8_GPIO_MODE_P0LED_AN 34
-#define MT76X8_GPIO_MODE_WLED_AN 32
-#define MT76X8_GPIO_MODE_PWM1 30
-#define MT76X8_GPIO_MODE_PWM0 28
-#define MT76X8_GPIO_MODE_UART2 26
-#define MT76X8_GPIO_MODE_UART1 24
-#define MT76X8_GPIO_MODE_I2C 20
-#define MT76X8_GPIO_MODE_REFCLK 18
-#define MT76X8_GPIO_MODE_PERST 16
-#define MT76X8_GPIO_MODE_WDT 14
-#define MT76X8_GPIO_MODE_SPI 12
-#define MT76X8_GPIO_MODE_SDMODE 10
-#define MT76X8_GPIO_MODE_UART0 8
-#define MT76X8_GPIO_MODE_I2S 6
-#define MT76X8_GPIO_MODE_CS1 4
-#define MT76X8_GPIO_MODE_SPIS 2
-#define MT76X8_GPIO_MODE_GPIO 0
-
-static struct ralink_pmx_group mt76x8_pinmux_data[] = {
- GRP_G("pwm1", pwm1_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_PWM1),
- GRP_G("pwm0", pwm0_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_PWM0),
- GRP_G("uart2", uart2_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_UART2),
- GRP_G("uart1", uart1_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_UART1),
- GRP_G("i2c", i2c_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_I2C),
- GRP("refclk", refclk_grp_mt76x8, 1, MT76X8_GPIO_MODE_REFCLK),
- GRP("perst", perst_grp_mt76x8, 1, MT76X8_GPIO_MODE_PERST),
- GRP("wdt", wdt_grp_mt76x8, 1, MT76X8_GPIO_MODE_WDT),
- GRP("spi", spi_grp_mt76x8, 1, MT76X8_GPIO_MODE_SPI),
- GRP_G("sdmode", sd_mode_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_SDMODE),
- GRP_G("uart0", uart0_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_UART0),
- GRP_G("i2s", i2s_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_I2S),
- GRP_G("spi cs1", spi_cs1_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_CS1),
- GRP_G("spis", spis_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_SPIS),
- GRP_G("gpio", gpio_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_GPIO),
- GRP_G("wled_an", wled_an_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_WLED_AN),
- GRP_G("p0led_an", p0led_an_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_P0LED_AN),
- GRP_G("p1led_an", p1led_an_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_P1LED_AN),
- GRP_G("p2led_an", p2led_an_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_P2LED_AN),
- GRP_G("p3led_an", p3led_an_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_P3LED_AN),
- GRP_G("p4led_an", p4led_an_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_P4LED_AN),
- GRP_G("wled_kn", wled_kn_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_WLED_KN),
- GRP_G("p0led_kn", p0led_kn_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_P0LED_KN),
- GRP_G("p1led_kn", p1led_kn_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_P1LED_KN),
- GRP_G("p2led_kn", p2led_kn_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_P2LED_KN),
- GRP_G("p3led_kn", p3led_kn_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_P3LED_KN),
- GRP_G("p4led_kn", p4led_kn_grp_mt76x8, MT76X8_GPIO_MODE_MASK,
- 1, MT76X8_GPIO_MODE_P4LED_KN),
- { 0 }
-};
-
static int mt7620_pinctrl_probe(struct platform_device *pdev)
{
- if (is_mt76x8())
- return ralink_pinctrl_init(pdev, mt76x8_pinmux_data);
- else
- return ralink_pinctrl_init(pdev, mt7620a_pinmux_data);
+ return ralink_pinctrl_init(pdev, mt7620a_pinmux_data);
}
static const struct of_device_id mt7620_pinctrl_match[] = {
diff --git a/drivers/pinctrl/ralink/pinctrl-mt76x8.c b/drivers/pinctrl/ralink/pinctrl-mt76x8.c
new file mode 100644
index 000000000000..5a6a82a58180
--- /dev/null
+++ b/drivers/pinctrl/ralink/pinctrl-mt76x8.c
@@ -0,0 +1,283 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include "pinctrl-ralink.h"
+
+#define MT76X8_GPIO_MODE_MASK 0x3
+
+#define MT76X8_GPIO_MODE_P4LED_KN 58
+#define MT76X8_GPIO_MODE_P3LED_KN 56
+#define MT76X8_GPIO_MODE_P2LED_KN 54
+#define MT76X8_GPIO_MODE_P1LED_KN 52
+#define MT76X8_GPIO_MODE_P0LED_KN 50
+#define MT76X8_GPIO_MODE_WLED_KN 48
+#define MT76X8_GPIO_MODE_P4LED_AN 42
+#define MT76X8_GPIO_MODE_P3LED_AN 40
+#define MT76X8_GPIO_MODE_P2LED_AN 38
+#define MT76X8_GPIO_MODE_P1LED_AN 36
+#define MT76X8_GPIO_MODE_P0LED_AN 34
+#define MT76X8_GPIO_MODE_WLED_AN 32
+#define MT76X8_GPIO_MODE_PWM1 30
+#define MT76X8_GPIO_MODE_PWM0 28
+#define MT76X8_GPIO_MODE_UART2 26
+#define MT76X8_GPIO_MODE_UART1 24
+#define MT76X8_GPIO_MODE_I2C 20
+#define MT76X8_GPIO_MODE_REFCLK 18
+#define MT76X8_GPIO_MODE_PERST 16
+#define MT76X8_GPIO_MODE_WDT 14
+#define MT76X8_GPIO_MODE_SPI 12
+#define MT76X8_GPIO_MODE_SDMODE 10
+#define MT76X8_GPIO_MODE_UART0 8
+#define MT76X8_GPIO_MODE_I2S 6
+#define MT76X8_GPIO_MODE_CS1 4
+#define MT76X8_GPIO_MODE_SPIS 2
+#define MT76X8_GPIO_MODE_GPIO 0
+
+static struct ralink_pmx_func pwm1_grp[] = {
+ FUNC("sdxc d6", 3, 19, 1),
+ FUNC("utif", 2, 19, 1),
+ FUNC("gpio", 1, 19, 1),
+ FUNC("pwm1", 0, 19, 1),
+};
+
+static struct ralink_pmx_func pwm0_grp[] = {
+ FUNC("sdxc d7", 3, 18, 1),
+ FUNC("utif", 2, 18, 1),
+ FUNC("gpio", 1, 18, 1),
+ FUNC("pwm0", 0, 18, 1),
+};
+
+static struct ralink_pmx_func uart2_grp[] = {
+ FUNC("sdxc d5 d4", 3, 20, 2),
+ FUNC("pwm", 2, 20, 2),
+ FUNC("gpio", 1, 20, 2),
+ FUNC("uart2", 0, 20, 2),
+};
+
+static struct ralink_pmx_func uart1_grp[] = {
+ FUNC("sw_r", 3, 45, 2),
+ FUNC("pwm", 2, 45, 2),
+ FUNC("gpio", 1, 45, 2),
+ FUNC("uart1", 0, 45, 2),
+};
+
+static struct ralink_pmx_func i2c_grp[] = {
+ FUNC("-", 3, 4, 2),
+ FUNC("debug", 2, 4, 2),
+ FUNC("gpio", 1, 4, 2),
+ FUNC("i2c", 0, 4, 2),
+};
+
+static struct ralink_pmx_func refclk_grp[] = { FUNC("refclk", 0, 37, 1) };
+static struct ralink_pmx_func perst_grp[] = { FUNC("perst", 0, 36, 1) };
+static struct ralink_pmx_func wdt_grp[] = { FUNC("wdt", 0, 38, 1) };
+static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 7, 4) };
+
+static struct ralink_pmx_func sd_mode_grp[] = {
+ FUNC("jtag", 3, 22, 8),
+ FUNC("utif", 2, 22, 8),
+ FUNC("gpio", 1, 22, 8),
+ FUNC("sdxc", 0, 22, 8),
+};
+
+static struct ralink_pmx_func uart0_grp[] = {
+ FUNC("-", 3, 12, 2),
+ FUNC("-", 2, 12, 2),
+ FUNC("gpio", 1, 12, 2),
+ FUNC("uart0", 0, 12, 2),
+};
+
+static struct ralink_pmx_func i2s_grp[] = {
+ FUNC("antenna", 3, 0, 4),
+ FUNC("pcm", 2, 0, 4),
+ FUNC("gpio", 1, 0, 4),
+ FUNC("i2s", 0, 0, 4),
+};
+
+static struct ralink_pmx_func spi_cs1_grp[] = {
+ FUNC("-", 3, 6, 1),
+ FUNC("refclk", 2, 6, 1),
+ FUNC("gpio", 1, 6, 1),
+ FUNC("spi cs1", 0, 6, 1),
+};
+
+static struct ralink_pmx_func spis_grp[] = {
+ FUNC("pwm_uart2", 3, 14, 4),
+ FUNC("utif", 2, 14, 4),
+ FUNC("gpio", 1, 14, 4),
+ FUNC("spis", 0, 14, 4),
+};
+
+static struct ralink_pmx_func gpio_grp[] = {
+ FUNC("pcie", 3, 11, 1),
+ FUNC("refclk", 2, 11, 1),
+ FUNC("gpio", 1, 11, 1),
+ FUNC("gpio", 0, 11, 1),
+};
+
+static struct ralink_pmx_func p4led_kn_grp[] = {
+ FUNC("jtag", 3, 30, 1),
+ FUNC("utif", 2, 30, 1),
+ FUNC("gpio", 1, 30, 1),
+ FUNC("p4led_kn", 0, 30, 1),
+};
+
+static struct ralink_pmx_func p3led_kn_grp[] = {
+ FUNC("jtag", 3, 31, 1),
+ FUNC("utif", 2, 31, 1),
+ FUNC("gpio", 1, 31, 1),
+ FUNC("p3led_kn", 0, 31, 1),
+};
+
+static struct ralink_pmx_func p2led_kn_grp[] = {
+ FUNC("jtag", 3, 32, 1),
+ FUNC("utif", 2, 32, 1),
+ FUNC("gpio", 1, 32, 1),
+ FUNC("p2led_kn", 0, 32, 1),
+};
+
+static struct ralink_pmx_func p1led_kn_grp[] = {
+ FUNC("jtag", 3, 33, 1),
+ FUNC("utif", 2, 33, 1),
+ FUNC("gpio", 1, 33, 1),
+ FUNC("p1led_kn", 0, 33, 1),
+};
+
+static struct ralink_pmx_func p0led_kn_grp[] = {
+ FUNC("jtag", 3, 34, 1),
+ FUNC("rsvd", 2, 34, 1),
+ FUNC("gpio", 1, 34, 1),
+ FUNC("p0led_kn", 0, 34, 1),
+};
+
+static struct ralink_pmx_func wled_kn_grp[] = {
+ FUNC("rsvd", 3, 35, 1),
+ FUNC("rsvd", 2, 35, 1),
+ FUNC("gpio", 1, 35, 1),
+ FUNC("wled_kn", 0, 35, 1),
+};
+
+static struct ralink_pmx_func p4led_an_grp[] = {
+ FUNC("jtag", 3, 39, 1),
+ FUNC("utif", 2, 39, 1),
+ FUNC("gpio", 1, 39, 1),
+ FUNC("p4led_an", 0, 39, 1),
+};
+
+static struct ralink_pmx_func p3led_an_grp[] = {
+ FUNC("jtag", 3, 40, 1),
+ FUNC("utif", 2, 40, 1),
+ FUNC("gpio", 1, 40, 1),
+ FUNC("p3led_an", 0, 40, 1),
+};
+
+static struct ralink_pmx_func p2led_an_grp[] = {
+ FUNC("jtag", 3, 41, 1),
+ FUNC("utif", 2, 41, 1),
+ FUNC("gpio", 1, 41, 1),
+ FUNC("p2led_an", 0, 41, 1),
+};
+
+static struct ralink_pmx_func p1led_an_grp[] = {
+ FUNC("jtag", 3, 42, 1),
+ FUNC("utif", 2, 42, 1),
+ FUNC("gpio", 1, 42, 1),
+ FUNC("p1led_an", 0, 42, 1),
+};
+
+static struct ralink_pmx_func p0led_an_grp[] = {
+ FUNC("jtag", 3, 43, 1),
+ FUNC("rsvd", 2, 43, 1),
+ FUNC("gpio", 1, 43, 1),
+ FUNC("p0led_an", 0, 43, 1),
+};
+
+static struct ralink_pmx_func wled_an_grp[] = {
+ FUNC("rsvd", 3, 44, 1),
+ FUNC("rsvd", 2, 44, 1),
+ FUNC("gpio", 1, 44, 1),
+ FUNC("wled_an", 0, 44, 1),
+};
+
+static struct ralink_pmx_group mt76x8_pinmux_data[] = {
+ GRP_G("pwm1", pwm1_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_PWM1),
+ GRP_G("pwm0", pwm0_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_PWM0),
+ GRP_G("uart2", uart2_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_UART2),
+ GRP_G("uart1", uart1_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_UART1),
+ GRP_G("i2c", i2c_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_I2C),
+ GRP("refclk", refclk_grp, 1, MT76X8_GPIO_MODE_REFCLK),
+ GRP("perst", perst_grp, 1, MT76X8_GPIO_MODE_PERST),
+ GRP("wdt", wdt_grp, 1, MT76X8_GPIO_MODE_WDT),
+ GRP("spi", spi_grp, 1, MT76X8_GPIO_MODE_SPI),
+ GRP_G("sdmode", sd_mode_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_SDMODE),
+ GRP_G("uart0", uart0_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_UART0),
+ GRP_G("i2s", i2s_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_I2S),
+ GRP_G("spi cs1", spi_cs1_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_CS1),
+ GRP_G("spis", spis_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_SPIS),
+ GRP_G("gpio", gpio_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_GPIO),
+ GRP_G("wled_an", wled_an_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_WLED_AN),
+ GRP_G("p0led_an", p0led_an_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_P0LED_AN),
+ GRP_G("p1led_an", p1led_an_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_P1LED_AN),
+ GRP_G("p2led_an", p2led_an_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_P2LED_AN),
+ GRP_G("p3led_an", p3led_an_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_P3LED_AN),
+ GRP_G("p4led_an", p4led_an_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_P4LED_AN),
+ GRP_G("wled_kn", wled_kn_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_WLED_KN),
+ GRP_G("p0led_kn", p0led_kn_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_P0LED_KN),
+ GRP_G("p1led_kn", p1led_kn_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_P1LED_KN),
+ GRP_G("p2led_kn", p2led_kn_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_P2LED_KN),
+ GRP_G("p3led_kn", p3led_kn_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_P3LED_KN),
+ GRP_G("p4led_kn", p4led_kn_grp, MT76X8_GPIO_MODE_MASK,
+ 1, MT76X8_GPIO_MODE_P4LED_KN),
+ { 0 }
+};
+
+static int mt76x8_pinctrl_probe(struct platform_device *pdev)
+{
+ return ralink_pinctrl_init(pdev, mt76x8_pinmux_data);
+}
+
+static const struct of_device_id mt76x8_pinctrl_match[] = {
+ { .compatible = "mediatek,mt76x8-pinctrl" },
+ { .compatible = "ralink,mt7620-pinctrl" },
+ { .compatible = "ralink,rt2880-pinmux" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mt76x8_pinctrl_match);
+
+static struct platform_driver mt76x8_pinctrl_driver = {
+ .probe = mt76x8_pinctrl_probe,
+ .driver = {
+ .name = "mt76x8-pinctrl",
+ .of_match_table = mt76x8_pinctrl_match,
+ },
+};
+
+static int __init mt76x8_pinctrl_init(void)
+{
+ return platform_driver_register(&mt76x8_pinctrl_driver);
+}
+core_initcall_sync(mt76x8_pinctrl_init);
--
2.37.2
From: Arınç ÜNAL <[email protected]>
The OF_GPIO option is enabled by default when GPIOLIB is enabled, and
cannot be disabled. Remove it as a reverse dependency where GPIOLIB is also
set as a reverse dependency.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
drivers/pinctrl/mediatek/Kconfig | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
index 2eeb55010563..7af287252834 100644
--- a/drivers/pinctrl/mediatek/Kconfig
+++ b/drivers/pinctrl/mediatek/Kconfig
@@ -17,7 +17,6 @@ config PINCTRL_MTK
select GENERIC_PINCONF
select GPIOLIB
select EINT_MTK
- select OF_GPIO
config PINCTRL_MTK_V2
tristate
@@ -35,7 +34,6 @@ config PINCTRL_MTK_MOORE
select GENERIC_PINCTRL_GROUPS
select GENERIC_PINMUX_FUNCTIONS
select GPIOLIB
- select OF_GPIO
select EINT_MTK
select PINCTRL_MTK_V2
@@ -46,7 +44,6 @@ config PINCTRL_MTK_PARIS
select GENERIC_PINCONF
select GPIOLIB
select EINT_MTK
- select OF_GPIO
select PINCTRL_MTK_V2
# For MIPS SoCs
--
2.37.2
From: Arınç ÜNAL <[email protected]>
This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
introduced new SoCs which utilise this platform. Move the driver to
mediatek pinctrl directory. Rename the ralink core driver to mtmips.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
drivers/pinctrl/Kconfig | 1 -
drivers/pinctrl/Makefile | 1 -
drivers/pinctrl/mediatek/Kconfig | 51 ++++++++++-
drivers/pinctrl/mediatek/Makefile | 63 +++++++------
.../{ralink => mediatek}/pinctrl-mt7620.c | 34 +++----
.../{ralink => mediatek}/pinctrl-mt7621.c | 30 +++----
.../{ralink => mediatek}/pinctrl-mt76x8.c | 60 ++++++-------
.../pinctrl-mtmips.c} | 90 +++++++++----------
.../pinctrl-mtmips.h} | 16 ++--
.../{ralink => mediatek}/pinctrl-rt2880.c | 20 ++---
.../{ralink => mediatek}/pinctrl-rt305x.c | 44 ++++-----
.../{ralink => mediatek}/pinctrl-rt3883.c | 28 +++---
drivers/pinctrl/ralink/Kconfig | 40 ---------
drivers/pinctrl/ralink/Makefile | 9 --
14 files changed, 246 insertions(+), 241 deletions(-)
rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7620.c (81%)
rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7621.c (80%)
rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt76x8.c (81%)
rename drivers/pinctrl/{ralink/pinctrl-ralink.c => mediatek/pinctrl-mtmips.c} (74%)
rename drivers/pinctrl/{ralink/pinctrl-ralink.h => mediatek/pinctrl-mtmips.h} (75%)
rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt2880.c (71%)
rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt305x.c (75%)
rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt3883.c (80%)
delete mode 100644 drivers/pinctrl/ralink/Kconfig
delete mode 100644 drivers/pinctrl/ralink/Makefile
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index dcb53c4a9584..8a6012770640 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -537,7 +537,6 @@ source "drivers/pinctrl/nomadik/Kconfig"
source "drivers/pinctrl/nuvoton/Kconfig"
source "drivers/pinctrl/pxa/Kconfig"
source "drivers/pinctrl/qcom/Kconfig"
-source "drivers/pinctrl/ralink/Kconfig"
source "drivers/pinctrl/renesas/Kconfig"
source "drivers/pinctrl/samsung/Kconfig"
source "drivers/pinctrl/spear/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index d5939840bb2a..ada6ed1d4e91 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -66,7 +66,6 @@ obj-y += nomadik/
obj-y += nuvoton/
obj-$(CONFIG_PINCTRL_PXA) += pxa/
obj-$(CONFIG_ARCH_QCOM) += qcom/
-obj-$(CONFIG_PINCTRL_RALINK) += ralink/
obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
obj-$(CONFIG_PINCTRL_SPEAR) += spear/
diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
index a71874fed3d6..2eeb55010563 100644
--- a/drivers/pinctrl/mediatek/Kconfig
+++ b/drivers/pinctrl/mediatek/Kconfig
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only
menu "MediaTek pinctrl drivers"
- depends on ARCH_MEDIATEK || COMPILE_TEST
+ depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST
config EINT_MTK
tristate "MediaTek External Interrupt Support"
@@ -22,6 +22,12 @@ config PINCTRL_MTK
config PINCTRL_MTK_V2
tristate
+config PINCTRL_MTK_MTMIPS
+ bool
+ depends on RALINK
+ select PINMUX
+ select GENERIC_PINCONF
+
config PINCTRL_MTK_MOORE
bool
depends on OF
@@ -43,6 +49,49 @@ config PINCTRL_MTK_PARIS
select OF_GPIO
select PINCTRL_MTK_V2
+# For MIPS SoCs
+config PINCTRL_MT7620
+ bool "MediaTek MT7620 pin control"
+ depends on SOC_MT7620 || COMPILE_TEST
+ depends on RALINK
+ default SOC_MT7620
+ select PINCTRL_MTK_MTMIPS
+
+config PINCTRL_MT7621
+ bool "MediaTek MT7621 pin control"
+ depends on SOC_MT7621 || COMPILE_TEST
+ depends on RALINK
+ default SOC_MT7621
+ select PINCTRL_MTK_MTMIPS
+
+config PINCTRL_MT76X8
+ bool "MediaTek MT76X8 pin control"
+ depends on SOC_MT7620 || COMPILE_TEST
+ depends on RALINK
+ default SOC_MT7620
+ select PINCTRL_MTK_MTMIPS
+
+config PINCTRL_RT2880
+ bool "Ralink RT2880 pin control"
+ depends on SOC_RT288X || COMPILE_TEST
+ depends on RALINK
+ default SOC_RT288X
+ select PINCTRL_MTK_MTMIPS
+
+config PINCTRL_RT305X
+ bool "Ralink RT305X pin control"
+ depends on SOC_RT305X || COMPILE_TEST
+ depends on RALINK
+ default SOC_RT305X
+ select PINCTRL_MTK_MTMIPS
+
+config PINCTRL_RT3883
+ bool "Ralink RT3883 pin control"
+ depends on SOC_RT3883 || COMPILE_TEST
+ depends on RALINK
+ default SOC_RT3883
+ select PINCTRL_MTK_MTMIPS
+
# For ARMv7 SoCs
config PINCTRL_MT2701
bool "MediaTek MT2701 pin control"
diff --git a/drivers/pinctrl/mediatek/Makefile b/drivers/pinctrl/mediatek/Makefile
index 44d197af516a..680f7e8526e0 100644
--- a/drivers/pinctrl/mediatek/Makefile
+++ b/drivers/pinctrl/mediatek/Makefile
@@ -1,32 +1,39 @@
# SPDX-License-Identifier: GPL-2.0
# Core
-obj-$(CONFIG_EINT_MTK) += mtk-eint.o
-obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o
-obj-$(CONFIG_PINCTRL_MTK_V2) += pinctrl-mtk-common-v2.o
-obj-$(CONFIG_PINCTRL_MTK_MOORE) += pinctrl-moore.o
-obj-$(CONFIG_PINCTRL_MTK_PARIS) += pinctrl-paris.o
+obj-$(CONFIG_EINT_MTK) += mtk-eint.o
+obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o
+obj-$(CONFIG_PINCTRL_MTK_V2) += pinctrl-mtk-common-v2.o
+obj-$(CONFIG_PINCTRL_MTK_MTMIPS) += pinctrl-mtmips.o
+obj-$(CONFIG_PINCTRL_MTK_MOORE) += pinctrl-moore.o
+obj-$(CONFIG_PINCTRL_MTK_PARIS) += pinctrl-paris.o
# SoC Drivers
-obj-$(CONFIG_PINCTRL_MT2701) += pinctrl-mt2701.o
-obj-$(CONFIG_PINCTRL_MT2712) += pinctrl-mt2712.o
-obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o
-obj-$(CONFIG_PINCTRL_MT8127) += pinctrl-mt8127.o
-obj-$(CONFIG_PINCTRL_MT6765) += pinctrl-mt6765.o
-obj-$(CONFIG_PINCTRL_MT6779) += pinctrl-mt6779.o
-obj-$(CONFIG_PINCTRL_MT6795) += pinctrl-mt6795.o
-obj-$(CONFIG_PINCTRL_MT6797) += pinctrl-mt6797.o
-obj-$(CONFIG_PINCTRL_MT7622) += pinctrl-mt7622.o
-obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o
-obj-$(CONFIG_PINCTRL_MT7629) += pinctrl-mt7629.o
-obj-$(CONFIG_PINCTRL_MT7981) += pinctrl-mt7981.o
-obj-$(CONFIG_PINCTRL_MT7986) += pinctrl-mt7986.o
-obj-$(CONFIG_PINCTRL_MT8167) += pinctrl-mt8167.o
-obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o
-obj-$(CONFIG_PINCTRL_MT8183) += pinctrl-mt8183.o
-obj-$(CONFIG_PINCTRL_MT8186) += pinctrl-mt8186.o
-obj-$(CONFIG_PINCTRL_MT8188) += pinctrl-mt8188.o
-obj-$(CONFIG_PINCTRL_MT8192) += pinctrl-mt8192.o
-obj-$(CONFIG_PINCTRL_MT8195) += pinctrl-mt8195.o
-obj-$(CONFIG_PINCTRL_MT8365) += pinctrl-mt8365.o
-obj-$(CONFIG_PINCTRL_MT8516) += pinctrl-mt8516.o
-obj-$(CONFIG_PINCTRL_MT6397) += pinctrl-mt6397.o
+obj-$(CONFIG_PINCTRL_MT7620) += pinctrl-mt7620.o
+obj-$(CONFIG_PINCTRL_MT7621) += pinctrl-mt7621.o
+obj-$(CONFIG_PINCTRL_MT76X8) += pinctrl-mt76x8.o
+obj-$(CONFIG_PINCTRL_RT2880) += pinctrl-rt2880.o
+obj-$(CONFIG_PINCTRL_RT305X) += pinctrl-rt305x.o
+obj-$(CONFIG_PINCTRL_RT3883) += pinctrl-rt3883.o
+obj-$(CONFIG_PINCTRL_MT2701) += pinctrl-mt2701.o
+obj-$(CONFIG_PINCTRL_MT2712) += pinctrl-mt2712.o
+obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o
+obj-$(CONFIG_PINCTRL_MT8127) += pinctrl-mt8127.o
+obj-$(CONFIG_PINCTRL_MT6765) += pinctrl-mt6765.o
+obj-$(CONFIG_PINCTRL_MT6779) += pinctrl-mt6779.o
+obj-$(CONFIG_PINCTRL_MT6795) += pinctrl-mt6795.o
+obj-$(CONFIG_PINCTRL_MT6797) += pinctrl-mt6797.o
+obj-$(CONFIG_PINCTRL_MT7622) += pinctrl-mt7622.o
+obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o
+obj-$(CONFIG_PINCTRL_MT7629) += pinctrl-mt7629.o
+obj-$(CONFIG_PINCTRL_MT7981) += pinctrl-mt7981.o
+obj-$(CONFIG_PINCTRL_MT7986) += pinctrl-mt7986.o
+obj-$(CONFIG_PINCTRL_MT8167) += pinctrl-mt8167.o
+obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o
+obj-$(CONFIG_PINCTRL_MT8183) += pinctrl-mt8183.o
+obj-$(CONFIG_PINCTRL_MT8186) += pinctrl-mt8186.o
+obj-$(CONFIG_PINCTRL_MT8188) += pinctrl-mt8188.o
+obj-$(CONFIG_PINCTRL_MT8192) += pinctrl-mt8192.o
+obj-$(CONFIG_PINCTRL_MT8195) += pinctrl-mt8195.o
+obj-$(CONFIG_PINCTRL_MT8365) += pinctrl-mt8365.o
+obj-$(CONFIG_PINCTRL_MT8516) += pinctrl-mt8516.o
+obj-$(CONFIG_PINCTRL_MT6397) += pinctrl-mt6397.o
diff --git a/drivers/pinctrl/ralink/pinctrl-mt7620.c b/drivers/pinctrl/mediatek/pinctrl-mt7620.c
similarity index 81%
rename from drivers/pinctrl/ralink/pinctrl-mt7620.c
rename to drivers/pinctrl/mediatek/pinctrl-mt7620.c
index b2245fd65c72..1a2dbbdd25f1 100644
--- a/drivers/pinctrl/ralink/pinctrl-mt7620.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt7620.c
@@ -3,7 +3,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
-#include "pinctrl-ralink.h"
+#include "pinctrl-mtmips.h"
#define MT7620_GPIO_MODE_UART0_SHIFT 2
#define MT7620_GPIO_MODE_UART0_MASK 0x7
@@ -52,20 +52,20 @@
#define MT7620_GPIO_MODE_EPHY 15
#define MT7620_GPIO_MODE_PA 20
-static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
-static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
-static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
-static struct ralink_pmx_func mdio_grp[] = {
+static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
+static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
+static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
+static struct mtmips_pmx_func mdio_grp[] = {
FUNC("mdio", MT7620_GPIO_MODE_MDIO, 22, 2),
FUNC("refclk", MT7620_GPIO_MODE_MDIO_REFCLK, 22, 2),
};
-static struct ralink_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 24, 12) };
-static struct ralink_pmx_func refclk_grp[] = { FUNC("spi refclk", 0, 37, 3) };
-static struct ralink_pmx_func ephy_grp[] = { FUNC("ephy", 0, 40, 5) };
-static struct ralink_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 60, 12) };
-static struct ralink_pmx_func wled_grp[] = { FUNC("wled", 0, 72, 1) };
-static struct ralink_pmx_func pa_grp[] = { FUNC("pa", 0, 18, 4) };
-static struct ralink_pmx_func uartf_grp[] = {
+static struct mtmips_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 24, 12) };
+static struct mtmips_pmx_func refclk_grp[] = { FUNC("spi refclk", 0, 37, 3) };
+static struct mtmips_pmx_func ephy_grp[] = { FUNC("ephy", 0, 40, 5) };
+static struct mtmips_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 60, 12) };
+static struct mtmips_pmx_func wled_grp[] = { FUNC("wled", 0, 72, 1) };
+static struct mtmips_pmx_func pa_grp[] = { FUNC("pa", 0, 18, 4) };
+static struct mtmips_pmx_func uartf_grp[] = {
FUNC("uartf", MT7620_GPIO_MODE_UARTF, 7, 8),
FUNC("pcm uartf", MT7620_GPIO_MODE_PCM_UARTF, 7, 8),
FUNC("pcm i2s", MT7620_GPIO_MODE_PCM_I2S, 7, 8),
@@ -74,20 +74,20 @@ static struct ralink_pmx_func uartf_grp[] = {
FUNC("gpio uartf", MT7620_GPIO_MODE_GPIO_UARTF, 7, 4),
FUNC("gpio i2s", MT7620_GPIO_MODE_GPIO_I2S, 7, 4),
};
-static struct ralink_pmx_func wdt_grp[] = {
+static struct mtmips_pmx_func wdt_grp[] = {
FUNC("wdt rst", 0, 17, 1),
FUNC("wdt refclk", 0, 17, 1),
};
-static struct ralink_pmx_func pcie_rst_grp[] = {
+static struct mtmips_pmx_func pcie_rst_grp[] = {
FUNC("pcie rst", MT7620_GPIO_MODE_PCIE_RST, 36, 1),
FUNC("pcie refclk", MT7620_GPIO_MODE_PCIE_REF, 36, 1)
};
-static struct ralink_pmx_func nd_sd_grp[] = {
+static struct mtmips_pmx_func nd_sd_grp[] = {
FUNC("nand", MT7620_GPIO_MODE_NAND, 45, 15),
FUNC("sd", MT7620_GPIO_MODE_SD, 47, 13)
};
-static struct ralink_pmx_group mt7620a_pinmux_data[] = {
+static struct mtmips_pmx_group mt7620a_pinmux_data[] = {
GRP("i2c", i2c_grp, 1, MT7620_GPIO_MODE_I2C),
GRP("uartf", uartf_grp, MT7620_GPIO_MODE_UART0_MASK,
MT7620_GPIO_MODE_UART0_SHIFT),
@@ -112,7 +112,7 @@ static struct ralink_pmx_group mt7620a_pinmux_data[] = {
static int mt7620_pinctrl_probe(struct platform_device *pdev)
{
- return ralink_pinctrl_init(pdev, mt7620a_pinmux_data);
+ return mtmips_pinctrl_init(pdev, mt7620a_pinmux_data);
}
static const struct of_device_id mt7620_pinctrl_match[] = {
diff --git a/drivers/pinctrl/ralink/pinctrl-mt7621.c b/drivers/pinctrl/mediatek/pinctrl-mt7621.c
similarity index 80%
rename from drivers/pinctrl/ralink/pinctrl-mt7621.c
rename to drivers/pinctrl/mediatek/pinctrl-mt7621.c
index 2128a94f6d1b..96c5ef942cf4 100644
--- a/drivers/pinctrl/ralink/pinctrl-mt7621.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt7621.c
@@ -3,7 +3,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
-#include "pinctrl-ralink.h"
+#include "pinctrl-mtmips.h"
#define MT7621_GPIO_MODE_UART1 1
#define MT7621_GPIO_MODE_I2C 2
@@ -34,40 +34,40 @@
#define MT7621_GPIO_MODE_SDHCI_SHIFT 18
#define MT7621_GPIO_MODE_SDHCI_GPIO 1
-static struct ralink_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) };
-static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) };
-static struct ralink_pmx_func uart3_grp[] = {
+static struct mtmips_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) };
+static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) };
+static struct mtmips_pmx_func uart3_grp[] = {
FUNC("uart3", 0, 5, 4),
FUNC("i2s", 2, 5, 4),
FUNC("spdif3", 3, 5, 4),
};
-static struct ralink_pmx_func uart2_grp[] = {
+static struct mtmips_pmx_func uart2_grp[] = {
FUNC("uart2", 0, 9, 4),
FUNC("pcm", 2, 9, 4),
FUNC("spdif2", 3, 9, 4),
};
-static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 13, 5) };
-static struct ralink_pmx_func wdt_grp[] = {
+static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 13, 5) };
+static struct mtmips_pmx_func wdt_grp[] = {
FUNC("wdt rst", 0, 18, 1),
FUNC("wdt refclk", 2, 18, 1),
};
-static struct ralink_pmx_func pcie_rst_grp[] = {
+static struct mtmips_pmx_func pcie_rst_grp[] = {
FUNC("pcie rst", MT7621_GPIO_MODE_PCIE_RST, 19, 1),
FUNC("pcie refclk", MT7621_GPIO_MODE_PCIE_REF, 19, 1)
};
-static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 20, 2) };
-static struct ralink_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 22, 12) };
-static struct ralink_pmx_func spi_grp[] = {
+static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 20, 2) };
+static struct mtmips_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 22, 12) };
+static struct mtmips_pmx_func spi_grp[] = {
FUNC("spi", 0, 34, 7),
FUNC("nand1", 2, 34, 7),
};
-static struct ralink_pmx_func sdhci_grp[] = {
+static struct mtmips_pmx_func sdhci_grp[] = {
FUNC("sdhci", 0, 41, 8),
FUNC("nand2", 2, 41, 8),
};
-static struct ralink_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 49, 12) };
+static struct mtmips_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 49, 12) };
-static struct ralink_pmx_group mt7621_pinmux_data[] = {
+static struct mtmips_pmx_group mt7621_pinmux_data[] = {
GRP("uart1", uart1_grp, 1, MT7621_GPIO_MODE_UART1),
GRP("i2c", i2c_grp, 1, MT7621_GPIO_MODE_I2C),
GRP_G("uart3", uart3_grp, MT7621_GPIO_MODE_UART3_MASK,
@@ -92,7 +92,7 @@ static struct ralink_pmx_group mt7621_pinmux_data[] = {
static int mt7621_pinctrl_probe(struct platform_device *pdev)
{
- return ralink_pinctrl_init(pdev, mt7621_pinmux_data);
+ return mtmips_pinctrl_init(pdev, mt7621_pinmux_data);
}
static const struct of_device_id mt7621_pinctrl_match[] = {
diff --git a/drivers/pinctrl/ralink/pinctrl-mt76x8.c b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
similarity index 81%
rename from drivers/pinctrl/ralink/pinctrl-mt76x8.c
rename to drivers/pinctrl/mediatek/pinctrl-mt76x8.c
index 5a6a82a58180..1d463bcfb1bd 100644
--- a/drivers/pinctrl/ralink/pinctrl-mt76x8.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
@@ -3,7 +3,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
-#include "pinctrl-ralink.h"
+#include "pinctrl-mtmips.h"
#define MT76X8_GPIO_MODE_MASK 0x3
@@ -35,173 +35,173 @@
#define MT76X8_GPIO_MODE_SPIS 2
#define MT76X8_GPIO_MODE_GPIO 0
-static struct ralink_pmx_func pwm1_grp[] = {
+static struct mtmips_pmx_func pwm1_grp[] = {
FUNC("sdxc d6", 3, 19, 1),
FUNC("utif", 2, 19, 1),
FUNC("gpio", 1, 19, 1),
FUNC("pwm1", 0, 19, 1),
};
-static struct ralink_pmx_func pwm0_grp[] = {
+static struct mtmips_pmx_func pwm0_grp[] = {
FUNC("sdxc d7", 3, 18, 1),
FUNC("utif", 2, 18, 1),
FUNC("gpio", 1, 18, 1),
FUNC("pwm0", 0, 18, 1),
};
-static struct ralink_pmx_func uart2_grp[] = {
+static struct mtmips_pmx_func uart2_grp[] = {
FUNC("sdxc d5 d4", 3, 20, 2),
FUNC("pwm", 2, 20, 2),
FUNC("gpio", 1, 20, 2),
FUNC("uart2", 0, 20, 2),
};
-static struct ralink_pmx_func uart1_grp[] = {
+static struct mtmips_pmx_func uart1_grp[] = {
FUNC("sw_r", 3, 45, 2),
FUNC("pwm", 2, 45, 2),
FUNC("gpio", 1, 45, 2),
FUNC("uart1", 0, 45, 2),
};
-static struct ralink_pmx_func i2c_grp[] = {
+static struct mtmips_pmx_func i2c_grp[] = {
FUNC("-", 3, 4, 2),
FUNC("debug", 2, 4, 2),
FUNC("gpio", 1, 4, 2),
FUNC("i2c", 0, 4, 2),
};
-static struct ralink_pmx_func refclk_grp[] = { FUNC("refclk", 0, 37, 1) };
-static struct ralink_pmx_func perst_grp[] = { FUNC("perst", 0, 36, 1) };
-static struct ralink_pmx_func wdt_grp[] = { FUNC("wdt", 0, 38, 1) };
-static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 7, 4) };
+static struct mtmips_pmx_func refclk_grp[] = { FUNC("refclk", 0, 37, 1) };
+static struct mtmips_pmx_func perst_grp[] = { FUNC("perst", 0, 36, 1) };
+static struct mtmips_pmx_func wdt_grp[] = { FUNC("wdt", 0, 38, 1) };
+static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 7, 4) };
-static struct ralink_pmx_func sd_mode_grp[] = {
+static struct mtmips_pmx_func sd_mode_grp[] = {
FUNC("jtag", 3, 22, 8),
FUNC("utif", 2, 22, 8),
FUNC("gpio", 1, 22, 8),
FUNC("sdxc", 0, 22, 8),
};
-static struct ralink_pmx_func uart0_grp[] = {
+static struct mtmips_pmx_func uart0_grp[] = {
FUNC("-", 3, 12, 2),
FUNC("-", 2, 12, 2),
FUNC("gpio", 1, 12, 2),
FUNC("uart0", 0, 12, 2),
};
-static struct ralink_pmx_func i2s_grp[] = {
+static struct mtmips_pmx_func i2s_grp[] = {
FUNC("antenna", 3, 0, 4),
FUNC("pcm", 2, 0, 4),
FUNC("gpio", 1, 0, 4),
FUNC("i2s", 0, 0, 4),
};
-static struct ralink_pmx_func spi_cs1_grp[] = {
+static struct mtmips_pmx_func spi_cs1_grp[] = {
FUNC("-", 3, 6, 1),
FUNC("refclk", 2, 6, 1),
FUNC("gpio", 1, 6, 1),
FUNC("spi cs1", 0, 6, 1),
};
-static struct ralink_pmx_func spis_grp[] = {
+static struct mtmips_pmx_func spis_grp[] = {
FUNC("pwm_uart2", 3, 14, 4),
FUNC("utif", 2, 14, 4),
FUNC("gpio", 1, 14, 4),
FUNC("spis", 0, 14, 4),
};
-static struct ralink_pmx_func gpio_grp[] = {
+static struct mtmips_pmx_func gpio_grp[] = {
FUNC("pcie", 3, 11, 1),
FUNC("refclk", 2, 11, 1),
FUNC("gpio", 1, 11, 1),
FUNC("gpio", 0, 11, 1),
};
-static struct ralink_pmx_func p4led_kn_grp[] = {
+static struct mtmips_pmx_func p4led_kn_grp[] = {
FUNC("jtag", 3, 30, 1),
FUNC("utif", 2, 30, 1),
FUNC("gpio", 1, 30, 1),
FUNC("p4led_kn", 0, 30, 1),
};
-static struct ralink_pmx_func p3led_kn_grp[] = {
+static struct mtmips_pmx_func p3led_kn_grp[] = {
FUNC("jtag", 3, 31, 1),
FUNC("utif", 2, 31, 1),
FUNC("gpio", 1, 31, 1),
FUNC("p3led_kn", 0, 31, 1),
};
-static struct ralink_pmx_func p2led_kn_grp[] = {
+static struct mtmips_pmx_func p2led_kn_grp[] = {
FUNC("jtag", 3, 32, 1),
FUNC("utif", 2, 32, 1),
FUNC("gpio", 1, 32, 1),
FUNC("p2led_kn", 0, 32, 1),
};
-static struct ralink_pmx_func p1led_kn_grp[] = {
+static struct mtmips_pmx_func p1led_kn_grp[] = {
FUNC("jtag", 3, 33, 1),
FUNC("utif", 2, 33, 1),
FUNC("gpio", 1, 33, 1),
FUNC("p1led_kn", 0, 33, 1),
};
-static struct ralink_pmx_func p0led_kn_grp[] = {
+static struct mtmips_pmx_func p0led_kn_grp[] = {
FUNC("jtag", 3, 34, 1),
FUNC("rsvd", 2, 34, 1),
FUNC("gpio", 1, 34, 1),
FUNC("p0led_kn", 0, 34, 1),
};
-static struct ralink_pmx_func wled_kn_grp[] = {
+static struct mtmips_pmx_func wled_kn_grp[] = {
FUNC("rsvd", 3, 35, 1),
FUNC("rsvd", 2, 35, 1),
FUNC("gpio", 1, 35, 1),
FUNC("wled_kn", 0, 35, 1),
};
-static struct ralink_pmx_func p4led_an_grp[] = {
+static struct mtmips_pmx_func p4led_an_grp[] = {
FUNC("jtag", 3, 39, 1),
FUNC("utif", 2, 39, 1),
FUNC("gpio", 1, 39, 1),
FUNC("p4led_an", 0, 39, 1),
};
-static struct ralink_pmx_func p3led_an_grp[] = {
+static struct mtmips_pmx_func p3led_an_grp[] = {
FUNC("jtag", 3, 40, 1),
FUNC("utif", 2, 40, 1),
FUNC("gpio", 1, 40, 1),
FUNC("p3led_an", 0, 40, 1),
};
-static struct ralink_pmx_func p2led_an_grp[] = {
+static struct mtmips_pmx_func p2led_an_grp[] = {
FUNC("jtag", 3, 41, 1),
FUNC("utif", 2, 41, 1),
FUNC("gpio", 1, 41, 1),
FUNC("p2led_an", 0, 41, 1),
};
-static struct ralink_pmx_func p1led_an_grp[] = {
+static struct mtmips_pmx_func p1led_an_grp[] = {
FUNC("jtag", 3, 42, 1),
FUNC("utif", 2, 42, 1),
FUNC("gpio", 1, 42, 1),
FUNC("p1led_an", 0, 42, 1),
};
-static struct ralink_pmx_func p0led_an_grp[] = {
+static struct mtmips_pmx_func p0led_an_grp[] = {
FUNC("jtag", 3, 43, 1),
FUNC("rsvd", 2, 43, 1),
FUNC("gpio", 1, 43, 1),
FUNC("p0led_an", 0, 43, 1),
};
-static struct ralink_pmx_func wled_an_grp[] = {
+static struct mtmips_pmx_func wled_an_grp[] = {
FUNC("rsvd", 3, 44, 1),
FUNC("rsvd", 2, 44, 1),
FUNC("gpio", 1, 44, 1),
FUNC("wled_an", 0, 44, 1),
};
-static struct ralink_pmx_group mt76x8_pinmux_data[] = {
+static struct mtmips_pmx_group mt76x8_pinmux_data[] = {
GRP_G("pwm1", pwm1_grp, MT76X8_GPIO_MODE_MASK,
1, MT76X8_GPIO_MODE_PWM1),
GRP_G("pwm0", pwm0_grp, MT76X8_GPIO_MODE_MASK,
@@ -257,7 +257,7 @@ static struct ralink_pmx_group mt76x8_pinmux_data[] = {
static int mt76x8_pinctrl_probe(struct platform_device *pdev)
{
- return ralink_pinctrl_init(pdev, mt76x8_pinmux_data);
+ return mtmips_pinctrl_init(pdev, mt76x8_pinmux_data);
}
static const struct of_device_id mt76x8_pinctrl_match[] = {
diff --git a/drivers/pinctrl/ralink/pinctrl-ralink.c b/drivers/pinctrl/mediatek/pinctrl-mtmips.c
similarity index 74%
rename from drivers/pinctrl/ralink/pinctrl-ralink.c
rename to drivers/pinctrl/mediatek/pinctrl-mtmips.c
index 770862f45b3f..efd77b6c56a1 100644
--- a/drivers/pinctrl/ralink/pinctrl-ralink.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtmips.c
@@ -19,23 +19,23 @@
#include <asm/mach-ralink/ralink_regs.h>
#include <asm/mach-ralink/mt7620.h>
-#include "pinctrl-ralink.h"
+#include "pinctrl-mtmips.h"
#include "../core.h"
#include "../pinctrl-utils.h"
#define SYSC_REG_GPIO_MODE 0x60
#define SYSC_REG_GPIO_MODE2 0x64
-struct ralink_priv {
+struct mtmips_priv {
struct device *dev;
struct pinctrl_pin_desc *pads;
struct pinctrl_desc *desc;
- struct ralink_pmx_func **func;
+ struct mtmips_pmx_func **func;
int func_count;
- struct ralink_pmx_group *groups;
+ struct mtmips_pmx_group *groups;
const char **group_names;
int group_count;
@@ -43,27 +43,27 @@ struct ralink_priv {
int max_pins;
};
-static int ralink_get_group_count(struct pinctrl_dev *pctrldev)
+static int mtmips_get_group_count(struct pinctrl_dev *pctrldev)
{
- struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
+ struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
return p->group_count;
}
-static const char *ralink_get_group_name(struct pinctrl_dev *pctrldev,
+static const char *mtmips_get_group_name(struct pinctrl_dev *pctrldev,
unsigned int group)
{
- struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
+ struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
return (group >= p->group_count) ? NULL : p->group_names[group];
}
-static int ralink_get_group_pins(struct pinctrl_dev *pctrldev,
+static int mtmips_get_group_pins(struct pinctrl_dev *pctrldev,
unsigned int group,
const unsigned int **pins,
unsigned int *num_pins)
{
- struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
+ struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
if (group >= p->group_count)
return -EINVAL;
@@ -74,35 +74,35 @@ static int ralink_get_group_pins(struct pinctrl_dev *pctrldev,
return 0;
}
-static const struct pinctrl_ops ralink_pctrl_ops = {
- .get_groups_count = ralink_get_group_count,
- .get_group_name = ralink_get_group_name,
- .get_group_pins = ralink_get_group_pins,
+static const struct pinctrl_ops mtmips_pctrl_ops = {
+ .get_groups_count = mtmips_get_group_count,
+ .get_group_name = mtmips_get_group_name,
+ .get_group_pins = mtmips_get_group_pins,
.dt_node_to_map = pinconf_generic_dt_node_to_map_all,
.dt_free_map = pinconf_generic_dt_free_map,
};
-static int ralink_pmx_func_count(struct pinctrl_dev *pctrldev)
+static int mtmips_pmx_func_count(struct pinctrl_dev *pctrldev)
{
- struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
+ struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
return p->func_count;
}
-static const char *ralink_pmx_func_name(struct pinctrl_dev *pctrldev,
+static const char *mtmips_pmx_func_name(struct pinctrl_dev *pctrldev,
unsigned int func)
{
- struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
+ struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
return p->func[func]->name;
}
-static int ralink_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
+static int mtmips_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
unsigned int func,
const char * const **groups,
unsigned int * const num_groups)
{
- struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
+ struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
if (p->func[func]->group_count == 1)
*groups = &p->group_names[p->func[func]->groups[0]];
@@ -114,10 +114,10 @@ static int ralink_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
return 0;
}
-static int ralink_pmx_group_enable(struct pinctrl_dev *pctrldev,
+static int mtmips_pmx_group_enable(struct pinctrl_dev *pctrldev,
unsigned int func, unsigned int group)
{
- struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
+ struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
u32 mode = 0;
u32 reg = SYSC_REG_GPIO_MODE;
int i;
@@ -158,11 +158,11 @@ static int ralink_pmx_group_enable(struct pinctrl_dev *pctrldev,
return 0;
}
-static int ralink_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
+static int mtmips_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
struct pinctrl_gpio_range *range,
unsigned int pin)
{
- struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
+ struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
if (!p->gpio[pin]) {
dev_err(p->dev, "pin %d is not set to gpio mux\n", pin);
@@ -172,28 +172,28 @@ static int ralink_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
return 0;
}
-static const struct pinmux_ops ralink_pmx_group_ops = {
- .get_functions_count = ralink_pmx_func_count,
- .get_function_name = ralink_pmx_func_name,
- .get_function_groups = ralink_pmx_group_get_groups,
- .set_mux = ralink_pmx_group_enable,
- .gpio_request_enable = ralink_pmx_group_gpio_request_enable,
+static const struct pinmux_ops mtmips_pmx_group_ops = {
+ .get_functions_count = mtmips_pmx_func_count,
+ .get_function_name = mtmips_pmx_func_name,
+ .get_function_groups = mtmips_pmx_group_get_groups,
+ .set_mux = mtmips_pmx_group_enable,
+ .gpio_request_enable = mtmips_pmx_group_gpio_request_enable,
};
-static struct pinctrl_desc ralink_pctrl_desc = {
+static struct pinctrl_desc mtmips_pctrl_desc = {
.owner = THIS_MODULE,
- .name = "ralink-pinctrl",
- .pctlops = &ralink_pctrl_ops,
- .pmxops = &ralink_pmx_group_ops,
+ .name = "mtmips-pinctrl",
+ .pctlops = &mtmips_pctrl_ops,
+ .pmxops = &mtmips_pmx_group_ops,
};
-static struct ralink_pmx_func gpio_func = {
+static struct mtmips_pmx_func gpio_func = {
.name = "gpio",
};
-static int ralink_pinctrl_index(struct ralink_priv *p)
+static int mtmips_pinctrl_index(struct mtmips_priv *p)
{
- struct ralink_pmx_group *mux = p->groups;
+ struct mtmips_pmx_group *mux = p->groups;
int i, j, c = 0;
/* count the mux functions */
@@ -248,7 +248,7 @@ static int ralink_pinctrl_index(struct ralink_priv *p)
return 0;
}
-static int ralink_pinctrl_pins(struct ralink_priv *p)
+static int mtmips_pinctrl_pins(struct mtmips_priv *p)
{
int i, j;
@@ -313,10 +313,10 @@ static int ralink_pinctrl_pins(struct ralink_priv *p)
return 0;
}
-int ralink_pinctrl_init(struct platform_device *pdev,
- struct ralink_pmx_group *data)
+int mtmips_pinctrl_init(struct platform_device *pdev,
+ struct mtmips_pmx_group *data)
{
- struct ralink_priv *p;
+ struct mtmips_priv *p;
struct pinctrl_dev *dev;
int err;
@@ -324,23 +324,23 @@ int ralink_pinctrl_init(struct platform_device *pdev,
return -ENOTSUPP;
/* setup the private data */
- p = devm_kzalloc(&pdev->dev, sizeof(struct ralink_priv), GFP_KERNEL);
+ p = devm_kzalloc(&pdev->dev, sizeof(struct mtmips_priv), GFP_KERNEL);
if (!p)
return -ENOMEM;
p->dev = &pdev->dev;
- p->desc = &ralink_pctrl_desc;
+ p->desc = &mtmips_pctrl_desc;
p->groups = data;
platform_set_drvdata(pdev, p);
/* init the device */
- err = ralink_pinctrl_index(p);
+ err = mtmips_pinctrl_index(p);
if (err) {
dev_err(&pdev->dev, "failed to load index\n");
return err;
}
- err = ralink_pinctrl_pins(p);
+ err = mtmips_pinctrl_pins(p);
if (err) {
dev_err(&pdev->dev, "failed to load pins\n");
return err;
diff --git a/drivers/pinctrl/ralink/pinctrl-ralink.h b/drivers/pinctrl/mediatek/pinctrl-mtmips.h
similarity index 75%
rename from drivers/pinctrl/ralink/pinctrl-ralink.h
rename to drivers/pinctrl/mediatek/pinctrl-mtmips.h
index e6037be1e153..a7c3dd724431 100644
--- a/drivers/pinctrl/ralink/pinctrl-ralink.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtmips.h
@@ -3,8 +3,8 @@
* Copyright (C) 2012 John Crispin <[email protected]>
*/
-#ifndef _PINCTRL_RALINK_H__
-#define _PINCTRL_RALINK_H__
+#ifndef _PINCTRL_MTMIPS_H__
+#define _PINCTRL_MTMIPS_H__
#define FUNC(name, value, pin_first, pin_count) \
{ name, value, pin_first, pin_count }
@@ -19,9 +19,9 @@
.func = _func, .gpio = _gpio, \
.func_count = ARRAY_SIZE(_func) }
-struct ralink_pmx_group;
+struct mtmips_pmx_group;
-struct ralink_pmx_func {
+struct mtmips_pmx_func {
const char *name;
const char value;
@@ -35,7 +35,7 @@ struct ralink_pmx_func {
int enabled;
};
-struct ralink_pmx_group {
+struct mtmips_pmx_group {
const char *name;
int enabled;
@@ -43,11 +43,11 @@ struct ralink_pmx_group {
const char mask;
const char gpio;
- struct ralink_pmx_func *func;
+ struct mtmips_pmx_func *func;
int func_count;
};
-int ralink_pinctrl_init(struct platform_device *pdev,
- struct ralink_pmx_group *data);
+int mtmips_pinctrl_init(struct platform_device *pdev,
+ struct mtmips_pmx_group *data);
#endif
diff --git a/drivers/pinctrl/ralink/pinctrl-rt2880.c b/drivers/pinctrl/mediatek/pinctrl-rt2880.c
similarity index 71%
rename from drivers/pinctrl/ralink/pinctrl-rt2880.c
rename to drivers/pinctrl/mediatek/pinctrl-rt2880.c
index d7a65fcc7755..e0366721a515 100644
--- a/drivers/pinctrl/ralink/pinctrl-rt2880.c
+++ b/drivers/pinctrl/mediatek/pinctrl-rt2880.c
@@ -4,7 +4,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
-#include "pinctrl-ralink.h"
+#include "pinctrl-mtmips.h"
#define RT2880_GPIO_MODE_I2C BIT(0)
#define RT2880_GPIO_MODE_UART0 BIT(1)
@@ -15,15 +15,15 @@
#define RT2880_GPIO_MODE_SDRAM BIT(6)
#define RT2880_GPIO_MODE_PCI BIT(7)
-static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
-static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
-static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 7, 8) };
-static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
-static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
-static struct ralink_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
-static struct ralink_pmx_func pci_grp[] = { FUNC("pci", 0, 40, 32) };
+static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
+static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
+static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 7, 8) };
+static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
+static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
+static struct mtmips_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
+static struct mtmips_pmx_func pci_grp[] = { FUNC("pci", 0, 40, 32) };
-static struct ralink_pmx_group rt2880_pinmux_data_act[] = {
+static struct mtmips_pmx_group rt2880_pinmux_data_act[] = {
GRP("i2c", i2c_grp, 1, RT2880_GPIO_MODE_I2C),
GRP("spi", spi_grp, 1, RT2880_GPIO_MODE_SPI),
GRP("uartlite", uartlite_grp, 1, RT2880_GPIO_MODE_UART0),
@@ -36,7 +36,7 @@ static struct ralink_pmx_group rt2880_pinmux_data_act[] = {
static int rt2880_pinctrl_probe(struct platform_device *pdev)
{
- return ralink_pinctrl_init(pdev, rt2880_pinmux_data_act);
+ return mtmips_pinctrl_init(pdev, rt2880_pinmux_data_act);
}
static const struct of_device_id rt2880_pinctrl_match[] = {
diff --git a/drivers/pinctrl/ralink/pinctrl-rt305x.c b/drivers/pinctrl/mediatek/pinctrl-rt305x.c
similarity index 75%
rename from drivers/pinctrl/ralink/pinctrl-rt305x.c
rename to drivers/pinctrl/mediatek/pinctrl-rt305x.c
index fa3743c7680f..77bd4d1f6122 100644
--- a/drivers/pinctrl/ralink/pinctrl-rt305x.c
+++ b/drivers/pinctrl/mediatek/pinctrl-rt305x.c
@@ -5,7 +5,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
-#include "pinctrl-ralink.h"
+#include "pinctrl-mtmips.h"
#define RT305X_GPIO_MODE_UART0_SHIFT 2
#define RT305X_GPIO_MODE_UART0_MASK 0x7
@@ -31,9 +31,9 @@
#define RT3352_GPIO_MODE_LNA 18
#define RT3352_GPIO_MODE_PA 20
-static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
-static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
-static struct ralink_pmx_func uartf_grp[] = {
+static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
+static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
+static struct mtmips_pmx_func uartf_grp[] = {
FUNC("uartf", RT305X_GPIO_MODE_UARTF, 7, 8),
FUNC("pcm uartf", RT305X_GPIO_MODE_PCM_UARTF, 7, 8),
FUNC("pcm i2s", RT305X_GPIO_MODE_PCM_I2S, 7, 8),
@@ -42,28 +42,28 @@ static struct ralink_pmx_func uartf_grp[] = {
FUNC("gpio uartf", RT305X_GPIO_MODE_GPIO_UARTF, 7, 4),
FUNC("gpio i2s", RT305X_GPIO_MODE_GPIO_I2S, 7, 4),
};
-static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
-static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
-static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
-static struct ralink_pmx_func rt5350_led_grp[] = { FUNC("led", 0, 22, 5) };
-static struct ralink_pmx_func rt5350_cs1_grp[] = {
+static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
+static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
+static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
+static struct mtmips_pmx_func rt5350_led_grp[] = { FUNC("led", 0, 22, 5) };
+static struct mtmips_pmx_func rt5350_cs1_grp[] = {
FUNC("spi_cs1", 0, 27, 1),
FUNC("wdg_cs1", 1, 27, 1),
};
-static struct ralink_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
-static struct ralink_pmx_func rt3352_rgmii_grp[] = {
+static struct mtmips_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
+static struct mtmips_pmx_func rt3352_rgmii_grp[] = {
FUNC("rgmii", 0, 24, 12)
};
-static struct ralink_pmx_func rgmii_grp[] = { FUNC("rgmii", 0, 40, 12) };
-static struct ralink_pmx_func rt3352_lna_grp[] = { FUNC("lna", 0, 36, 2) };
-static struct ralink_pmx_func rt3352_pa_grp[] = { FUNC("pa", 0, 38, 2) };
-static struct ralink_pmx_func rt3352_led_grp[] = { FUNC("led", 0, 40, 5) };
-static struct ralink_pmx_func rt3352_cs1_grp[] = {
+static struct mtmips_pmx_func rgmii_grp[] = { FUNC("rgmii", 0, 40, 12) };
+static struct mtmips_pmx_func rt3352_lna_grp[] = { FUNC("lna", 0, 36, 2) };
+static struct mtmips_pmx_func rt3352_pa_grp[] = { FUNC("pa", 0, 38, 2) };
+static struct mtmips_pmx_func rt3352_led_grp[] = { FUNC("led", 0, 40, 5) };
+static struct mtmips_pmx_func rt3352_cs1_grp[] = {
FUNC("spi_cs1", 0, 45, 1),
FUNC("wdg_cs1", 1, 45, 1),
};
-static struct ralink_pmx_group rt3050_pinmux_data[] = {
+static struct mtmips_pmx_group rt3050_pinmux_data[] = {
GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C),
GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI),
GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK,
@@ -76,7 +76,7 @@ static struct ralink_pmx_group rt3050_pinmux_data[] = {
{ 0 }
};
-static struct ralink_pmx_group rt3352_pinmux_data[] = {
+static struct mtmips_pmx_group rt3352_pinmux_data[] = {
GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C),
GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI),
GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK,
@@ -92,7 +92,7 @@ static struct ralink_pmx_group rt3352_pinmux_data[] = {
{ 0 }
};
-static struct ralink_pmx_group rt5350_pinmux_data[] = {
+static struct mtmips_pmx_group rt5350_pinmux_data[] = {
GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C),
GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI),
GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK,
@@ -107,11 +107,11 @@ static struct ralink_pmx_group rt5350_pinmux_data[] = {
static int rt305x_pinctrl_probe(struct platform_device *pdev)
{
if (soc_is_rt5350())
- return ralink_pinctrl_init(pdev, rt5350_pinmux_data);
+ return mtmips_pinctrl_init(pdev, rt5350_pinmux_data);
else if (soc_is_rt305x() || soc_is_rt3350())
- return ralink_pinctrl_init(pdev, rt3050_pinmux_data);
+ return mtmips_pinctrl_init(pdev, rt3050_pinmux_data);
else if (soc_is_rt3352())
- return ralink_pinctrl_init(pdev, rt3352_pinmux_data);
+ return mtmips_pinctrl_init(pdev, rt3352_pinmux_data);
else
return -EINVAL;
}
diff --git a/drivers/pinctrl/ralink/pinctrl-rt3883.c b/drivers/pinctrl/mediatek/pinctrl-rt3883.c
similarity index 80%
rename from drivers/pinctrl/ralink/pinctrl-rt3883.c
rename to drivers/pinctrl/mediatek/pinctrl-rt3883.c
index 5f766d76bafa..eeaf344c3647 100644
--- a/drivers/pinctrl/ralink/pinctrl-rt3883.c
+++ b/drivers/pinctrl/mediatek/pinctrl-rt3883.c
@@ -3,7 +3,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
-#include "pinctrl-ralink.h"
+#include "pinctrl-mtmips.h"
#define RT3883_GPIO_MODE_UART0_SHIFT 2
#define RT3883_GPIO_MODE_UART0_MASK 0x7
@@ -39,9 +39,9 @@
#define RT3883_GPIO_MODE_LNA_G_GPIO 0x3
#define RT3883_GPIO_MODE_LNA_G _RT3883_GPIO_MODE_LNA_G(RT3883_GPIO_MODE_LNA_G_MASK)
-static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
-static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
-static struct ralink_pmx_func uartf_grp[] = {
+static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
+static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
+static struct mtmips_pmx_func uartf_grp[] = {
FUNC("uartf", RT3883_GPIO_MODE_UARTF, 7, 8),
FUNC("pcm uartf", RT3883_GPIO_MODE_PCM_UARTF, 7, 8),
FUNC("pcm i2s", RT3883_GPIO_MODE_PCM_I2S, 7, 8),
@@ -50,21 +50,21 @@ static struct ralink_pmx_func uartf_grp[] = {
FUNC("gpio uartf", RT3883_GPIO_MODE_GPIO_UARTF, 7, 4),
FUNC("gpio i2s", RT3883_GPIO_MODE_GPIO_I2S, 7, 4),
};
-static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
-static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
-static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
-static struct ralink_pmx_func lna_a_grp[] = { FUNC("lna a", 0, 32, 3) };
-static struct ralink_pmx_func lna_g_grp[] = { FUNC("lna g", 0, 35, 3) };
-static struct ralink_pmx_func pci_grp[] = {
+static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
+static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
+static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
+static struct mtmips_pmx_func lna_a_grp[] = { FUNC("lna a", 0, 32, 3) };
+static struct mtmips_pmx_func lna_g_grp[] = { FUNC("lna g", 0, 35, 3) };
+static struct mtmips_pmx_func pci_grp[] = {
FUNC("pci-dev", 0, 40, 32),
FUNC("pci-host2", 1, 40, 32),
FUNC("pci-host1", 2, 40, 32),
FUNC("pci-fnc", 3, 40, 32)
};
-static struct ralink_pmx_func ge1_grp[] = { FUNC("ge1", 0, 72, 12) };
-static struct ralink_pmx_func ge2_grp[] = { FUNC("ge2", 0, 84, 12) };
+static struct mtmips_pmx_func ge1_grp[] = { FUNC("ge1", 0, 72, 12) };
+static struct mtmips_pmx_func ge2_grp[] = { FUNC("ge2", 0, 84, 12) };
-static struct ralink_pmx_group rt3883_pinmux_data[] = {
+static struct mtmips_pmx_group rt3883_pinmux_data[] = {
GRP("i2c", i2c_grp, 1, RT3883_GPIO_MODE_I2C),
GRP("spi", spi_grp, 1, RT3883_GPIO_MODE_SPI),
GRP("uartf", uartf_grp, RT3883_GPIO_MODE_UART0_MASK,
@@ -83,7 +83,7 @@ static struct ralink_pmx_group rt3883_pinmux_data[] = {
static int rt3883_pinctrl_probe(struct platform_device *pdev)
{
- return ralink_pinctrl_init(pdev, rt3883_pinmux_data);
+ return mtmips_pinctrl_init(pdev, rt3883_pinmux_data);
}
static const struct of_device_id rt3883_pinctrl_match[] = {
diff --git a/drivers/pinctrl/ralink/Kconfig b/drivers/pinctrl/ralink/Kconfig
deleted file mode 100644
index c5fe4c31aaea..000000000000
--- a/drivers/pinctrl/ralink/Kconfig
+++ /dev/null
@@ -1,40 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-menu "Ralink pinctrl drivers"
- depends on RALINK
-
-config PINCTRL_RALINK
- bool "Ralink pinctrl driver"
- select PINMUX
- select GENERIC_PINCONF
-
-config PINCTRL_MT7620
- bool "MT7620 pinctrl subdriver"
- depends on RALINK && SOC_MT7620
- select PINCTRL_RALINK
-
-config PINCTRL_MT7621
- bool "MT7621 pinctrl subdriver"
- depends on RALINK && SOC_MT7621
- select PINCTRL_RALINK
-
-config PINCTRL_MT76X8
- bool "MT76X8 pinctrl subdriver"
- depends on RALINK && SOC_MT7620
- select PINCTRL_RALINK
-
-config PINCTRL_RT2880
- bool "RT2880 pinctrl subdriver"
- depends on RALINK && SOC_RT288X
- select PINCTRL_RALINK
-
-config PINCTRL_RT305X
- bool "RT305X pinctrl subdriver"
- depends on RALINK && SOC_RT305X
- select PINCTRL_RALINK
-
-config PINCTRL_RT3883
- bool "RT3883 pinctrl subdriver"
- depends on RALINK && SOC_RT3883
- select PINCTRL_RALINK
-
-endmenu
diff --git a/drivers/pinctrl/ralink/Makefile b/drivers/pinctrl/ralink/Makefile
deleted file mode 100644
index be9acf2e27fd..000000000000
--- a/drivers/pinctrl/ralink/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_PINCTRL_RALINK) += pinctrl-ralink.o
-
-obj-$(CONFIG_PINCTRL_MT7620) += pinctrl-mt7620.o
-obj-$(CONFIG_PINCTRL_MT7621) += pinctrl-mt7621.o
-obj-$(CONFIG_PINCTRL_MT76X8) += pinctrl-mt76x8.o
-obj-$(CONFIG_PINCTRL_RT2880) += pinctrl-rt2880.o
-obj-$(CONFIG_PINCTRL_RT305X) += pinctrl-rt305x.o
-obj-$(CONFIG_PINCTRL_RT3883) += pinctrl-rt3883.o
--
2.37.2
From: Arınç ÜNAL <[email protected]>
Move additionalProperties to the top. It's easier to read than after a long
indented section.
Drop the quotes from the referred schemas.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
.../bindings/pinctrl/ralink,mt7620-pinctrl.yaml | 9 ++++-----
.../bindings/pinctrl/ralink,mt7621-pinctrl.yaml | 9 ++++-----
.../bindings/pinctrl/ralink,rt2880-pinctrl.yaml | 9 ++++-----
.../bindings/pinctrl/ralink,rt305x-pinctrl.yaml | 9 ++++-----
.../bindings/pinctrl/ralink,rt3883-pinctrl.yaml | 9 ++++-----
5 files changed, 20 insertions(+), 25 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
index 1e63ea34146a..cde6de77e228 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
@@ -22,11 +22,14 @@ properties:
patternProperties:
'-pins$':
type: object
+ additionalProperties: false
+
patternProperties:
'^(.*-)?pinmux$':
type: object
description: node for pinctrl.
$ref: pinmux-node.yaml#
+ additionalProperties: false
properties:
function:
@@ -632,12 +635,8 @@ patternProperties:
groups:
enum: [i2c, spi cs1, uart0]
- additionalProperties: false
-
- additionalProperties: false
-
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
required:
- compatible
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml
index 1b1d37b981d9..fb8c5459ea93 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml
@@ -22,11 +22,14 @@ properties:
patternProperties:
'-pins$':
type: object
+ additionalProperties: false
+
patternProperties:
'^(.*-)?pinmux$':
type: object
description: node for pinctrl.
$ref: pinmux-node.yaml#
+ additionalProperties: false
properties:
function:
@@ -236,12 +239,8 @@ patternProperties:
groups:
enum: [wdt]
- additionalProperties: false
-
- additionalProperties: false
-
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
required:
- compatible
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml
index 7fd0df880a76..e51667316b2e 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml
@@ -22,11 +22,14 @@ properties:
patternProperties:
'-pins$':
type: object
+ additionalProperties: false
+
patternProperties:
'^(.*-)?pinmux$':
type: object
description: node for pinctrl.
$ref: pinmux-node.yaml#
+ additionalProperties: false
properties:
function:
@@ -116,12 +119,8 @@ patternProperties:
groups:
enum: [pci]
- additionalProperties: false
-
- additionalProperties: false
-
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
required:
- compatible
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
index 4d66ca752a30..8b1256af09c3 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
@@ -23,11 +23,14 @@ properties:
patternProperties:
'-pins$':
type: object
+ additionalProperties: false
+
patternProperties:
'^(.*-)?pinmux$':
type: object
description: node for pinctrl.
$ref: pinmux-node.yaml#
+ additionalProperties: false
properties:
function:
@@ -249,12 +252,8 @@ patternProperties:
groups:
enum: [spi_cs1]
- additionalProperties: false
-
- additionalProperties: false
-
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
required:
- compatible
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml
index 008d93181aea..adc4f42a175d 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml
@@ -22,11 +22,14 @@ properties:
patternProperties:
'-pins$':
type: object
+ additionalProperties: false
+
patternProperties:
'^(.*-)?pinmux$':
type: object
description: node for pinctrl.
$ref: pinmux-node.yaml#
+ additionalProperties: false
properties:
function:
@@ -236,12 +239,8 @@ patternProperties:
groups:
enum: [uartlite]
- additionalProperties: false
-
- additionalProperties: false
-
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
required:
- compatible
--
2.37.2
From: Arınç ÜNAL <[email protected]>
Add the new mediatek compatible strings. Change the compatible string on
the examples with the mediatek compatible strings.
Add the new compatible strings for mt7620, mt76x8, and rt305x to be able to
properly document the pin muxing information of each SoC, or SoCs that use
the same pinmux data.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
.../devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml | 7 +++++--
.../devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml | 6 ++++--
.../devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml | 5 ++++-
3 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
index cde6de77e228..a94d2e7a5f37 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
@@ -17,7 +17,10 @@ description:
properties:
compatible:
- const: ralink,mt7620-pinctrl
+ enum:
+ - mediatek,mt7620-pinctrl
+ - mediatek,mt76x8-pinctrl
+ - ralink,mt7620-pinctrl
patternProperties:
'-pins$':
@@ -646,7 +649,7 @@ additionalProperties: false
examples:
- |
pinctrl {
- compatible = "ralink,mt7620-pinctrl";
+ compatible = "mediatek,mt7620-pinctrl";
i2c_pins: i2c0-pins {
pinmux {
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml
index fb8c5459ea93..eb0746cfc6d6 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml
@@ -17,7 +17,9 @@ description:
properties:
compatible:
- const: ralink,mt7621-pinctrl
+ enum:
+ - mediatek,mt7621-pinctrl
+ - ralink,mt7621-pinctrl
patternProperties:
'-pins$':
@@ -250,7 +252,7 @@ additionalProperties: false
examples:
- |
pinctrl {
- compatible = "ralink,mt7621-pinctrl";
+ compatible = "mediatek,mt7621-pinctrl";
i2c_pins: i2c0-pins {
pinmux {
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
index 8b1256af09c3..23fb82f9959c 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
@@ -18,7 +18,10 @@ description:
properties:
compatible:
- const: ralink,rt305x-pinctrl
+ enum:
+ - ralink,rt305x-pinctrl
+ - ralink,rt3352-pinctrl
+ - ralink,rt5350-pinctrl
patternProperties:
'-pins$':
--
2.37.2
From: Arınç ÜNAL <[email protected]>
Rename mediatek,pinctrl-mt6795.yaml to mediatek,mt6795-pinctrl.yaml to be
on par with the compatible string and other mediatek dt-binding schemas.
Signed-off-by: Arınç ÜNAL <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
...ediatek,pinctrl-mt6795.yaml => mediatek,mt6795-pinctrl.yaml} | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
rename Documentation/devicetree/bindings/pinctrl/{mediatek,pinctrl-mt6795.yaml => mediatek,mt6795-pinctrl.yaml} (98%)
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,pinctrl-mt6795.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
similarity index 98%
rename from Documentation/devicetree/bindings/pinctrl/mediatek,pinctrl-mt6795.yaml
rename to Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
index 9399e0215526..c5131f053b61 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,pinctrl-mt6795.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
-$id: http://devicetree.org/schemas/pinctrl/mediatek,pinctrl-mt6795.yaml#
+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT6795 Pin Controller
--
2.37.2
From: Arınç ÜNAL <[email protected]>
This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
introduced these SoCs which utilise this platform. Rename the schemas to
mediatek to address the incorrect naming.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
...ink,mt7620-pinctrl.yaml => mediatek,mt7620-pinctrl.yaml} | 6 +++---
...ink,mt7621-pinctrl.yaml => mediatek,mt7621-pinctrl.yaml} | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
rename Documentation/devicetree/bindings/pinctrl/{ralink,mt7620-pinctrl.yaml => mediatek,mt7620-pinctrl.yaml} (98%)
rename Documentation/devicetree/bindings/pinctrl/{ralink,mt7621-pinctrl.yaml => mediatek,mt7621-pinctrl.yaml} (97%)
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
similarity index 98%
rename from Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
rename to Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
index a94d2e7a5f37..1c9ca0bf9750 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
@@ -1,17 +1,17 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
-$id: http://devicetree.org/schemas/pinctrl/ralink,mt7620-pinctrl.yaml#
+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7620-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Ralink MT7620 Pin Controller
+title: MediaTek MT7620 Pin Controller
maintainers:
- Arınç ÜNAL <[email protected]>
- Sergio Paracuellos <[email protected]>
description:
- Ralink MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs.
+ MediaTek MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs.
The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support.
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml
similarity index 97%
rename from Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml
rename to Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml
index eb0746cfc6d6..717c948951be 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml
@@ -1,17 +1,17 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
-$id: http://devicetree.org/schemas/pinctrl/ralink,mt7621-pinctrl.yaml#
+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7621-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Ralink MT7621 Pin Controller
+title: MediaTek MT7621 Pin Controller
maintainers:
- Arınç ÜNAL <[email protected]>
- Sergio Paracuellos <[email protected]>
description:
- Ralink MT7621 pin controller for MT7621 SoC.
+ MediaTek MT7621 pin controller for MT7621 SoC.
The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support.
--
2.37.2
From: Arınç ÜNAL <[email protected]>
Rename pinctrl-mt8186.yaml to mediatek,mt8186-pinctrl.yaml to be on par
with the compatible string and other mediatek dt-binding schemas.
Signed-off-by: Arınç ÜNAL <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
.../{pinctrl-mt8186.yaml => mediatek,mt8186-pinctrl.yaml} | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
rename Documentation/devicetree/bindings/pinctrl/{pinctrl-mt8186.yaml => mediatek,mt8186-pinctrl.yaml} (99%)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
similarity index 99%
rename from Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
rename to Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
index 26573a793b57..32d64416eb16 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
-$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8186.yaml#
+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT8186 Pin Controller
--
2.37.2
From: Arınç ÜNAL <[email protected]>
Rename pinctrl-mt8192.yaml to mediatek,mt8192-pinctrl.yaml to be on par
with the compatible string and other mediatek dt-binding schemas.
Signed-off-by: Arınç ÜNAL <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
.../{pinctrl-mt8192.yaml => mediatek,mt8192-pinctrl.yaml} | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
rename Documentation/devicetree/bindings/pinctrl/{pinctrl-mt8192.yaml => mediatek,mt8192-pinctrl.yaml} (98%)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
similarity index 98%
rename from Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml
rename to Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
index e0e943e5b874..e764cb0f8c1a 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
-$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8192.yaml#
+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT8192 Pin Controller
--
2.37.2
From: Arınç ÜNAL <[email protected]>
Rename pinctrl-mt8195.yaml to mediatek,mt8195-pinctrl.yaml to be on par
with the compatible string and other mediatek dt-binding schemas.
Signed-off-by: Arınç ÜNAL <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
.../{pinctrl-mt8195.yaml => mediatek,mt8195-pinctrl.yaml} | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
rename Documentation/devicetree/bindings/pinctrl/{pinctrl-mt8195.yaml => mediatek,mt8195-pinctrl.yaml} (99%)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
similarity index 99%
rename from Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
rename to Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
index 66fe17e9e4d3..7b3dfc14eedc 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
-$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8195.yaml#
+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT8195 Pin Controller
--
2.37.2
From: Arınç ÜNAL <[email protected]>
Some schemas include "MediaTek", some "Mediatek". Rename all to "MediaTek"
to address the naming inconsistency.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
.../devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml | 4 ++--
.../devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml | 2 +-
.../devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml | 4 ++--
.../devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml | 2 +-
.../devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml | 2 +-
.../devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml | 2 +-
.../devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml | 2 +-
.../devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml | 4 ++--
.../devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml | 4 ++--
.../devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml | 4 ++--
.../devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml | 2 +-
11 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
index a55c8e4ff26e..77b1b52f5799 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
@@ -4,13 +4,13 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt65xx-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Mediatek MT65xx Pin Controller
+title: MediaTek MT65xx Pin Controller
maintainers:
- Sean Wang <[email protected]>
description: |+
- The Mediatek's Pin controller is used to control SoC pins.
+ The MediaTek's MT65xx Pin controller is used to control SoC pins.
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
index a2141eb0854e..c2fea29fa02f 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Mediatek MT6779 Pin Controller
+title: MediaTek MT6779 Pin Controller
maintainers:
- Andy Teng <[email protected]>
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
index c5131f053b61..a78df32e6c39 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
@@ -4,14 +4,14 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Mediatek MT6795 Pin Controller
+title: MediaTek MT6795 Pin Controller
maintainers:
- AngeloGioacchino Del Regno <[email protected]>
- Sean Wang <[email protected]>
description: |
- The Mediatek's Pin controller is used to control SoC pins.
+ The MediaTek's MT6795 Pin controller is used to control SoC pins.
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
index ac93eb8f01a6..3531b63ca4bf 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7622-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Mediatek MT7622 Pin Controller
+title: MediaTek MT7622 Pin Controller
maintainers:
- Sean Wang <[email protected]>
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml
index 74c66fbcb2ae..c3373290a8a1 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7981-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Mediatek MT7981 Pin Controller
+title: MediaTek MT7981 Pin Controller
maintainers:
- Daniel Golle <[email protected]>
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
index 216b356cd519..71033831d03d 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Mediatek MT7986 Pin Controller
+title: MediaTek MT7986 Pin Controller
maintainers:
- Sean Wang <[email protected]>
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
index c30cd0d010dd..3e34b03e11fc 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8183-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Mediatek MT8183 Pin Controller
+title: MediaTek MT8183 Pin Controller
maintainers:
- Sean Wang <[email protected]>
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
index 32d64416eb16..a0519acc92fe 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
@@ -4,13 +4,13 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Mediatek MT8186 Pin Controller
+title: MediaTek MT8186 Pin Controller
maintainers:
- Sean Wang <[email protected]>
description: |
- The Mediatek's Pin controller is used to control SoC pins.
+ The MediaTek's MT8186 Pin controller is used to control SoC pins.
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
index e764cb0f8c1a..3c3dd142a989 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
@@ -4,13 +4,13 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Mediatek MT8192 Pin Controller
+title: MediaTek MT8192 Pin Controller
maintainers:
- Sean Wang <[email protected]>
description: |
- The Mediatek's Pin controller is used to control SoC pins.
+ The MediaTek's MT8192 Pin controller is used to control SoC pins.
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
index 7b3dfc14eedc..d4d5357cdd1d 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
@@ -4,13 +4,13 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Mediatek MT8195 Pin Controller
+title: MediaTek MT8195 Pin Controller
maintainers:
- Sean Wang <[email protected]>
description: |
- The Mediatek's Pin controller is used to control SoC pins.
+ The MediaTek's MT8195 Pin controller is used to control SoC pins.
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
index 4b96884a1afc..42964dfa9fdb 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8365-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Mediatek MT8365 Pin Controller
+title: MediaTek MT8365 Pin Controller
maintainers:
- Zhiyong Tao <[email protected]>
--
2.37.2
From: Arınç ÜNAL <[email protected]>
Set second level patternProperties to '^.*mux.*$' and '^.*conf.*$' on
mediatek,mt7986-pinctrl.yaml.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
.../devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
index 46b7228920ed..e937881210c5 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
@@ -72,7 +72,7 @@ patternProperties:
additionalProperties: false
patternProperties:
- '.*mux.*':
+ '^.*mux.*$':
type: object
additionalProperties: false
description: |
@@ -256,7 +256,7 @@ patternProperties:
items:
enum: [wf_2g, wf_5g, wf_dbdc]
maxItems: 3
- '.*conf.*':
+ '^.*conf.*$':
type: object
additionalProperties: false
description:
--
2.37.2
From: Arınç ÜNAL <[email protected]>
Change the style of description properties to plain style where there's no
need to preserve the line endings, and vice versa.
Fit the schemas to 80 columns for each line.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
.../pinctrl/mediatek,mt65xx-pinctrl.yaml | 20 ++---
.../pinctrl/mediatek,mt6779-pinctrl.yaml | 31 ++++----
.../pinctrl/mediatek,mt6795-pinctrl.yaml | 29 ++++----
.../pinctrl/mediatek,mt7620-pinctrl.yaml | 2 +-
.../pinctrl/mediatek,mt7621-pinctrl.yaml | 2 +-
.../pinctrl/mediatek,mt7622-pinctrl.yaml | 24 +++---
.../pinctrl/mediatek,mt7981-pinctrl.yaml | 33 +++++----
.../pinctrl/mediatek,mt7986-pinctrl.yaml | 60 +++++++--------
.../pinctrl/mediatek,mt8183-pinctrl.yaml | 24 +++---
.../pinctrl/mediatek,mt8186-pinctrl.yaml | 43 ++++++-----
.../pinctrl/mediatek,mt8188-pinctrl.yaml | 74 ++++++++++---------
.../pinctrl/mediatek,mt8192-pinctrl.yaml | 43 +++++------
.../pinctrl/mediatek,mt8195-pinctrl.yaml | 34 ++++-----
.../pinctrl/mediatek,mt8365-pinctrl.yaml | 26 ++++---
.../pinctrl/ralink,rt2880-pinctrl.yaml | 2 +-
.../pinctrl/ralink,rt305x-pinctrl.yaml | 2 +-
.../pinctrl/ralink,rt3883-pinctrl.yaml | 2 +-
17 files changed, 236 insertions(+), 215 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
index 77b1b52f5799..3191d08ecf13 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
@@ -9,7 +9,7 @@ title: MediaTek MT65xx Pin Controller
maintainers:
- Sean Wang <[email protected]>
-description: |+
+description:
The MediaTek's MT65xx Pin controller is used to control SoC pins.
properties:
@@ -30,7 +30,7 @@ properties:
pins-are-numbered:
$ref: /schemas/types.yaml#/definitions/flag
- description: |
+ description:
Specify the subnodes are using numbered pinmux to specify pins. (UNUSED)
deprecated: true
@@ -38,10 +38,10 @@ properties:
"#gpio-cells":
const: 2
- description: |
- Number of cells in GPIO specifier. Since the generic GPIO
- binding is used, the amount of cells must be specified as 2. See the below
- mentioned gpio binding representation for description of particular cells.
+ description:
+ Number of cells in GPIO specifier. Since the generic GPIO binding is used,
+ the amount of cells must be specified as 2. See the below mentioned gpio
+ binding representation for description of particular cells.
mediatek,pctl-regmap:
$ref: /schemas/types.yaml#/definitions/phandle-array
@@ -49,7 +49,7 @@ properties:
maxItems: 1
minItems: 1
maxItems: 2
- description: |
+ description:
Should be phandles of the syscfg node.
interrupt-controller: true
@@ -77,7 +77,7 @@ patternProperties:
'(^pins|pins?$)':
type: object
additionalProperties: false
- description: |
+ description:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
@@ -95,7 +95,7 @@ patternProperties:
bias-disable: true
bias-pull-up:
- description: |
+ description:
Besides generic pinconfig options, it can be used as the pull up
settings for 2 pull resistors, R0 and R1. User can configure those
special pins. Some macros have been defined for this usage, such
@@ -117,7 +117,7 @@ patternProperties:
input-schmitt-disable: true
drive-strength:
- description: |
+ description:
Can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA,
etc. See dt-bindings/pinctrl/mt65xx.h for valid arguments.
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
index c2fea29fa02f..17046d204087 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
@@ -11,8 +11,8 @@ maintainers:
- Sean Wang <[email protected]>
description:
- The MediaTek pin controller on MT6779 is used to control pin
- functions, pull up/down resistance and drive strength options.
+ The MediaTek pin controller on MT6779 is used to control pin functions, pull
+ up/down resistance and drive strength options.
properties:
compatible:
@@ -29,22 +29,22 @@ properties:
"#gpio-cells":
const: 2
- description: |
- Number of cells in GPIO specifier. Since the generic GPIO
- binding is used, the amount of cells must be specified as 2. See the below
- mentioned gpio binding representation for description of particular cells.
+ description:
+ Number of cells in GPIO specifier. Since the generic GPIO binding is used,
+ the amount of cells must be specified as 2. See the below mentioned gpio
+ binding representation for description of particular cells.
gpio-ranges:
minItems: 1
maxItems: 5
- description: |
+ description:
GPIO valid number range.
interrupt-controller: true
interrupts:
maxItems: 1
- description: |
+ description:
Specifies the summary IRQ.
"#interrupt-cells":
@@ -118,19 +118,20 @@ patternProperties:
patternProperties:
'-pins*$':
type: object
- description: |
+ description:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
- configuration, pullups, drive strength, input enable/disable and input schmitt.
+ configuration, pullups, drive strength, input enable/disable and input
+ schmitt.
$ref: "/schemas/pinctrl/pincfg-node.yaml"
properties:
pinmux:
description:
integer array, represents gpio pin number and mux setting.
- Supported pin number and mux varies for different SoCs, and are defined
- as macros in boot/dts/<soc>-pinfunc.h directly.
+ Supported pin number and mux varies for different SoCs, and are
+ defined as macros in boot/dts/<soc>-pinfunc.h directly.
bias-disable: true
@@ -159,7 +160,8 @@ patternProperties:
mediatek,pull-up-adv:
description: |
Pull up setings for 2 pull resistors, R0 and R1. User can
- configure those special pins. Valid arguments are described as below:
+ configure those special pins. Valid arguments are described as
+ below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@@ -170,7 +172,8 @@ patternProperties:
mediatek,pull-down-adv:
description: |
Pull down settings for 2 pull resistors, R0 and R1. User can
- configure those special pins. Valid arguments are described as below:
+ configure those special pins. Valid arguments are described as
+ below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
index a78df32e6c39..5bd78e88fea3 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
@@ -10,7 +10,7 @@ maintainers:
- AngeloGioacchino Del Regno <[email protected]>
- Sean Wang <[email protected]>
-description: |
+description:
The MediaTek's MT6795 Pin controller is used to control SoC pins.
properties:
@@ -22,8 +22,8 @@ properties:
'#gpio-cells':
description: |
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
- the amount of cells must be specified as 2. See the below
- mentioned gpio binding representation for description of particular cells.
+ the amount of cells must be specified as 2. See the below mentioned gpio
+ binding representation for description of particular cells.
const: 2
gpio-ranges:
@@ -65,8 +65,8 @@ patternProperties:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
- configuration, pullups, drive strength, input enable/disable and
- input schmitt.
+ configuration, pullups, drive strength, input enable/disable and input
+ schmitt.
An example of using macro:
pincontroller {
/* GPIO0 set as multifunction GPIO0 */
@@ -86,11 +86,10 @@ patternProperties:
properties:
pinmux:
- description: |
+ description:
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
- defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h
- directly.
+ defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
@@ -100,7 +99,7 @@ patternProperties:
- type: boolean
- enum: [100, 101, 102, 103]
description: mt6795 pull down PUPD/R0/R1 type define value.
- description: |
+ description:
For normal pull down type, it is not necessary to specify R1R0
values; When pull down type is PUPD/R0/R1, adding R1R0 defines
will set different resistance values.
@@ -110,10 +109,10 @@ patternProperties:
- type: boolean
- enum: [100, 101, 102, 103]
description: mt6795 pull up PUPD/R0/R1 type define value.
- description: |
+ description:
For normal pull up type, it is not necessary to specify R1R0
- values; When pull up type is PUPD/R0/R1, adding R1R0 defines
- will set different resistance values.
+ values; When pull up type is PUPD/R0/R1, adding R1R0 defines will
+ set different resistance values.
bias-disable: true
@@ -132,7 +131,8 @@ patternProperties:
mediatek,pull-up-adv:
description: |
Pull up setings for 2 pull resistors, R0 and R1. User can
- configure those special pins. Valid arguments are described as below:
+ configure those special pins. Valid arguments are described as
+ below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@@ -143,7 +143,8 @@ patternProperties:
mediatek,pull-down-adv:
description: |
Pull down settings for 2 pull resistors, R0 and R1. User can
- configure those special pins. Valid arguments are described as below:
+ configure those special pins. Valid arguments are described as
+ below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
index 1c9ca0bf9750..11530b29d52b 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
@@ -10,7 +10,7 @@ maintainers:
- Arınç ÜNAL <[email protected]>
- Sergio Paracuellos <[email protected]>
-description:
+description: |
MediaTek MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs.
The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support.
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml
index 717c948951be..36300271edb1 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml
@@ -10,7 +10,7 @@ maintainers:
- Arınç ÜNAL <[email protected]>
- Sergio Paracuellos <[email protected]>
-description:
+description: |
MediaTek MT7621 pin controller for MT7621 SoC.
The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support.
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
index 3531b63ca4bf..740a26e1ede1 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
@@ -9,7 +9,7 @@ title: MediaTek MT7622 Pin Controller
maintainers:
- Sean Wang <[email protected]>
-description: |+
+description:
The MediaTek's MT7622 Pin controller is used to control SoC pins.
properties:
@@ -29,10 +29,10 @@ properties:
"#gpio-cells":
const: 2
- description: |
- Number of cells in GPIO specifier. Since the generic GPIO
- binding is used, the amount of cells must be specified as 2. See the below
- mentioned gpio binding representation for description of particular cells.
+ description:
+ Number of cells in GPIO specifier. Since the generic GPIO binding is used,
+ the amount of cells must be specified as 2. See the below mentioned gpio
+ binding representation for description of particular cells.
interrupt-controller: true
@@ -68,18 +68,18 @@ patternProperties:
'^mux(-|$)':
type: object
additionalProperties: false
- description: |
+ description:
pinmux configuration nodes.
$ref: "/schemas/pinctrl/pinmux-node.yaml"
properties:
function:
- description: |
+ description:
A string containing the name of the function to mux to the group.
enum: [emmc, eth, i2c, i2s, ir, led, flash, pcie, pmic, pwm, sd,
spi, tdm, uart, watchdog, wifi]
groups:
- description: |
+ description:
An array of strings. Each string contains the name of a group.
drive-strength:
@@ -247,7 +247,7 @@ patternProperties:
'^conf(-|$)':
type: object
additionalProperties: false
- description: |
+ description:
pinconf configuration nodes.
$ref: "/schemas/pinctrl/pincfg-node.yaml"
@@ -258,7 +258,7 @@ patternProperties:
Valid values are the same as the pinmux node.
pins:
- description: |
+ description:
An array of strings. Each string contains the name of a pin.
enum: [GPIO_A, I2S1_IN, I2S1_OUT, I2S_BCLK, I2S_WS, I2S_MCLK, TXD0,
RXD0, SPI_WP, SPI_HOLD, SPI_CLK, SPI_MOSI, SPI_MISO, SPI_CS,
@@ -315,14 +315,14 @@ patternProperties:
enum: [0, 1]
mediatek,tdsel:
- description: |
+ description:
An integer describing the steps for output level shifter duty
cycle when asserted (high pulse width adjustment). Valid arguments
are from 0 to 15.
$ref: /schemas/types.yaml#/definitions/uint32
mediatek,rdsel:
- description: |
+ description:
An integer describing the steps for input level shifter duty cycle
when asserted (high pulse width adjustment). Valid arguments are
from 0 to 63.
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml
index c3373290a8a1..10717cee9058 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml
@@ -37,7 +37,7 @@ properties:
"#gpio-cells":
const: 2
- description: >
+ description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells.
@@ -111,7 +111,9 @@ patternProperties:
"watchdog1" "watchdog" 13
"udi" "udi" 9, 10, 11, 12, 13
"drv_vbus" "usb" 14
- "emmc_45" "flash" 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25
+ "emmc_45" "flash" 15, 16, 17, 18, 19, 20, 21, 22, 23,
+ 24, 25
+
"snfi" "flash" 16, 17, 18, 19, 20, 21
"spi0" "spi" 16, 17, 18, 19
"spi0_wp_hold" "spi" 20, 21
@@ -148,7 +150,7 @@ patternProperties:
"wf5g_led0" "led" 31
"wf5g_led1" "led" 35
"mt7531_int" "eth" 38
- "ant_sel" "ant" 14, 15, 16, 17, 18, 19, 20, 21, 22
+ "ant_sel" "ant" 14, 15, 16, 17, 18, 19, 20, 21, 22,
23, 24, 25, 34, 35
$ref: /schemas/pinctrl/pinmux-node.yaml
@@ -256,7 +258,8 @@ patternProperties:
then:
properties:
groups:
- enum: [gbe_led0, gbe_led1, wf2g_led0, wf2g_led1, wf5g_led0, wf5g_led1]
+ enum: [gbe_led0, gbe_led1, wf2g_led0, wf2g_led1, wf5g_led0,
+ wf5g_led1]
- if:
properties:
function:
@@ -275,7 +278,8 @@ patternProperties:
properties:
groups:
items:
- enum: [spi1_0, spi0, spi0_wp_hold, spi1_1, spi2, spi2_wp_hold]
+ enum: [spi1_0, spi0, spi0_wp_hold, spi1_1, spi2,
+ spi2_wp_hold]
maxItems: 4
- if:
properties:
@@ -332,13 +336,14 @@ patternProperties:
JTAG_JTDO, JTAG_JTDI, JTAG_JTMS, JTAG_JTCLK, JTAG_JTRST_N,
WO_JTAG_JTDO, WO_JTAG_JTDI, WO_JTAG_JTMS, WO_JTAG_JTCLK,
WO_JTAG_JTRST_N, USB_VBUS, PWM0, SPI0_CLK, SPI0_MOSI,
- SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI,
- SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS,
- SPI2_HOLD, SPI2_WP, UART0_RXD, UART0_TXD, PCIE_CLK_REQ,
- PCIE_WAKE_N, SMI_MDC, SMI_MDIO, GBE_INT, GBE_RESET,
- WF_DIG_RESETB, WF_CBA_RESETB, WF_XO_REQ, WF_TOP_CLK,
- WF_TOP_DATA, WF_HB1, WF_HB2, WF_HB3, WF_HB4, WF_HB0,
- WF_HB0_B, WF_HB5, WF_HB6, WF_HB7, WF_HB8, WF_HB9, WF_HB10]
+ SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK,
+ SPI1_MOSI, SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI,
+ SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP, UART0_RXD,
+ UART0_TXD, PCIE_CLK_REQ, PCIE_WAKE_N, SMI_MDC, SMI_MDIO,
+ GBE_INT, GBE_RESET, WF_DIG_RESETB, WF_CBA_RESETB,
+ WF_XO_REQ, WF_TOP_CLK, WF_TOP_DATA, WF_HB1, WF_HB2, WF_HB3,
+ WF_HB4, WF_HB0, WF_HB0_B, WF_HB5, WF_HB6, WF_HB7, WF_HB8,
+ WF_HB9, WF_HB10]
maxItems: 57
bias-disable: true
@@ -348,7 +353,7 @@ patternProperties:
- type: boolean
description: normal pull up.
- enum: [100, 101, 102, 103]
- description: >
+ description:
PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
dt-bindings/pinctrl/mt65xx.h.
@@ -357,7 +362,7 @@ patternProperties:
- type: boolean
description: normal pull down.
- enum: [100, 101, 102, 103]
- description: >
+ description:
PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
dt-bindings/pinctrl/mt65xx.h.
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
index 71033831d03d..6d7dd19cad4c 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
@@ -9,7 +9,7 @@ title: MediaTek MT7986 Pin Controller
maintainers:
- Sean Wang <[email protected]>
-description: |+
+description:
The MediaTek's MT7986 Pin controller is used to control SoC pins.
properties:
@@ -37,15 +37,15 @@ properties:
"#gpio-cells":
const: 2
- description: |
- Number of cells in GPIO specifier. Since the generic GPIO
- binding is used, the amount of cells must be specified as 2. See the below
- mentioned gpio binding representation for description of particular cells.
+ description:
+ Number of cells in GPIO specifier. Since the generic GPIO binding is used,
+ the amount of cells must be specified as 2. See the below mentioned gpio
+ binding representation for description of particular cells.
gpio-ranges:
minItems: 1
maxItems: 5
- description: |
+ description:
GPIO valid number range.
interrupt-controller: true
@@ -81,7 +81,7 @@ patternProperties:
The following table shows the effective values of "group", "function"
properties and chip pinout pins
- groups function pins (in pin#)
+ groups function pins (in pin#)
---------------------------------------------------------------------
"watchdog" "watchdog" 0
"wifi_led" "led" 1, 2
@@ -97,8 +97,9 @@ patternProperties:
"pwm1_0" "pwm" 22,
"snfi" "flash" 23, 24, 25, 26, 27, 28
"spi1_2" "spi" 29, 30, 31, 32
- "emmc_45" "emmc" 22, 23, 24, 25, 26, 27, 28, 29, 30,
- 31, 32
+ "emmc_45" "emmc" 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+ 32
+
"spi1_1" "spi" 23, 24, 25, 26
"uart1_2_rx_tx" "uart" 29, 30
"uart1_2_cts_rts" "uart" 31, 32
@@ -115,8 +116,9 @@ patternProperties:
"pcie_pereset" "pcie" 41
"uart1" "uart" 42, 43, 44, 45
"uart2" "uart" 46, 47, 48, 49
- "emmc_51" "emmc" 50, 51, 52, 53, 54, 55, 56, 57, 57,
- 59, 60, 61
+ "emmc_51" "emmc" 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
+ 60, 61
+
"pcm" "audio" 62, 63, 64, 65
"i2s" "audio" 62, 63, 64, 65
"switch_int" "eth" 66
@@ -129,18 +131,17 @@ patternProperties:
$ref: "/schemas/pinctrl/pinmux-node.yaml"
properties:
function:
- description: |
+ description:
A string containing the name of the function to mux to the group.
There is no "audio", "pcie" functions on mt7986b, you can only use
those functions on mt7986a.
enum: [audio, emmc, eth, i2c, led, flash, pcie, pwm, spi, uart,
watchdog, wifi]
groups:
- description: |
+ description:
An array of strings. Each string contains the name of a group.
- There is no "pcie_pereset", "uart1", "uart2" "emmc_51", "pcm",
- and "i2s" groups on mt7986b, you can only use those groups on
- mt7986a.
+ There is no "pcie_pereset", "uart1", "uart2" "emmc_51", "pcm", and
+ "i2s" groups on mt7986b, you can only use those groups on mt7986a.
required:
- function
- groups
@@ -258,7 +259,7 @@ patternProperties:
'.*conf.*':
type: object
additionalProperties: false
- description: |
+ description:
pinconf configuration nodes.
$ref: "/schemas/pinctrl/pincfg-node.yaml"
@@ -271,16 +272,17 @@ patternProperties:
items:
enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
- GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
- GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
- SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
- SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
- UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
- UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
- UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
- EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
- EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
- PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
+ GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13,
+ GPIO_14, GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI,
+ SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK,
+ SPI1_MOSI, SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI,
+ SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP, UART0_RXD,
+ UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD, UART1_CTS,
+ UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS, UART2_RTS,
+ EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2, EMMC_DATA_3,
+ EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6, EMMC_DATA_7,
+ EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX, PCM_DRX,
+ PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
@@ -297,7 +299,7 @@ patternProperties:
- type: boolean
description: normal pull up.
- enum: [100, 101, 102, 103]
- description: |
+ description:
PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
dt-bindings/pinctrl/mt65xx.h.
@@ -306,7 +308,7 @@ patternProperties:
- type: boolean
description: normal pull down.
- enum: [100, 101, 102, 103]
- description: |
+ description:
PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
dt-bindings/pinctrl/mt65xx.h.
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
index 3e34b03e11fc..3b1be7949e8c 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
@@ -9,7 +9,7 @@ title: MediaTek MT8183 Pin Controller
maintainers:
- Sean Wang <[email protected]>
-description: |+
+description:
The MediaTek's MT8183 Pin controller is used to control SoC pins.
properties:
@@ -37,15 +37,15 @@ properties:
"#gpio-cells":
const: 2
- description: |
- Number of cells in GPIO specifier. Since the generic GPIO
- binding is used, the amount of cells must be specified as 2. See the below
- mentioned gpio binding representation for description of particular cells.
+ description:
+ Number of cells in GPIO specifier. Since the generic GPIO binding is used,
+ the amount of cells must be specified as 2. See the below mentioned gpio
+ binding representation for description of particular cells.
gpio-ranges:
minItems: 1
maxItems: 5
- description: |
+ description:
GPIO valid number range.
interrupt-controller: true
@@ -74,7 +74,7 @@ patternProperties:
'^pins':
type: object
additionalProperties: false
- description: |
+ description:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
@@ -139,7 +139,8 @@ patternProperties:
mediatek,pull-up-adv:
description: |
Pull up setings for 2 pull resistors, R0 and R1. User can
- configure those special pins. Valid arguments are described as below:
+ configure those special pins. Valid arguments are described as
+ below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@@ -150,7 +151,8 @@ patternProperties:
mediatek,pull-down-adv:
description: |
Pull down settings for 2 pull resistors, R0 and R1. User can
- configure those special pins. Valid arguments are described as below:
+ configure those special pins. Valid arguments are described as
+ below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@@ -159,14 +161,14 @@ patternProperties:
enum: [0, 1, 2, 3]
mediatek,tdsel:
- description: |
+ description:
An integer describing the steps for output level shifter duty
cycle when asserted (high pulse width adjustment). Valid arguments
are from 0 to 15.
$ref: /schemas/types.yaml#/definitions/uint32
mediatek,rdsel:
- description: |
+ description:
An integer describing the steps for input level shifter duty cycle
when asserted (high pulse width adjustment). Valid arguments are
from 0 to 63.
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
index a0519acc92fe..c7abc13a167d 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
@@ -9,7 +9,7 @@ title: MediaTek MT8186 Pin Controller
maintainers:
- Sean Wang <[email protected]>
-description: |
+description:
The MediaTek's MT8186 Pin controller is used to control SoC pins.
properties:
@@ -19,10 +19,10 @@ properties:
gpio-controller: true
'#gpio-cells':
- description: |
+ description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
- the amount of cells must be specified as 2. See the below
- mentioned gpio binding representation for description of particular cells.
+ the amount of cells must be specified as 2. See the below mentioned gpio
+ binding representation for description of particular cells.
const: 2
gpio-ranges:
@@ -31,13 +31,13 @@ properties:
gpio-line-names: true
reg:
- description: |
+ description:
Physical address base for gpio base registers. There are 8 different GPIO
physical address base in mt8186.
maxItems: 8
reg-names:
- description: |
+ description:
Gpio base register names.
items:
- const: iocfg0
@@ -60,9 +60,9 @@ properties:
mediatek,rsel-resistance-in-si-unit:
type: boolean
- description: |
- Identifying i2c pins pull up/down type which is RSEL. It can support
- RSEL define or si unit value(ohm) to set different resistance.
+ description:
+ Identifying i2c pins pull up/down type which is RSEL. It can support RSEL
+ define or si unit value(ohm) to set different resistance.
# PIN CONFIGURATION NODES
patternProperties:
@@ -77,8 +77,8 @@ patternProperties:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
- configuration, pullups, drive strength, input enable/disable and
- input schmitt.
+ configuration, pullups, drive strength, input enable/disable and input
+ schmitt.
An example of using macro:
pincontroller {
/* GPIO0 set as multifunction GPIO0 */
@@ -98,11 +98,10 @@ patternProperties:
properties:
pinmux:
- description: |
+ description:
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
- defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h
- directly.
+ defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
@@ -129,10 +128,10 @@ patternProperties:
For pull down type is RSEL, it can add RSEL define & resistance
value(ohm) to set different resistance by identifying property
"mediatek,rsel-resistance-in-si-unit".
- It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
- & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011"
- define in mt8186. It can also support resistance value(ohm)
- "75000" & "5000" in mt8186.
+ It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" &
+ "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" define in
+ mt8186. It can also support resistance value(ohm) "75000" & "5000"
+ in mt8186.
An example of using RSEL define:
pincontroller {
i2c0_pin {
@@ -174,10 +173,10 @@ patternProperties:
For pull up type is RSEL, it can add RSEL define & resistance
value(ohm) to set different resistance by identifying property
"mediatek,rsel-resistance-in-si-unit".
- It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
- & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011"
- define in mt8186. It can also support resistance value(ohm)
- "1000" & "5000" & "10000" & "75000" in mt8186.
+ It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" &
+ "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" define in
+ mt8186. It can also support resistance value(ohm) "1000" & "5000"
+ & "10000" & "75000" in mt8186.
An example of using si unit resistance value(ohm):
&pio {
mediatek,rsel-resistance-in-si-unit;
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml
index 7e750f1e643d..51b3d1247614 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml
@@ -9,7 +9,7 @@ title: MediaTek MT8188 Pin Controller
maintainers:
- Hui Liu <[email protected]>
-description: |
+description:
The MediaTek's MT8188 Pin controller is used to control SoC pins.
properties:
@@ -19,10 +19,10 @@ properties:
gpio-controller: true
'#gpio-cells':
- description: |
- Number of cells in GPIO specifier, should be two. The first cell
- is the pin number, the second cell is used to specify optional
- parameters which are defined in <dt-bindings/gpio/gpio.h>.
+ description:
+ Number of cells in GPIO specifier, should be two. The first cell is the
+ pin number, the second cell is used to specify optional parameters which
+ are defined in <dt-bindings/gpio/gpio.h>.
const: 2
gpio-ranges:
@@ -59,10 +59,11 @@ properties:
mediatek,rsel-resistance-in-si-unit:
type: boolean
- description: |
- We provide two methods to select the resistance for I2C when pull up or pull down.
- The first is by RSEL definition value, another one is by resistance value(ohm).
- This flag is used to identify if the method is resistance(si unit) value.
+ description:
+ We provide two methods to select the resistance for I2C when pull up or
+ pull down. The first is by RSEL definition value, another one is by
+ resistance value(ohm). This flag is used to identify if the method is
+ resistance(si unit) value.
# PIN CONFIGURATION NODES
patternProperties:
@@ -75,16 +76,16 @@ patternProperties:
type: object
$ref: "/schemas/pinctrl/pincfg-node.yaml"
additionalProperties: false
- description: |
+ description:
A pinctrl node should contain at least one subnode representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
- configuration, pullups, drive strength, input enable/disable and
- input schmitt.
+ configuration, pullups, drive strength, input enable/disable and input
+ schmitt.
properties:
pinmux:
- description: |
+ description:
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/mediatek,<soc>-pinfunc.h
@@ -106,18 +107,21 @@ patternProperties:
- enum: [75000, 5000]
description: mt8188 pull down RSEL type si unit value(ohm).
description: |
- For pull down type is normal, it doesn't need add RSEL & R1R0 define
- and resistance value.
+ For pull down type is normal, it doesn't need add RSEL & R1R0
+ define and resistance value.
For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
- "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
- define in mt8188.
- For pull down type is RSEL, it can add RSEL define & resistance value(ohm)
- to set different resistance by identifying property "mediatek,rsel-resistance-in-si-unit".
- It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
- & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100"
- & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
- define in mt8188. It can also support resistance value(ohm) "75000" & "5000" in mt8188.
+ "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
+ "MTK_PUPD_SET_R1R0_11" define in mt8188.
+ For pull down type is RSEL, it can add RSEL define & resistance
+ value(ohm) to set different resistance by identifying property
+ "mediatek,rsel-resistance-in-si-unit". It can support
+ "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" &
+ "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
+ "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" &
+ "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" define in
+ mt8188. It can also support resistance value(ohm) "75000" & "5000"
+ in mt8188.
bias-pull-up:
oneOf:
@@ -131,17 +135,19 @@ patternProperties:
description: |
For pull up type is normal, it don't need add RSEL & R1R0 define
and resistance value.
- For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
- set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
- "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
- define in mt8188.
- For pull up type is RSEL, it can add RSEL define & resistance value(ohm)
- to set different resistance by identifying property "mediatek,rsel-resistance-in-si-unit".
- It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
- & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100"
- & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
- define in mt8188. It can also support resistance value(ohm)
- "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8188.
+ For pull up type is PUPD/R0/R1 type, it can add R1R0 define to set
+ different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+ "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
+ "MTK_PUPD_SET_R1R0_11" define in mt8188.
+ For pull up type is RSEL, it can add RSEL define & resistance
+ value(ohm) to set different resistance by identifying property
+ "mediatek,rsel-resistance-in-si-unit". It can support
+ "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" &
+ "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
+ "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" &
+ "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" define in
+ mt8188. It can also support resistance value(ohm) "1000" & "1500"
+ & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8188.
bias-disable: true
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
index 3c3dd142a989..88a466769938 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
@@ -9,7 +9,7 @@ title: MediaTek MT8192 Pin Controller
maintainers:
- Sean Wang <[email protected]>
-description: |
+description:
The MediaTek's MT8192 Pin controller is used to control SoC pins.
properties:
@@ -19,10 +19,10 @@ properties:
gpio-controller: true
'#gpio-cells':
- description: |
+ description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
- the amount of cells must be specified as 2. See the below
- mentioned gpio binding representation for description of particular cells.
+ the amount of cells must be specified as 2. See the below mentioned gpio
+ binding representation for description of particular cells.
const: 2
gpio-ranges:
@@ -32,13 +32,13 @@ properties:
gpio-line-names: true
reg:
- description: |
- Physical address base for gpio base registers. There are 11 GPIO
- physical address base in mt8192.
+ description:
+ Physical address base for gpio base registers. There are 11 GPIO physical
+ address base in mt8192.
maxItems: 11
reg-names:
- description: |
+ description:
Gpio base register names.
maxItems: 11
@@ -59,25 +59,26 @@ patternProperties:
patternProperties:
'^pins':
type: object
- description: |
+ description:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
- configuration, pullups, drive strength, input enable/disable and
- input schmitt.
+ configuration, pullups, drive strength, input enable/disable and input
+ schmitt.
$ref: "pinmux-node.yaml"
properties:
pinmux:
- description: |
+ description:
Integer array, represents gpio pin number and mux setting.
- Supported pin number and mux varies for different SoCs, and are defined
- as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
+ Supported pin number and mux varies for different SoCs, and are
+ defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
drive-strength:
- description: |
- It can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See
- dt-bindings/pinctrl/mt65xx.h. It can only support 2/4/6/8/10/12/14/16mA in mt8192.
+ description:
+ It can support some arguments, such as MTK_DRIVE_4mA,
+ MTK_DRIVE_6mA, etc. See dt-bindings/pinctrl/mt65xx.h. It can only
+ support 2/4/6/8/10/12/14/16mA in mt8192.
enum: [2, 4, 6, 8, 10, 12, 14, 16]
drive-strength-microamp:
@@ -91,8 +92,8 @@ patternProperties:
description: PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0_
defines in dt-bindings/pinctrl/mt65xx.h.
- enum: [200, 201, 202, 203]
- description: RSEL pull down type. See MTK_PULL_SET_RSEL_
- defines in dt-bindings/pinctrl/mt65xx.h.
+ description: RSEL pull down type. See MTK_PULL_SET_RSEL_ defines
+ in dt-bindings/pinctrl/mt65xx.h.
bias-pull-up:
oneOf:
@@ -102,8 +103,8 @@ patternProperties:
description: PUPD/R1/R0 pull up type. See MTK_PUPD_SET_R1R0_
defines in dt-bindings/pinctrl/mt65xx.h.
- enum: [200, 201, 202, 203]
- description: RSEL pull up type. See MTK_PULL_SET_RSEL_
- defines in dt-bindings/pinctrl/mt65xx.h.
+ description: RSEL pull up type. See MTK_PULL_SET_RSEL_ defines
+ in dt-bindings/pinctrl/mt65xx.h.
bias-disable: true
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
index d4d5357cdd1d..c1c8c99ba139 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
@@ -9,7 +9,7 @@ title: MediaTek MT8195 Pin Controller
maintainers:
- Sean Wang <[email protected]>
-description: |
+description:
The MediaTek's MT8195 Pin controller is used to control SoC pins.
properties:
@@ -19,10 +19,10 @@ properties:
gpio-controller: true
'#gpio-cells':
- description: |
+ description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used,
- the amount of cells must be specified as 2. See the below
- mentioned gpio binding representation for description of particular cells.
+ the amount of cells must be specified as 2. See the below mentioned gpio
+ binding representation for description of particular cells.
const: 2
gpio-ranges:
@@ -32,13 +32,13 @@ properties:
gpio-line-names: true
reg:
- description: |
- Physical address base for gpio base registers. There are 8 GPIO
- physical address base in mt8195.
+ description:
+ Physical address base for gpio base registers. There are 8 GPIO physical
+ address base in mt8195.
maxItems: 8
reg-names:
- description: |
+ description:
Gpio base register names.
maxItems: 8
@@ -53,9 +53,9 @@ properties:
mediatek,rsel-resistance-in-si-unit:
type: boolean
- description: |
- Identifying i2c pins pull up/down type which is RSEL. It can support
- RSEL define or si unit value(ohm) to set different resistance.
+ description:
+ Identifying i2c pins pull up/down type which is RSEL. It can support RSEL
+ define or si unit value(ohm) to set different resistance.
# PIN CONFIGURATION NODES
patternProperties:
@@ -70,8 +70,8 @@ patternProperties:
A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
- configuration, pullups, drive strength, input enable/disable and
- input schmitt.
+ configuration, pullups, drive strength, input enable/disable and input
+ schmitt.
An example of using macro:
pincontroller {
/* GPIO0 set as multifunction GPIO0 */
@@ -91,7 +91,7 @@ patternProperties:
properties:
pinmux:
- description: |
+ description:
Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h
@@ -174,9 +174,9 @@ patternProperties:
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011"
& "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101"
& "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
- define in mt8195. It can also support resistance value(ohm)
- "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" &
- "75000" in mt8195.
+ define in mt8195. It can also support resistance value(ohm) "1000"
+ & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000"
+ in mt8195.
An example of using RSEL define:
pincontroller {
i2c0-pins {
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
index 42964dfa9fdb..1cd9d6e55866 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
@@ -10,7 +10,7 @@ maintainers:
- Zhiyong Tao <[email protected]>
- Bernhard Rosenkränzer <[email protected]>
-description: |
+description:
The MediaTek's MT8365 Pin controller is used to control SoC pins.
properties:
@@ -26,17 +26,17 @@ properties:
maxItems: 1
minItems: 1
maxItems: 2
- description: |
+ description:
Should be phandles of the syscfg node.
gpio-controller: true
"#gpio-cells":
const: 2
- description: |
- Number of cells in GPIO specifier. Since the generic GPIO
- binding is used, the amount of cells must be specified as 2. See the below
- mentioned gpio binding representation for description of particular cells.
+ description:
+ Number of cells in GPIO specifier. Since the generic GPIO binding is used,
+ the amount of cells must be specified as 2. See the below mentioned gpio
+ binding representation for description of particular cells.
interrupt-controller: true
@@ -54,7 +54,7 @@ patternProperties:
"pins$":
type: object
additionalProperties: false
- description: |
+ description:
A pinctrl node should contain at least one subnode representing the
pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer
@@ -72,7 +72,7 @@ patternProperties:
bias-disable: true
bias-pull-up:
- description: |
+ description:
Besides generic pinconfig options, it can be used as the pull up
settings for 2 pull resistors, R0 and R1. User can configure those
special pins.
@@ -120,7 +120,8 @@ patternProperties:
mediatek,pull-up-adv:
description: |
Pull up setings for 2 pull resistors, R0 and R1. User can
- configure those special pins. Valid arguments are described as below:
+ configure those special pins. Valid arguments are described as
+ below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@@ -131,7 +132,8 @@ patternProperties:
mediatek,pull-down-adv:
description: |
Pull down settings for 2 pull resistors, R0 and R1. User can
- configure those special pins. Valid arguments are described as below:
+ configure those special pins. Valid arguments are described as
+ below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@@ -140,14 +142,14 @@ patternProperties:
enum: [0, 1, 2, 3]
mediatek,tdsel:
- description: |
+ description:
An integer describing the steps for output level shifter duty
cycle when asserted (high pulse width adjustment). Valid arguments
are from 0 to 15.
$ref: /schemas/types.yaml#/definitions/uint32
mediatek,rdsel:
- description: |
+ description:
An integer describing the steps for input level shifter duty cycle
when asserted (high pulse width adjustment). Valid arguments are
from 0 to 63.
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml
index e51667316b2e..43b33dbf115b 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml
@@ -10,7 +10,7 @@ maintainers:
- Arınç ÜNAL <[email protected]>
- Sergio Paracuellos <[email protected]>
-description:
+description: |
Ralink RT2880 pin controller for RT2880 SoC.
The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support.
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
index 23fb82f9959c..55c6f9826e76 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
@@ -10,7 +10,7 @@ maintainers:
- Arınç ÜNAL <[email protected]>
- Sergio Paracuellos <[email protected]>
-description:
+description: |
Ralink RT305X pin controller for RT3050, RT3052, RT3350, RT3352 and RT5350
SoCs.
The pin controller can only set the muxing of pin groups. Muxing individual
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml
index adc4f42a175d..8d14e525b25e 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml
@@ -10,7 +10,7 @@ maintainers:
- Arınç ÜNAL <[email protected]>
- Sergio Paracuellos <[email protected]>
-description:
+description: |
Ralink RT3883 pin controller for RT3883 SoC.
The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support.
--
2.37.2
From: Arınç ÜNAL <[email protected]>
Drop the quotes from the referred schemas.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
.../bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml | 4 ++--
.../bindings/pinctrl/mediatek,mt6779-pinctrl.yaml | 4 ++--
.../bindings/pinctrl/mediatek,mt6795-pinctrl.yaml | 4 ++--
.../bindings/pinctrl/mediatek,mt7622-pinctrl.yaml | 6 +++---
.../bindings/pinctrl/mediatek,mt7986-pinctrl.yaml | 6 +++---
.../bindings/pinctrl/mediatek,mt8183-pinctrl.yaml | 4 ++--
.../bindings/pinctrl/mediatek,mt8186-pinctrl.yaml | 2 +-
.../bindings/pinctrl/mediatek,mt8188-pinctrl.yaml | 2 +-
.../bindings/pinctrl/mediatek,mt8192-pinctrl.yaml | 4 ++--
.../bindings/pinctrl/mediatek,mt8195-pinctrl.yaml | 4 ++--
10 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
index 3191d08ecf13..66633810f7b8 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
@@ -67,7 +67,7 @@ required:
- "#gpio-cells"
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
patternProperties:
'pins$':
@@ -83,7 +83,7 @@ patternProperties:
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and input
schmitt.
- $ref: "/schemas/pinctrl/pincfg-node.yaml"
+ $ref: /schemas/pinctrl/pincfg-node.yaml
properties:
pinmux:
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
index 17046d204087..a795beec56ec 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
@@ -58,7 +58,7 @@ required:
- "#gpio-cells"
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
- if:
properties:
compatible:
@@ -124,7 +124,7 @@ patternProperties:
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and input
schmitt.
- $ref: "/schemas/pinctrl/pincfg-node.yaml"
+ $ref: /schemas/pinctrl/pincfg-node.yaml
properties:
pinmux:
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
index 5bd78e88fea3..52f30ed1a611 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
@@ -82,7 +82,7 @@ patternProperties:
}
};
};
- $ref: "pinmux-node.yaml"
+ $ref: pinmux-node.yaml
properties:
pinmux:
@@ -156,7 +156,7 @@ patternProperties:
- pinmux
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
required:
- compatible
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
index 740a26e1ede1..f761751251a1 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
@@ -43,7 +43,7 @@ properties:
const: 2
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
required:
- compatible
@@ -70,7 +70,7 @@ patternProperties:
additionalProperties: false
description:
pinmux configuration nodes.
- $ref: "/schemas/pinctrl/pinmux-node.yaml"
+ $ref: /schemas/pinctrl/pinmux-node.yaml
properties:
function:
description:
@@ -249,7 +249,7 @@ patternProperties:
additionalProperties: false
description:
pinconf configuration nodes.
- $ref: "/schemas/pinctrl/pincfg-node.yaml"
+ $ref: /schemas/pinctrl/pincfg-node.yaml
properties:
groups:
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
index 6d7dd19cad4c..46b7228920ed 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
@@ -57,7 +57,7 @@ properties:
const: 2
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
required:
- compatible
@@ -128,7 +128,7 @@ patternProperties:
"wf_dbdc" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83,
84, 85
- $ref: "/schemas/pinctrl/pinmux-node.yaml"
+ $ref: /schemas/pinctrl/pinmux-node.yaml
properties:
function:
description:
@@ -261,7 +261,7 @@ patternProperties:
additionalProperties: false
description:
pinconf configuration nodes.
- $ref: "/schemas/pinctrl/pincfg-node.yaml"
+ $ref: /schemas/pinctrl/pincfg-node.yaml
properties:
pins:
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
index 3b1be7949e8c..cc10a9850af5 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
@@ -57,7 +57,7 @@ properties:
const: 2
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
required:
- compatible
@@ -80,7 +80,7 @@ patternProperties:
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and input
schmitt.
- $ref: "/schemas/pinctrl/pincfg-node.yaml"
+ $ref: /schemas/pinctrl/pincfg-node.yaml
properties:
pinmux:
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
index c7abc13a167d..90998f78bd07 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
@@ -94,7 +94,7 @@ patternProperties:
}
};
};
- $ref: "pinmux-node.yaml"
+ $ref: pinmux-node.yaml
properties:
pinmux:
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml
index 51b3d1247614..7f3828df2273 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml
@@ -74,7 +74,7 @@ patternProperties:
patternProperties:
'^pins':
type: object
- $ref: "/schemas/pinctrl/pincfg-node.yaml"
+ $ref: /schemas/pinctrl/pincfg-node.yaml
additionalProperties: false
description:
A pinctrl node should contain at least one subnode representing the
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
index 88a466769938..8aaf29dd7e1e 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
@@ -65,7 +65,7 @@ patternProperties:
pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and input
schmitt.
- $ref: "pinmux-node.yaml"
+ $ref: pinmux-node.yaml
properties:
pinmux:
@@ -126,7 +126,7 @@ patternProperties:
additionalProperties: false
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
required:
- compatible
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
index c1c8c99ba139..bf25b8773cee 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
@@ -87,7 +87,7 @@ patternProperties:
}
};
};
- $ref: "pinmux-node.yaml"
+ $ref: pinmux-node.yaml
properties:
pinmux:
@@ -217,7 +217,7 @@ patternProperties:
- pinmux
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: pinctrl.yaml#
required:
- compatible
--
2.37.2
From: Arınç ÜNAL <[email protected]>
The RT3352 and RT5350 SoCs each contain different pin muxing information,
therefore, should be split. This can be done now that there are compatible
strings to distinguish them from other SoCs.
Split the schema out to ralink,rt3352-pinctrl.yaml and
ralink,rt5350-pinctrl.yaml.
Remove ralink,rt3352-pinctrl and ralink,rt5350-pinctrl from rt305x.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
.../pinctrl/ralink,rt305x-pinctrl.yaml | 83 +-----
.../pinctrl/ralink,rt3352-pinctrl.yaml | 243 ++++++++++++++++++
.../pinctrl/ralink,rt5350-pinctrl.yaml | 206 +++++++++++++++
3 files changed, 455 insertions(+), 77 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml
create mode 100644 Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
index 55c6f9826e76..95a904273009 100644
--- a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
@@ -11,17 +11,13 @@ maintainers:
- Sergio Paracuellos <[email protected]>
description: |
- Ralink RT305X pin controller for RT3050, RT3052, RT3350, RT3352 and RT5350
- SoCs.
+ Ralink RT305X pin controller for RT3050, RT3052, and RT3350 SoCs.
The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support.
properties:
compatible:
- enum:
- - ralink,rt305x-pinctrl
- - ralink,rt3352-pinctrl
- - ralink,rt5350-pinctrl
+ const: ralink,rt305x-pinctrl
patternProperties:
'-pins$':
@@ -39,21 +35,9 @@ patternProperties:
function:
description:
A string containing the name of the function to mux to the group.
- anyOf:
- - description: For RT3050, RT3052 and RT3350 SoCs
- enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, mdio,
- pcm gpio, pcm i2s, pcm uartf, rgmii, sdram, spi, uartf,
- uartlite]
-
- - description: For RT3352 SoC
- enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led,
- lna, mdio, pa, pcm gpio, pcm i2s, pcm uartf, rgmii, spi,
- spi_cs1, uartf, uartlite, wdg_cs1]
-
- - description: For RT5350 SoC
- enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led,
- pcm gpio, pcm i2s, pcm uartf, spi, spi_cs1, uartf,
- uartlite, wdg_cs1]
+ enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, mdio,
+ pcm gpio, pcm i2s, pcm uartf, rgmii, sdram, spi, uartf,
+ uartlite]
groups:
description:
@@ -72,17 +56,7 @@ patternProperties:
then:
properties:
groups:
- anyOf:
- - description: For RT3050, RT3052 and RT3350 SoCs
- enum: [i2c, jtag, mdio, rgmii, sdram, spi, uartf,
- uartlite]
-
- - description: For RT3352 SoC
- enum: [i2c, jtag, led, lna, mdio, pa, rgmii, spi, spi_cs1,
- uartf, uartlite]
-
- - description: For RT5350 SoC
- enum: [i2c, jtag, led, spi, spi_cs1, uartf, uartlite]
+ enum: [i2c, jtag, mdio, rgmii, sdram, spi, uartf, uartlite]
- if:
properties:
@@ -129,24 +103,6 @@ patternProperties:
groups:
enum: [jtag]
- - if:
- properties:
- function:
- const: led
- then:
- properties:
- groups:
- enum: [led]
-
- - if:
- properties:
- function:
- const: lna
- then:
- properties:
- groups:
- enum: [lna]
-
- if:
properties:
function:
@@ -156,15 +112,6 @@ patternProperties:
groups:
enum: [mdio]
- - if:
- properties:
- function:
- const: pa
- then:
- properties:
- groups:
- enum: [pa]
-
- if:
properties:
function:
@@ -219,15 +166,6 @@ patternProperties:
groups:
enum: [spi]
- - if:
- properties:
- function:
- const: spi_cs1
- then:
- properties:
- groups:
- enum: [spi_cs1]
-
- if:
properties:
function:
@@ -246,15 +184,6 @@ patternProperties:
groups:
enum: [uartlite]
- - if:
- properties:
- function:
- const: wdg_cs1
- then:
- properties:
- groups:
- enum: [spi_cs1]
-
allOf:
- $ref: pinctrl.yaml#
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml
new file mode 100644
index 000000000000..c9bc6cfd834c
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml
@@ -0,0 +1,243 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/ralink,rt3352-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ralink RT3352 Pin Controller
+
+maintainers:
+ - Arınç ÜNAL <[email protected]>
+ - Sergio Paracuellos <[email protected]>
+
+description: |
+ Ralink RT3352 pin controller for RT3352 SoC.
+ The pin controller can only set the muxing of pin groups. Muxing individual
+ pins is not supported. There is no pinconf support.
+
+properties:
+ compatible:
+ const: ralink,rt3352-pinctrl
+
+patternProperties:
+ '-pins$':
+ type: object
+ additionalProperties: false
+
+ patternProperties:
+ '^(.*-)?pinmux$':
+ type: object
+ description: node for pinctrl.
+ $ref: pinmux-node.yaml#
+ additionalProperties: false
+
+ properties:
+ function:
+ description:
+ A string containing the name of the function to mux to the group.
+ enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, lna,
+ mdio, pa, pcm gpio, pcm i2s, pcm uartf, rgmii, spi, spi_cs1,
+ uartf, uartlite, wdg_cs1]
+
+ groups:
+ description:
+ An array of strings. Each string contains the name of a group.
+ maxItems: 1
+
+ required:
+ - groups
+ - function
+
+ allOf:
+ - if:
+ properties:
+ function:
+ const: gpio
+ then:
+ properties:
+ groups:
+ enum: [i2c, jtag, led, lna, mdio, pa, rgmii, spi, spi_cs1,
+ uartf, uartlite]
+
+ - if:
+ properties:
+ function:
+ const: gpio i2s
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: gpio uartf
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: i2c
+ then:
+ properties:
+ groups:
+ enum: [i2c]
+
+ - if:
+ properties:
+ function:
+ const: i2s uartf
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: jtag
+ then:
+ properties:
+ groups:
+ enum: [jtag]
+
+ - if:
+ properties:
+ function:
+ const: led
+ then:
+ properties:
+ groups:
+ enum: [led]
+
+ - if:
+ properties:
+ function:
+ const: lna
+ then:
+ properties:
+ groups:
+ enum: [lna]
+
+ - if:
+ properties:
+ function:
+ const: mdio
+ then:
+ properties:
+ groups:
+ enum: [mdio]
+
+ - if:
+ properties:
+ function:
+ const: pa
+ then:
+ properties:
+ groups:
+ enum: [pa]
+
+ - if:
+ properties:
+ function:
+ const: pcm gpio
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: pcm i2s
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: pcm uartf
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: rgmii
+ then:
+ properties:
+ groups:
+ enum: [rgmii]
+
+ - if:
+ properties:
+ function:
+ const: spi
+ then:
+ properties:
+ groups:
+ enum: [spi]
+
+ - if:
+ properties:
+ function:
+ const: spi_cs1
+ then:
+ properties:
+ groups:
+ enum: [spi_cs1]
+
+ - if:
+ properties:
+ function:
+ const: uartf
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: uartlite
+ then:
+ properties:
+ groups:
+ enum: [uartlite]
+
+ - if:
+ properties:
+ function:
+ const: wdg_cs1
+ then:
+ properties:
+ groups:
+ enum: [spi_cs1]
+
+allOf:
+ - $ref: pinctrl.yaml#
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ pinctrl {
+ compatible = "ralink,rt3352-pinctrl";
+
+ i2c_pins: i2c0-pins {
+ pinmux {
+ groups = "i2c";
+ function = "i2c";
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml
new file mode 100644
index 000000000000..f248202ce866
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml
@@ -0,0 +1,206 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/ralink,rt5350-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ralink RT5350 Pin Controller
+
+maintainers:
+ - Arınç ÜNAL <[email protected]>
+ - Sergio Paracuellos <[email protected]>
+
+description: |
+ Ralink RT5350 pin controller for RT5350 SoC.
+ The pin controller can only set the muxing of pin groups. Muxing individual
+ pins is not supported. There is no pinconf support.
+
+properties:
+ compatible:
+ const: ralink,rt5350-pinctrl
+
+patternProperties:
+ '-pins$':
+ type: object
+ additionalProperties: false
+
+ patternProperties:
+ '^(.*-)?pinmux$':
+ type: object
+ description: node for pinctrl.
+ $ref: pinmux-node.yaml#
+ additionalProperties: false
+
+ properties:
+ function:
+ description:
+ A string containing the name of the function to mux to the group.
+ enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led,
+ pcm gpio, pcm i2s, pcm uartf, spi, spi_cs1, uartf, uartlite,
+ wdg_cs1]
+
+ groups:
+ description:
+ An array of strings. Each string contains the name of a group.
+ maxItems: 1
+
+ required:
+ - groups
+ - function
+
+ allOf:
+ - if:
+ properties:
+ function:
+ const: gpio
+ then:
+ properties:
+ groups:
+ enum: [i2c, jtag, led, spi, spi_cs1, uartf, uartlite]
+
+ - if:
+ properties:
+ function:
+ const: gpio i2s
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: gpio uartf
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: i2c
+ then:
+ properties:
+ groups:
+ enum: [i2c]
+
+ - if:
+ properties:
+ function:
+ const: i2s uartf
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: jtag
+ then:
+ properties:
+ groups:
+ enum: [jtag]
+
+ - if:
+ properties:
+ function:
+ const: led
+ then:
+ properties:
+ groups:
+ enum: [led]
+
+ - if:
+ properties:
+ function:
+ const: pcm gpio
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: pcm i2s
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: pcm uartf
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: spi
+ then:
+ properties:
+ groups:
+ enum: [spi]
+
+ - if:
+ properties:
+ function:
+ const: spi_cs1
+ then:
+ properties:
+ groups:
+ enum: [spi_cs1]
+
+ - if:
+ properties:
+ function:
+ const: uartf
+ then:
+ properties:
+ groups:
+ enum: [uartf]
+
+ - if:
+ properties:
+ function:
+ const: uartlite
+ then:
+ properties:
+ groups:
+ enum: [uartlite]
+
+ - if:
+ properties:
+ function:
+ const: wdg_cs1
+ then:
+ properties:
+ groups:
+ enum: [spi_cs1]
+
+allOf:
+ - $ref: pinctrl.yaml#
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ pinctrl {
+ compatible = "ralink,rt5350-pinctrl";
+
+ i2c_pins: i2c0-pins {
+ pinmux {
+ groups = "i2c";
+ function = "i2c";
+ };
+ };
+ };
--
2.37.2
From: Arınç ÜNAL <[email protected]>
The Ralink pinctrl driver is now under the name of MediaTek MIPS pin
controller. Move the maintainer information accordingly. Add dt-binding
schema files. Add [email protected] as an associated
mailing list.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
MAINTAINERS | 29 ++++++++++++++++++++++-------
1 file changed, 22 insertions(+), 7 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8a851eb053ca..83fa1e9651ef 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16541,6 +16541,28 @@ F: Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
F: Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
F: drivers/pinctrl/mediatek/
+PIN CONTROLLER - MEDIATEK MIPS
+M: Arınç ÜNAL <[email protected]>
+M: Sergio Paracuellos <[email protected]>
+L: [email protected] (moderated for non-subscribers)
+L: [email protected]
+S: Maintained
+F: Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
+F: Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml
+F: Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml
+F: Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml
+F: Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
+F: Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml
+F: Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml
+F: Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml
+F: drivers/pinctrl/mediatek/pinctrl-mt7620.c
+F: drivers/pinctrl/mediatek/pinctrl-mt7621.c
+F: drivers/pinctrl/mediatek/pinctrl-mt76x8.c
+F: drivers/pinctrl/mediatek/pinctrl-mtmips.*
+F: drivers/pinctrl/mediatek/pinctrl-rt2880.c
+F: drivers/pinctrl/mediatek/pinctrl-rt305x.c
+F: drivers/pinctrl/mediatek/pinctrl-rt3883.c
+
PIN CONTROLLER - MICROCHIP AT91
M: Ludovic Desroches <[email protected]>
L: [email protected] (moderated for non-subscribers)
@@ -17486,13 +17508,6 @@ L: [email protected]
S: Maintained
F: arch/mips/boot/dts/ralink/mt7621*
-RALINK PINCTRL DRIVER
-M: Arınç ÜNAL <[email protected]>
-M: Sergio Paracuellos <[email protected]>
-L: [email protected]
-S: Maintained
-F: drivers/pinctrl/ralink/
-
RALINK RT2X00 WIRELESS LAN DRIVER
M: Stanislaw Gruszka <[email protected]>
M: Helmut Schaa <[email protected]>
--
2.37.2
From: Arınç ÜNAL <[email protected]>
The MT7628 and MT7688 SoCs contain different pin muxing information,
therefore, should be split. This can be done now that there are compatible
strings to distinguish them from other SoCs.
Split the schema out to mediatek,mt76x8-pinctrl.yaml.
Remove mediatek,mt76x8-pinctrl from mt7620.
Deprecate ralink,mt7620-pinctrl. The reason is, the DTs for mt76x8 which
use this string will incorrectly match the pin muxing information for
mt7620. There's a new string, mediatek,mt7620-pinctrl, which makes the
deprecation possible.
Signed-off-by: Arınç ÜNAL <[email protected]>
---
.../pinctrl/mediatek,mt7620-pinctrl.yaml | 380 +--------------
.../pinctrl/mediatek,mt76x8-pinctrl.yaml | 450 ++++++++++++++++++
2 files changed, 459 insertions(+), 371 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
index 11530b29d52b..38b71c74b9a0 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
@@ -11,16 +11,13 @@ maintainers:
- Sergio Paracuellos <[email protected]>
description: |
- MediaTek MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs.
+ MediaTek MT7620 pin controller for MT7620 SoC.
The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support.
properties:
compatible:
- enum:
- - mediatek,mt7620-pinctrl
- - mediatek,mt76x8-pinctrl
- - ralink,mt7620-pinctrl
+ const: mediatek,mt7620-pinctrl
patternProperties:
'-pins$':
@@ -38,19 +35,10 @@ patternProperties:
function:
description:
A string containing the name of the function to mux to the group.
- anyOf:
- - description: For MT7620 SoC
- enum: [ephy, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, mdio, nand, pa,
- pcie refclk, pcie rst, pcm gpio, pcm i2s, pcm uartf, refclk,
- rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite, wdt refclk,
- wdt rst, wled]
-
- - description: For MT7628 and MT7688 SoCs
- enum: [antenna, debug, gpio, i2c, i2s, jtag, p0led_an, p0led_kn,
- p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an, p3led_kn,
- p4led_an, p4led_kn, pcie, pcm, perst, pwm, pwm0, pwm1, pwm_uart2,
- refclk, rsvd, sdxc, sdxc d5 d4, sdxc d6, sdxc d7, spi, spi cs1,
- spis, sw_r, uart0, uart1, uart2, utif, wdt, wled_an, wled_kn, -]
+ enum: [ephy, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, mdio, nand,
+ pa, pcie refclk, pcie rst, pcm gpio, pcm i2s, pcm uartf,
+ refclk, rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite,
+ wdt refclk, wdt rst, wled]
groups:
description:
@@ -62,24 +50,6 @@ patternProperties:
- function
allOf:
- - if:
- properties:
- function:
- const: antenna
- then:
- properties:
- groups:
- enum: [i2s]
-
- - if:
- properties:
- function:
- const: debug
- then:
- properties:
- groups:
- enum: [i2c]
-
- if:
properties:
function:
@@ -96,17 +66,8 @@ patternProperties:
then:
properties:
groups:
- anyOf:
- - description: For MT7620 SoC
- enum: [ephy, i2c, mdio, nd_sd, pa, pcie, rgmii1, rgmii2,
- spi, spi refclk, uartf, uartlite, wdt, wled]
-
- - description: For MT7628 and MT7688 SoCs
- enum: [gpio, i2c, i2s, p0led_an, p0led_kn, p1led_an,
- p1led_kn, p2led_an, p2led_kn, p3led_an, p3led_kn,
- p4led_an, p4led_kn, perst, pwm0, pwm1, refclk,
- sdmode, spi, spi cs1, spis, uart0, uart1, uart2,
- wdt, wled_an, wled_kn]
+ enum: [ephy, i2c, mdio, nd_sd, pa, pcie, rgmii1, rgmii2, spi,
+ spi refclk, uartf, uartlite, wdt, wled]
- if:
properties:
@@ -135,15 +96,6 @@ patternProperties:
groups:
enum: [i2c]
- - if:
- properties:
- function:
- const: i2s
- then:
- properties:
- groups:
- enum: [i2s]
-
- if:
properties:
function:
@@ -153,17 +105,6 @@ patternProperties:
groups:
enum: [uartf]
- - if:
- properties:
- function:
- const: jtag
- then:
- properties:
- groups:
- enum: [p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an,
- p2led_kn, p3led_an, p3led_kn, p4led_an, p4led_kn,
- sdmode]
-
- if:
properties:
function:
@@ -182,96 +123,6 @@ patternProperties:
groups:
enum: [nd_sd]
- - if:
- properties:
- function:
- const: p0led_an
- then:
- properties:
- groups:
- enum: [p0led_an]
-
- - if:
- properties:
- function:
- const: p0led_kn
- then:
- properties:
- groups:
- enum: [p0led_kn]
-
- - if:
- properties:
- function:
- const: p1led_an
- then:
- properties:
- groups:
- enum: [p1led_an]
-
- - if:
- properties:
- function:
- const: p1led_kn
- then:
- properties:
- groups:
- enum: [p1led_kn]
-
- - if:
- properties:
- function:
- const: p2led_an
- then:
- properties:
- groups:
- enum: [p2led_an]
-
- - if:
- properties:
- function:
- const: p2led_kn
- then:
- properties:
- groups:
- enum: [p2led_kn]
-
- - if:
- properties:
- function:
- const: p3led_an
- then:
- properties:
- groups:
- enum: [p3led_an]
-
- - if:
- properties:
- function:
- const: p3led_kn
- then:
- properties:
- groups:
- enum: [p3led_kn]
-
- - if:
- properties:
- function:
- const: p4led_an
- then:
- properties:
- groups:
- enum: [p4led_an]
-
- - if:
- properties:
- function:
- const: p4led_kn
- then:
- properties:
- groups:
- enum: [p4led_kn]
-
- if:
properties:
function:
@@ -281,15 +132,6 @@ patternProperties:
groups:
enum: [pa]
- - if:
- properties:
- function:
- const: pcie
- then:
- properties:
- groups:
- enum: [gpio]
-
- if:
properties:
function:
@@ -308,15 +150,6 @@ patternProperties:
groups:
enum: [pcie]
- - if:
- properties:
- function:
- const: pcm
- then:
- properties:
- groups:
- enum: [i2s]
-
- if:
properties:
function:
@@ -344,51 +177,6 @@ patternProperties:
groups:
enum: [uartf]
- - if:
- properties:
- function:
- const: perst
- then:
- properties:
- groups:
- enum: [perst]
-
- - if:
- properties:
- function:
- const: pwm
- then:
- properties:
- groups:
- enum: [uart1, uart2]
-
- - if:
- properties:
- function:
- const: pwm0
- then:
- properties:
- groups:
- enum: [pwm0]
-
- - if:
- properties:
- function:
- const: pwm1
- then:
- properties:
- groups:
- enum: [pwm1]
-
- - if:
- properties:
- function:
- const: pwm_uart2
- then:
- properties:
- groups:
- enum: [spis]
-
- if:
properties:
function:
@@ -396,12 +184,7 @@ patternProperties:
then:
properties:
groups:
- anyOf:
- - description: For MT7620 SoC
- enum: [mdio]
-
- - description: For MT7628 and MT7688 SoCs
- enum: [gpio, refclk, spi cs1]
+ enum: [mdio]
- if:
properties:
@@ -421,15 +204,6 @@ patternProperties:
groups:
enum: [rgmii2]
- - if:
- properties:
- function:
- const: rsvd
- then:
- properties:
- groups:
- enum: [p0led_an, p0led_kn, wled_an, wled_kn]
-
- if:
properties:
function:
@@ -439,42 +213,6 @@ patternProperties:
groups:
enum: [nd_sd]
- - if:
- properties:
- function:
- const: sdxc
- then:
- properties:
- groups:
- enum: [sdmode]
-
- - if:
- properties:
- function:
- const: sdxc d5 d4
- then:
- properties:
- groups:
- enum: [uart2]
-
- - if:
- properties:
- function:
- const: sdxc d6
- then:
- properties:
- groups:
- enum: [pwm1]
-
- - if:
- properties:
- function:
- const: sdxc d7
- then:
- properties:
- groups:
- enum: [pwm0]
-
- if:
properties:
function:
@@ -484,15 +222,6 @@ patternProperties:
groups:
enum: [spi]
- - if:
- properties:
- function:
- const: spi cs1
- then:
- properties:
- groups:
- enum: [spi cs1]
-
- if:
properties:
function:
@@ -502,51 +231,6 @@ patternProperties:
groups:
enum: [spi refclk]
- - if:
- properties:
- function:
- const: spis
- then:
- properties:
- groups:
- enum: [spis]
-
- - if:
- properties:
- function:
- const: sw_r
- then:
- properties:
- groups:
- enum: [uart1]
-
- - if:
- properties:
- function:
- const: uart0
- then:
- properties:
- groups:
- enum: [uart0]
-
- - if:
- properties:
- function:
- const: uart1
- then:
- properties:
- groups:
- enum: [uart1]
-
- - if:
- properties:
- function:
- const: uart2
- then:
- properties:
- groups:
- enum: [uart2]
-
- if:
properties:
function:
@@ -565,25 +249,6 @@ patternProperties:
groups:
enum: [uartlite]
- - if:
- properties:
- function:
- const: utif
- then:
- properties:
- groups:
- enum: [p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an,
- p3led_kn, p4led_an, p4led_kn, pwm0, pwm1, sdmode, spis]
-
- - if:
- properties:
- function:
- const: wdt
- then:
- properties:
- groups:
- enum: [wdt]
-
- if:
properties:
function:
@@ -611,33 +276,6 @@ patternProperties:
groups:
enum: [wled]
- - if:
- properties:
- function:
- const: wled_an
- then:
- properties:
- groups:
- enum: [wled_an]
-
- - if:
- properties:
- function:
- const: wled_kn
- then:
- properties:
- groups:
- enum: [wled_kn]
-
- - if:
- properties:
- function:
- const: "-"
- then:
- properties:
- groups:
- enum: [i2c, spi cs1, uart0]
-
allOf:
- $ref: pinctrl.yaml#
diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml
new file mode 100644
index 000000000000..f435569be6a4
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml
@@ -0,0 +1,450 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt76x8-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek MT76X8 Pin Controller
+
+maintainers:
+ - Arınç ÜNAL <[email protected]>
+ - Sergio Paracuellos <[email protected]>
+
+description: |
+ MediaTek MT76X8 pin controller for MT7628 and MT7688 SoCs.
+ The pin controller can only set the muxing of pin groups. Muxing individual
+ pins is not supported. There is no pinconf support.
+
+properties:
+ compatible:
+ const: mediatek,mt76x8-pinctrl
+
+patternProperties:
+ '-pins$':
+ type: object
+ additionalProperties: false
+
+ patternProperties:
+ '^(.*-)?pinmux$':
+ type: object
+ description: node for pinctrl.
+ $ref: pinmux-node.yaml#
+ additionalProperties: false
+
+ properties:
+ function:
+ description:
+ A string containing the name of the function to mux to the group.
+ enum: [antenna, debug, gpio, i2c, i2s, jtag, p0led_an, p0led_kn,
+ p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an, p3led_kn,
+ p4led_an, p4led_kn, pcie, pcm, perst, pwm, pwm0, pwm1,
+ pwm_uart2, refclk, rsvd, sdxc, sdxc d5 d4, sdxc d6, sdxc d7,
+ spi, spi cs1, spis, sw_r, uart0, uart1, uart2, utif, wdt,
+ wled_an, wled_kn, -]
+
+ groups:
+ description:
+ An array of strings. Each string contains the name of a group.
+ maxItems: 1
+
+ required:
+ - groups
+ - function
+
+ allOf:
+ - if:
+ properties:
+ function:
+ const: antenna
+ then:
+ properties:
+ groups:
+ enum: [i2s]
+
+ - if:
+ properties:
+ function:
+ const: debug
+ then:
+ properties:
+ groups:
+ enum: [i2c]
+
+ - if:
+ properties:
+ function:
+ const: gpio
+ then:
+ properties:
+ groups:
+ enum: [gpio, i2c, i2s, p0led_an, p0led_kn, p1led_an, p1led_kn,
+ p2led_an, p2led_kn, p3led_an, p3led_kn, p4led_an,
+ p4led_kn, perst, pwm0, pwm1, refclk, sdmode, spi,
+ spi cs1, spis, uart0, uart1, uart2, wdt, wled_an,
+ wled_kn]
+
+ - if:
+ properties:
+ function:
+ const: i2c
+ then:
+ properties:
+ groups:
+ enum: [i2c]
+
+ - if:
+ properties:
+ function:
+ const: i2s
+ then:
+ properties:
+ groups:
+ enum: [i2s]
+
+ - if:
+ properties:
+ function:
+ const: jtag
+ then:
+ properties:
+ groups:
+ enum: [p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an,
+ p2led_kn, p3led_an, p3led_kn, p4led_an, p4led_kn,
+ sdmode]
+
+ - if:
+ properties:
+ function:
+ const: p0led_an
+ then:
+ properties:
+ groups:
+ enum: [p0led_an]
+
+ - if:
+ properties:
+ function:
+ const: p0led_kn
+ then:
+ properties:
+ groups:
+ enum: [p0led_kn]
+
+ - if:
+ properties:
+ function:
+ const: p1led_an
+ then:
+ properties:
+ groups:
+ enum: [p1led_an]
+
+ - if:
+ properties:
+ function:
+ const: p1led_kn
+ then:
+ properties:
+ groups:
+ enum: [p1led_kn]
+
+ - if:
+ properties:
+ function:
+ const: p2led_an
+ then:
+ properties:
+ groups:
+ enum: [p2led_an]
+
+ - if:
+ properties:
+ function:
+ const: p2led_kn
+ then:
+ properties:
+ groups:
+ enum: [p2led_kn]
+
+ - if:
+ properties:
+ function:
+ const: p3led_an
+ then:
+ properties:
+ groups:
+ enum: [p3led_an]
+
+ - if:
+ properties:
+ function:
+ const: p3led_kn
+ then:
+ properties:
+ groups:
+ enum: [p3led_kn]
+
+ - if:
+ properties:
+ function:
+ const: p4led_an
+ then:
+ properties:
+ groups:
+ enum: [p4led_an]
+
+ - if:
+ properties:
+ function:
+ const: p4led_kn
+ then:
+ properties:
+ groups:
+ enum: [p4led_kn]
+
+ - if:
+ properties:
+ function:
+ const: pcie
+ then:
+ properties:
+ groups:
+ enum: [gpio]
+
+ - if:
+ properties:
+ function:
+ const: pcm
+ then:
+ properties:
+ groups:
+ enum: [i2s]
+
+ - if:
+ properties:
+ function:
+ const: perst
+ then:
+ properties:
+ groups:
+ enum: [perst]
+
+ - if:
+ properties:
+ function:
+ const: pwm
+ then:
+ properties:
+ groups:
+ enum: [uart1, uart2]
+
+ - if:
+ properties:
+ function:
+ const: pwm0
+ then:
+ properties:
+ groups:
+ enum: [pwm0]
+
+ - if:
+ properties:
+ function:
+ const: pwm1
+ then:
+ properties:
+ groups:
+ enum: [pwm1]
+
+ - if:
+ properties:
+ function:
+ const: pwm_uart2
+ then:
+ properties:
+ groups:
+ enum: [spis]
+
+ - if:
+ properties:
+ function:
+ const: refclk
+ then:
+ properties:
+ groups:
+ enum: [gpio, refclk, spi cs1]
+
+ - if:
+ properties:
+ function:
+ const: rsvd
+ then:
+ properties:
+ groups:
+ enum: [p0led_an, p0led_kn, wled_an, wled_kn]
+
+ - if:
+ properties:
+ function:
+ const: sdxc
+ then:
+ properties:
+ groups:
+ enum: [sdmode]
+
+ - if:
+ properties:
+ function:
+ const: sdxc d5 d4
+ then:
+ properties:
+ groups:
+ enum: [uart2]
+
+ - if:
+ properties:
+ function:
+ const: sdxc d6
+ then:
+ properties:
+ groups:
+ enum: [pwm1]
+
+ - if:
+ properties:
+ function:
+ const: sdxc d7
+ then:
+ properties:
+ groups:
+ enum: [pwm0]
+
+ - if:
+ properties:
+ function:
+ const: spi
+ then:
+ properties:
+ groups:
+ enum: [spi]
+
+ - if:
+ properties:
+ function:
+ const: spi cs1
+ then:
+ properties:
+ groups:
+ enum: [spi cs1]
+
+ - if:
+ properties:
+ function:
+ const: spis
+ then:
+ properties:
+ groups:
+ enum: [spis]
+
+ - if:
+ properties:
+ function:
+ const: sw_r
+ then:
+ properties:
+ groups:
+ enum: [uart1]
+
+ - if:
+ properties:
+ function:
+ const: uart0
+ then:
+ properties:
+ groups:
+ enum: [uart0]
+
+ - if:
+ properties:
+ function:
+ const: uart1
+ then:
+ properties:
+ groups:
+ enum: [uart1]
+
+ - if:
+ properties:
+ function:
+ const: uart2
+ then:
+ properties:
+ groups:
+ enum: [uart2]
+
+ - if:
+ properties:
+ function:
+ const: utif
+ then:
+ properties:
+ groups:
+ enum: [p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an,
+ p3led_kn, p4led_an, p4led_kn, pwm0, pwm1, sdmode, spis]
+
+ - if:
+ properties:
+ function:
+ const: wdt
+ then:
+ properties:
+ groups:
+ enum: [wdt]
+
+ - if:
+ properties:
+ function:
+ const: wled_an
+ then:
+ properties:
+ groups:
+ enum: [wled_an]
+
+ - if:
+ properties:
+ function:
+ const: wled_kn
+ then:
+ properties:
+ groups:
+ enum: [wled_kn]
+
+ - if:
+ properties:
+ function:
+ const: "-"
+ then:
+ properties:
+ groups:
+ enum: [i2c, spi cs1, uart0]
+
+allOf:
+ - $ref: pinctrl.yaml#
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ pinctrl {
+ compatible = "mediatek,mt76x8-pinctrl";
+
+ i2c_pins: i2c0-pins {
+ pinmux {
+ groups = "i2c";
+ function = "i2c";
+ };
+ };
+ };
--
2.37.2
On Fri, Mar 3, 2023 at 1:29 AM <[email protected]> wrote:
>
> From: Arınç ÜNAL <[email protected]>
>
> There have been stable releases with the ralink,rt2880-pinmux compatible
> string included. Having it removed breaks the ABI. Reintroduce it.
>
> Fixes: e5981cd46183 ("pinctrl: ralink: add new compatible strings for each pinctrl subdriver")
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> drivers/pinctrl/ralink/pinctrl-mt7620.c | 1 +
> drivers/pinctrl/ralink/pinctrl-mt7621.c | 1 +
> drivers/pinctrl/ralink/pinctrl-rt2880.c | 1 +
> drivers/pinctrl/ralink/pinctrl-rt305x.c | 1 +
> drivers/pinctrl/ralink/pinctrl-rt3883.c | 1 +
> 5 files changed, 5 insertions(+)
Reviewed-by: Sergio Paracuellos <[email protected]>
Thanks,
Sergio Paracuellos
On Fri, Mar 3, 2023 at 1:29 AM <[email protected]> wrote:
>
> From: Arınç ÜNAL <[email protected]>
>
> This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
> introduced these SoCs which utilise this platform. Add new compatible
> strings to address the incorrect naming.
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> drivers/pinctrl/ralink/pinctrl-mt7620.c | 1 +
> drivers/pinctrl/ralink/pinctrl-mt7621.c | 1 +
> 2 files changed, 2 insertions(+)
Reviewed-by: Sergio Paracuellos <[email protected]>
Thanks,
Sergio Paracuellos
On Fri, Mar 3, 2023 at 1:29 AM <[email protected]> wrote:
>
> From: Arınç ÜNAL <[email protected]>
>
> Add new compatible strings to make every SoC, or SoCs that use the same
> pinmux data have a unique compatible string. This ensures that the pin
> muxing information of every SoC, or a set of SoCs that use the same pinmux
> data can be properly documented.
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> drivers/pinctrl/ralink/pinctrl-rt305x.c | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Sergio Paracuellos <[email protected]>
Thanks,
Sergio Paracuellos
On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
>
> From: Arınç ÜNAL <[email protected]>
>
> Split the driver out to pinctrl-mt76x8.c. Remove including the unnecessary
> headers since is_mt76x8() is not being used anymore.
>
> Introduce a new compatible string to be able to document the pin muxing
> information properly.
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> drivers/pinctrl/ralink/Kconfig | 5 +
> drivers/pinctrl/ralink/Makefile | 1 +
> drivers/pinctrl/ralink/pinctrl-mt7620.c | 257 +--------------------
> drivers/pinctrl/ralink/pinctrl-mt76x8.c | 283 ++++++++++++++++++++++++
> 4 files changed, 290 insertions(+), 256 deletions(-)
> create mode 100644 drivers/pinctrl/ralink/pinctrl-mt76x8.c
On Fri, Mar 3, 2023 at 7:03 AM Sergio Paracuellos
<[email protected]> wrote:
>
> On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
> >
> > From: Arınç ÜNAL <[email protected]>
> >
> > Split the driver out to pinctrl-mt76x8.c. Remove including the unnecessary
> > headers since is_mt76x8() is not being used anymore.
> >
> > Introduce a new compatible string to be able to document the pin muxing
> > information properly.
> >
> > Signed-off-by: Arınç ÜNAL <[email protected]>
> > ---
> > drivers/pinctrl/ralink/Kconfig | 5 +
> > drivers/pinctrl/ralink/Makefile | 1 +
> > drivers/pinctrl/ralink/pinctrl-mt7620.c | 257 +--------------------
> > drivers/pinctrl/ralink/pinctrl-mt76x8.c | 283 ++++++++++++++++++++++++
> > 4 files changed, 290 insertions(+), 256 deletions(-)
> > create mode 100644 drivers/pinctrl/ralink/pinctrl-mt76x8.c
Reviewed-by: Sergio Paracuellos <[email protected]>
Thanks,
Sergio Paracuellos
Hi Arınç,
On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
>
> From: Arınç ÜNAL <[email protected]>
>
> This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
> introduced new SoCs which utilise this platform. Move the driver to
> mediatek pinctrl directory. Rename the ralink core driver to mtmips.
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> drivers/pinctrl/Kconfig | 1 -
> drivers/pinctrl/Makefile | 1 -
> drivers/pinctrl/mediatek/Kconfig | 51 ++++++++++-
> drivers/pinctrl/mediatek/Makefile | 63 +++++++------
> .../{ralink => mediatek}/pinctrl-mt7620.c | 34 +++----
> .../{ralink => mediatek}/pinctrl-mt7621.c | 30 +++----
> .../{ralink => mediatek}/pinctrl-mt76x8.c | 60 ++++++-------
> .../pinctrl-mtmips.c} | 90 +++++++++----------
> .../pinctrl-mtmips.h} | 16 ++--
> .../{ralink => mediatek}/pinctrl-rt2880.c | 20 ++---
> .../{ralink => mediatek}/pinctrl-rt305x.c | 44 ++++-----
> .../{ralink => mediatek}/pinctrl-rt3883.c | 28 +++---
> drivers/pinctrl/ralink/Kconfig | 40 ---------
> drivers/pinctrl/ralink/Makefile | 9 --
> 14 files changed, 246 insertions(+), 241 deletions(-)
> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7620.c (81%)
> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7621.c (80%)
> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt76x8.c (81%)
> rename drivers/pinctrl/{ralink/pinctrl-ralink.c => mediatek/pinctrl-mtmips.c} (74%)
> rename drivers/pinctrl/{ralink/pinctrl-ralink.h => mediatek/pinctrl-mtmips.h} (75%)
> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt2880.c (71%)
> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt305x.c (75%)
> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt3883.c (80%)
> delete mode 100644 drivers/pinctrl/ralink/Kconfig
> delete mode 100644 drivers/pinctrl/ralink/Makefile
>
> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> index dcb53c4a9584..8a6012770640 100644
> --- a/drivers/pinctrl/Kconfig
> +++ b/drivers/pinctrl/Kconfig
> @@ -537,7 +537,6 @@ source "drivers/pinctrl/nomadik/Kconfig"
> source "drivers/pinctrl/nuvoton/Kconfig"
> source "drivers/pinctrl/pxa/Kconfig"
> source "drivers/pinctrl/qcom/Kconfig"
> -source "drivers/pinctrl/ralink/Kconfig"
> source "drivers/pinctrl/renesas/Kconfig"
> source "drivers/pinctrl/samsung/Kconfig"
> source "drivers/pinctrl/spear/Kconfig"
> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
> index d5939840bb2a..ada6ed1d4e91 100644
> --- a/drivers/pinctrl/Makefile
> +++ b/drivers/pinctrl/Makefile
> @@ -66,7 +66,6 @@ obj-y += nomadik/
> obj-y += nuvoton/
> obj-$(CONFIG_PINCTRL_PXA) += pxa/
> obj-$(CONFIG_ARCH_QCOM) += qcom/
> -obj-$(CONFIG_PINCTRL_RALINK) += ralink/
> obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
> obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
> obj-$(CONFIG_PINCTRL_SPEAR) += spear/
> diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
> index a71874fed3d6..2eeb55010563 100644
> --- a/drivers/pinctrl/mediatek/Kconfig
> +++ b/drivers/pinctrl/mediatek/Kconfig
> @@ -1,6 +1,6 @@
> # SPDX-License-Identifier: GPL-2.0-only
> menu "MediaTek pinctrl drivers"
> - depends on ARCH_MEDIATEK || COMPILE_TEST
> + depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST
>
> config EINT_MTK
> tristate "MediaTek External Interrupt Support"
> @@ -22,6 +22,12 @@ config PINCTRL_MTK
> config PINCTRL_MTK_V2
> tristate
>
> +config PINCTRL_MTK_MTMIPS
> + bool
> + depends on RALINK
> + select PINMUX
> + select GENERIC_PINCONF
> +
> config PINCTRL_MTK_MOORE
> bool
> depends on OF
> @@ -43,6 +49,49 @@ config PINCTRL_MTK_PARIS
> select OF_GPIO
> select PINCTRL_MTK_V2
>
> +# For MIPS SoCs
> +config PINCTRL_MT7620
> + bool "MediaTek MT7620 pin control"
> + depends on SOC_MT7620 || COMPILE_TEST
> + depends on RALINK
> + default SOC_MT7620
> + select PINCTRL_MTK_MTMIPS
> +
> +config PINCTRL_MT7621
> + bool "MediaTek MT7621 pin control"
> + depends on SOC_MT7621 || COMPILE_TEST
> + depends on RALINK
> + default SOC_MT7621
> + select PINCTRL_MTK_MTMIPS
> +
> +config PINCTRL_MT76X8
> + bool "MediaTek MT76X8 pin control"
> + depends on SOC_MT7620 || COMPILE_TEST
> + depends on RALINK
> + default SOC_MT7620
> + select PINCTRL_MTK_MTMIPS
> +
> +config PINCTRL_RT2880
> + bool "Ralink RT2880 pin control"
> + depends on SOC_RT288X || COMPILE_TEST
> + depends on RALINK
> + default SOC_RT288X
> + select PINCTRL_MTK_MTMIPS
> +
> +config PINCTRL_RT305X
> + bool "Ralink RT305X pin control"
> + depends on SOC_RT305X || COMPILE_TEST
> + depends on RALINK
> + default SOC_RT305X
> + select PINCTRL_MTK_MTMIPS
> +
> +config PINCTRL_RT3883
> + bool "Ralink RT3883 pin control"
> + depends on SOC_RT3883 || COMPILE_TEST
> + depends on RALINK
> + default SOC_RT3883
> + select PINCTRL_MTK_MTMIPS
> +
I am not a Kconfig expert at all but...
Should not all of these be depends on SOC_XXX || (COMPILE_TEST &&
RALINK) and avoid the " depends on RALINK" next line in all of them?
Just asking since we have yet arch read and write register operations
in pinctrl common ralink code. Having in this way, when we address
this arch thing in the next series just removing the "&& RALINK" part
makes the review pretty obvious.
Other than that, changes look good to me.
> # For ARMv7 SoCs
> config PINCTRL_MT2701
> bool "MediaTek MT2701 pin control"
> diff --git a/drivers/pinctrl/mediatek/Makefile b/drivers/pinctrl/mediatek/Makefile
> index 44d197af516a..680f7e8526e0 100644
> --- a/drivers/pinctrl/mediatek/Makefile
> +++ b/drivers/pinctrl/mediatek/Makefile
> @@ -1,32 +1,39 @@
> # SPDX-License-Identifier: GPL-2.0
> # Core
> -obj-$(CONFIG_EINT_MTK) += mtk-eint.o
> -obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o
> -obj-$(CONFIG_PINCTRL_MTK_V2) += pinctrl-mtk-common-v2.o
> -obj-$(CONFIG_PINCTRL_MTK_MOORE) += pinctrl-moore.o
> -obj-$(CONFIG_PINCTRL_MTK_PARIS) += pinctrl-paris.o
> +obj-$(CONFIG_EINT_MTK) += mtk-eint.o
> +obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o
> +obj-$(CONFIG_PINCTRL_MTK_V2) += pinctrl-mtk-common-v2.o
> +obj-$(CONFIG_PINCTRL_MTK_MTMIPS) += pinctrl-mtmips.o
> +obj-$(CONFIG_PINCTRL_MTK_MOORE) += pinctrl-moore.o
> +obj-$(CONFIG_PINCTRL_MTK_PARIS) += pinctrl-paris.o
>
> # SoC Drivers
> -obj-$(CONFIG_PINCTRL_MT2701) += pinctrl-mt2701.o
> -obj-$(CONFIG_PINCTRL_MT2712) += pinctrl-mt2712.o
> -obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o
> -obj-$(CONFIG_PINCTRL_MT8127) += pinctrl-mt8127.o
> -obj-$(CONFIG_PINCTRL_MT6765) += pinctrl-mt6765.o
> -obj-$(CONFIG_PINCTRL_MT6779) += pinctrl-mt6779.o
> -obj-$(CONFIG_PINCTRL_MT6795) += pinctrl-mt6795.o
> -obj-$(CONFIG_PINCTRL_MT6797) += pinctrl-mt6797.o
> -obj-$(CONFIG_PINCTRL_MT7622) += pinctrl-mt7622.o
> -obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o
> -obj-$(CONFIG_PINCTRL_MT7629) += pinctrl-mt7629.o
> -obj-$(CONFIG_PINCTRL_MT7981) += pinctrl-mt7981.o
> -obj-$(CONFIG_PINCTRL_MT7986) += pinctrl-mt7986.o
> -obj-$(CONFIG_PINCTRL_MT8167) += pinctrl-mt8167.o
> -obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o
> -obj-$(CONFIG_PINCTRL_MT8183) += pinctrl-mt8183.o
> -obj-$(CONFIG_PINCTRL_MT8186) += pinctrl-mt8186.o
> -obj-$(CONFIG_PINCTRL_MT8188) += pinctrl-mt8188.o
> -obj-$(CONFIG_PINCTRL_MT8192) += pinctrl-mt8192.o
> -obj-$(CONFIG_PINCTRL_MT8195) += pinctrl-mt8195.o
> -obj-$(CONFIG_PINCTRL_MT8365) += pinctrl-mt8365.o
> -obj-$(CONFIG_PINCTRL_MT8516) += pinctrl-mt8516.o
> -obj-$(CONFIG_PINCTRL_MT6397) += pinctrl-mt6397.o
> +obj-$(CONFIG_PINCTRL_MT7620) += pinctrl-mt7620.o
> +obj-$(CONFIG_PINCTRL_MT7621) += pinctrl-mt7621.o
> +obj-$(CONFIG_PINCTRL_MT76X8) += pinctrl-mt76x8.o
> +obj-$(CONFIG_PINCTRL_RT2880) += pinctrl-rt2880.o
> +obj-$(CONFIG_PINCTRL_RT305X) += pinctrl-rt305x.o
> +obj-$(CONFIG_PINCTRL_RT3883) += pinctrl-rt3883.o
> +obj-$(CONFIG_PINCTRL_MT2701) += pinctrl-mt2701.o
> +obj-$(CONFIG_PINCTRL_MT2712) += pinctrl-mt2712.o
> +obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o
> +obj-$(CONFIG_PINCTRL_MT8127) += pinctrl-mt8127.o
> +obj-$(CONFIG_PINCTRL_MT6765) += pinctrl-mt6765.o
> +obj-$(CONFIG_PINCTRL_MT6779) += pinctrl-mt6779.o
> +obj-$(CONFIG_PINCTRL_MT6795) += pinctrl-mt6795.o
> +obj-$(CONFIG_PINCTRL_MT6797) += pinctrl-mt6797.o
> +obj-$(CONFIG_PINCTRL_MT7622) += pinctrl-mt7622.o
> +obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o
> +obj-$(CONFIG_PINCTRL_MT7629) += pinctrl-mt7629.o
> +obj-$(CONFIG_PINCTRL_MT7981) += pinctrl-mt7981.o
> +obj-$(CONFIG_PINCTRL_MT7986) += pinctrl-mt7986.o
> +obj-$(CONFIG_PINCTRL_MT8167) += pinctrl-mt8167.o
> +obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o
> +obj-$(CONFIG_PINCTRL_MT8183) += pinctrl-mt8183.o
> +obj-$(CONFIG_PINCTRL_MT8186) += pinctrl-mt8186.o
> +obj-$(CONFIG_PINCTRL_MT8188) += pinctrl-mt8188.o
> +obj-$(CONFIG_PINCTRL_MT8192) += pinctrl-mt8192.o
> +obj-$(CONFIG_PINCTRL_MT8195) += pinctrl-mt8195.o
> +obj-$(CONFIG_PINCTRL_MT8365) += pinctrl-mt8365.o
> +obj-$(CONFIG_PINCTRL_MT8516) += pinctrl-mt8516.o
> +obj-$(CONFIG_PINCTRL_MT6397) += pinctrl-mt6397.o
> diff --git a/drivers/pinctrl/ralink/pinctrl-mt7620.c b/drivers/pinctrl/mediatek/pinctrl-mt7620.c
> similarity index 81%
> rename from drivers/pinctrl/ralink/pinctrl-mt7620.c
> rename to drivers/pinctrl/mediatek/pinctrl-mt7620.c
> index b2245fd65c72..1a2dbbdd25f1 100644
> --- a/drivers/pinctrl/ralink/pinctrl-mt7620.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-mt7620.c
> @@ -3,7 +3,7 @@
> #include <linux/module.h>
> #include <linux/platform_device.h>
> #include <linux/of.h>
> -#include "pinctrl-ralink.h"
> +#include "pinctrl-mtmips.h"
>
> #define MT7620_GPIO_MODE_UART0_SHIFT 2
> #define MT7620_GPIO_MODE_UART0_MASK 0x7
> @@ -52,20 +52,20 @@
> #define MT7620_GPIO_MODE_EPHY 15
> #define MT7620_GPIO_MODE_PA 20
>
> -static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> -static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> -static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
> -static struct ralink_pmx_func mdio_grp[] = {
> +static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> +static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> +static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
> +static struct mtmips_pmx_func mdio_grp[] = {
> FUNC("mdio", MT7620_GPIO_MODE_MDIO, 22, 2),
> FUNC("refclk", MT7620_GPIO_MODE_MDIO_REFCLK, 22, 2),
> };
> -static struct ralink_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 24, 12) };
> -static struct ralink_pmx_func refclk_grp[] = { FUNC("spi refclk", 0, 37, 3) };
> -static struct ralink_pmx_func ephy_grp[] = { FUNC("ephy", 0, 40, 5) };
> -static struct ralink_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 60, 12) };
> -static struct ralink_pmx_func wled_grp[] = { FUNC("wled", 0, 72, 1) };
> -static struct ralink_pmx_func pa_grp[] = { FUNC("pa", 0, 18, 4) };
> -static struct ralink_pmx_func uartf_grp[] = {
> +static struct mtmips_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 24, 12) };
> +static struct mtmips_pmx_func refclk_grp[] = { FUNC("spi refclk", 0, 37, 3) };
> +static struct mtmips_pmx_func ephy_grp[] = { FUNC("ephy", 0, 40, 5) };
> +static struct mtmips_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 60, 12) };
> +static struct mtmips_pmx_func wled_grp[] = { FUNC("wled", 0, 72, 1) };
> +static struct mtmips_pmx_func pa_grp[] = { FUNC("pa", 0, 18, 4) };
> +static struct mtmips_pmx_func uartf_grp[] = {
> FUNC("uartf", MT7620_GPIO_MODE_UARTF, 7, 8),
> FUNC("pcm uartf", MT7620_GPIO_MODE_PCM_UARTF, 7, 8),
> FUNC("pcm i2s", MT7620_GPIO_MODE_PCM_I2S, 7, 8),
> @@ -74,20 +74,20 @@ static struct ralink_pmx_func uartf_grp[] = {
> FUNC("gpio uartf", MT7620_GPIO_MODE_GPIO_UARTF, 7, 4),
> FUNC("gpio i2s", MT7620_GPIO_MODE_GPIO_I2S, 7, 4),
> };
> -static struct ralink_pmx_func wdt_grp[] = {
> +static struct mtmips_pmx_func wdt_grp[] = {
> FUNC("wdt rst", 0, 17, 1),
> FUNC("wdt refclk", 0, 17, 1),
> };
> -static struct ralink_pmx_func pcie_rst_grp[] = {
> +static struct mtmips_pmx_func pcie_rst_grp[] = {
> FUNC("pcie rst", MT7620_GPIO_MODE_PCIE_RST, 36, 1),
> FUNC("pcie refclk", MT7620_GPIO_MODE_PCIE_REF, 36, 1)
> };
> -static struct ralink_pmx_func nd_sd_grp[] = {
> +static struct mtmips_pmx_func nd_sd_grp[] = {
> FUNC("nand", MT7620_GPIO_MODE_NAND, 45, 15),
> FUNC("sd", MT7620_GPIO_MODE_SD, 47, 13)
> };
>
> -static struct ralink_pmx_group mt7620a_pinmux_data[] = {
> +static struct mtmips_pmx_group mt7620a_pinmux_data[] = {
> GRP("i2c", i2c_grp, 1, MT7620_GPIO_MODE_I2C),
> GRP("uartf", uartf_grp, MT7620_GPIO_MODE_UART0_MASK,
> MT7620_GPIO_MODE_UART0_SHIFT),
> @@ -112,7 +112,7 @@ static struct ralink_pmx_group mt7620a_pinmux_data[] = {
>
> static int mt7620_pinctrl_probe(struct platform_device *pdev)
> {
> - return ralink_pinctrl_init(pdev, mt7620a_pinmux_data);
> + return mtmips_pinctrl_init(pdev, mt7620a_pinmux_data);
> }
>
> static const struct of_device_id mt7620_pinctrl_match[] = {
> diff --git a/drivers/pinctrl/ralink/pinctrl-mt7621.c b/drivers/pinctrl/mediatek/pinctrl-mt7621.c
> similarity index 80%
> rename from drivers/pinctrl/ralink/pinctrl-mt7621.c
> rename to drivers/pinctrl/mediatek/pinctrl-mt7621.c
> index 2128a94f6d1b..96c5ef942cf4 100644
> --- a/drivers/pinctrl/ralink/pinctrl-mt7621.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-mt7621.c
> @@ -3,7 +3,7 @@
> #include <linux/module.h>
> #include <linux/platform_device.h>
> #include <linux/of.h>
> -#include "pinctrl-ralink.h"
> +#include "pinctrl-mtmips.h"
>
> #define MT7621_GPIO_MODE_UART1 1
> #define MT7621_GPIO_MODE_I2C 2
> @@ -34,40 +34,40 @@
> #define MT7621_GPIO_MODE_SDHCI_SHIFT 18
> #define MT7621_GPIO_MODE_SDHCI_GPIO 1
>
> -static struct ralink_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) };
> -static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) };
> -static struct ralink_pmx_func uart3_grp[] = {
> +static struct mtmips_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) };
> +static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) };
> +static struct mtmips_pmx_func uart3_grp[] = {
> FUNC("uart3", 0, 5, 4),
> FUNC("i2s", 2, 5, 4),
> FUNC("spdif3", 3, 5, 4),
> };
> -static struct ralink_pmx_func uart2_grp[] = {
> +static struct mtmips_pmx_func uart2_grp[] = {
> FUNC("uart2", 0, 9, 4),
> FUNC("pcm", 2, 9, 4),
> FUNC("spdif2", 3, 9, 4),
> };
> -static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 13, 5) };
> -static struct ralink_pmx_func wdt_grp[] = {
> +static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 13, 5) };
> +static struct mtmips_pmx_func wdt_grp[] = {
> FUNC("wdt rst", 0, 18, 1),
> FUNC("wdt refclk", 2, 18, 1),
> };
> -static struct ralink_pmx_func pcie_rst_grp[] = {
> +static struct mtmips_pmx_func pcie_rst_grp[] = {
> FUNC("pcie rst", MT7621_GPIO_MODE_PCIE_RST, 19, 1),
> FUNC("pcie refclk", MT7621_GPIO_MODE_PCIE_REF, 19, 1)
> };
> -static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 20, 2) };
> -static struct ralink_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 22, 12) };
> -static struct ralink_pmx_func spi_grp[] = {
> +static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 20, 2) };
> +static struct mtmips_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 22, 12) };
> +static struct mtmips_pmx_func spi_grp[] = {
> FUNC("spi", 0, 34, 7),
> FUNC("nand1", 2, 34, 7),
> };
> -static struct ralink_pmx_func sdhci_grp[] = {
> +static struct mtmips_pmx_func sdhci_grp[] = {
> FUNC("sdhci", 0, 41, 8),
> FUNC("nand2", 2, 41, 8),
> };
> -static struct ralink_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 49, 12) };
> +static struct mtmips_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 49, 12) };
>
> -static struct ralink_pmx_group mt7621_pinmux_data[] = {
> +static struct mtmips_pmx_group mt7621_pinmux_data[] = {
> GRP("uart1", uart1_grp, 1, MT7621_GPIO_MODE_UART1),
> GRP("i2c", i2c_grp, 1, MT7621_GPIO_MODE_I2C),
> GRP_G("uart3", uart3_grp, MT7621_GPIO_MODE_UART3_MASK,
> @@ -92,7 +92,7 @@ static struct ralink_pmx_group mt7621_pinmux_data[] = {
>
> static int mt7621_pinctrl_probe(struct platform_device *pdev)
> {
> - return ralink_pinctrl_init(pdev, mt7621_pinmux_data);
> + return mtmips_pinctrl_init(pdev, mt7621_pinmux_data);
> }
>
> static const struct of_device_id mt7621_pinctrl_match[] = {
> diff --git a/drivers/pinctrl/ralink/pinctrl-mt76x8.c b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
> similarity index 81%
> rename from drivers/pinctrl/ralink/pinctrl-mt76x8.c
> rename to drivers/pinctrl/mediatek/pinctrl-mt76x8.c
> index 5a6a82a58180..1d463bcfb1bd 100644
> --- a/drivers/pinctrl/ralink/pinctrl-mt76x8.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
> @@ -3,7 +3,7 @@
> #include <linux/module.h>
> #include <linux/platform_device.h>
> #include <linux/of.h>
> -#include "pinctrl-ralink.h"
> +#include "pinctrl-mtmips.h"
>
> #define MT76X8_GPIO_MODE_MASK 0x3
>
> @@ -35,173 +35,173 @@
> #define MT76X8_GPIO_MODE_SPIS 2
> #define MT76X8_GPIO_MODE_GPIO 0
>
> -static struct ralink_pmx_func pwm1_grp[] = {
> +static struct mtmips_pmx_func pwm1_grp[] = {
> FUNC("sdxc d6", 3, 19, 1),
> FUNC("utif", 2, 19, 1),
> FUNC("gpio", 1, 19, 1),
> FUNC("pwm1", 0, 19, 1),
> };
>
> -static struct ralink_pmx_func pwm0_grp[] = {
> +static struct mtmips_pmx_func pwm0_grp[] = {
> FUNC("sdxc d7", 3, 18, 1),
> FUNC("utif", 2, 18, 1),
> FUNC("gpio", 1, 18, 1),
> FUNC("pwm0", 0, 18, 1),
> };
>
> -static struct ralink_pmx_func uart2_grp[] = {
> +static struct mtmips_pmx_func uart2_grp[] = {
> FUNC("sdxc d5 d4", 3, 20, 2),
> FUNC("pwm", 2, 20, 2),
> FUNC("gpio", 1, 20, 2),
> FUNC("uart2", 0, 20, 2),
> };
>
> -static struct ralink_pmx_func uart1_grp[] = {
> +static struct mtmips_pmx_func uart1_grp[] = {
> FUNC("sw_r", 3, 45, 2),
> FUNC("pwm", 2, 45, 2),
> FUNC("gpio", 1, 45, 2),
> FUNC("uart1", 0, 45, 2),
> };
>
> -static struct ralink_pmx_func i2c_grp[] = {
> +static struct mtmips_pmx_func i2c_grp[] = {
> FUNC("-", 3, 4, 2),
> FUNC("debug", 2, 4, 2),
> FUNC("gpio", 1, 4, 2),
> FUNC("i2c", 0, 4, 2),
> };
>
> -static struct ralink_pmx_func refclk_grp[] = { FUNC("refclk", 0, 37, 1) };
> -static struct ralink_pmx_func perst_grp[] = { FUNC("perst", 0, 36, 1) };
> -static struct ralink_pmx_func wdt_grp[] = { FUNC("wdt", 0, 38, 1) };
> -static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 7, 4) };
> +static struct mtmips_pmx_func refclk_grp[] = { FUNC("refclk", 0, 37, 1) };
> +static struct mtmips_pmx_func perst_grp[] = { FUNC("perst", 0, 36, 1) };
> +static struct mtmips_pmx_func wdt_grp[] = { FUNC("wdt", 0, 38, 1) };
> +static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 7, 4) };
>
> -static struct ralink_pmx_func sd_mode_grp[] = {
> +static struct mtmips_pmx_func sd_mode_grp[] = {
> FUNC("jtag", 3, 22, 8),
> FUNC("utif", 2, 22, 8),
> FUNC("gpio", 1, 22, 8),
> FUNC("sdxc", 0, 22, 8),
> };
>
> -static struct ralink_pmx_func uart0_grp[] = {
> +static struct mtmips_pmx_func uart0_grp[] = {
> FUNC("-", 3, 12, 2),
> FUNC("-", 2, 12, 2),
> FUNC("gpio", 1, 12, 2),
> FUNC("uart0", 0, 12, 2),
> };
>
> -static struct ralink_pmx_func i2s_grp[] = {
> +static struct mtmips_pmx_func i2s_grp[] = {
> FUNC("antenna", 3, 0, 4),
> FUNC("pcm", 2, 0, 4),
> FUNC("gpio", 1, 0, 4),
> FUNC("i2s", 0, 0, 4),
> };
>
> -static struct ralink_pmx_func spi_cs1_grp[] = {
> +static struct mtmips_pmx_func spi_cs1_grp[] = {
> FUNC("-", 3, 6, 1),
> FUNC("refclk", 2, 6, 1),
> FUNC("gpio", 1, 6, 1),
> FUNC("spi cs1", 0, 6, 1),
> };
>
> -static struct ralink_pmx_func spis_grp[] = {
> +static struct mtmips_pmx_func spis_grp[] = {
> FUNC("pwm_uart2", 3, 14, 4),
> FUNC("utif", 2, 14, 4),
> FUNC("gpio", 1, 14, 4),
> FUNC("spis", 0, 14, 4),
> };
>
> -static struct ralink_pmx_func gpio_grp[] = {
> +static struct mtmips_pmx_func gpio_grp[] = {
> FUNC("pcie", 3, 11, 1),
> FUNC("refclk", 2, 11, 1),
> FUNC("gpio", 1, 11, 1),
> FUNC("gpio", 0, 11, 1),
> };
>
> -static struct ralink_pmx_func p4led_kn_grp[] = {
> +static struct mtmips_pmx_func p4led_kn_grp[] = {
> FUNC("jtag", 3, 30, 1),
> FUNC("utif", 2, 30, 1),
> FUNC("gpio", 1, 30, 1),
> FUNC("p4led_kn", 0, 30, 1),
> };
>
> -static struct ralink_pmx_func p3led_kn_grp[] = {
> +static struct mtmips_pmx_func p3led_kn_grp[] = {
> FUNC("jtag", 3, 31, 1),
> FUNC("utif", 2, 31, 1),
> FUNC("gpio", 1, 31, 1),
> FUNC("p3led_kn", 0, 31, 1),
> };
>
> -static struct ralink_pmx_func p2led_kn_grp[] = {
> +static struct mtmips_pmx_func p2led_kn_grp[] = {
> FUNC("jtag", 3, 32, 1),
> FUNC("utif", 2, 32, 1),
> FUNC("gpio", 1, 32, 1),
> FUNC("p2led_kn", 0, 32, 1),
> };
>
> -static struct ralink_pmx_func p1led_kn_grp[] = {
> +static struct mtmips_pmx_func p1led_kn_grp[] = {
> FUNC("jtag", 3, 33, 1),
> FUNC("utif", 2, 33, 1),
> FUNC("gpio", 1, 33, 1),
> FUNC("p1led_kn", 0, 33, 1),
> };
>
> -static struct ralink_pmx_func p0led_kn_grp[] = {
> +static struct mtmips_pmx_func p0led_kn_grp[] = {
> FUNC("jtag", 3, 34, 1),
> FUNC("rsvd", 2, 34, 1),
> FUNC("gpio", 1, 34, 1),
> FUNC("p0led_kn", 0, 34, 1),
> };
>
> -static struct ralink_pmx_func wled_kn_grp[] = {
> +static struct mtmips_pmx_func wled_kn_grp[] = {
> FUNC("rsvd", 3, 35, 1),
> FUNC("rsvd", 2, 35, 1),
> FUNC("gpio", 1, 35, 1),
> FUNC("wled_kn", 0, 35, 1),
> };
>
> -static struct ralink_pmx_func p4led_an_grp[] = {
> +static struct mtmips_pmx_func p4led_an_grp[] = {
> FUNC("jtag", 3, 39, 1),
> FUNC("utif", 2, 39, 1),
> FUNC("gpio", 1, 39, 1),
> FUNC("p4led_an", 0, 39, 1),
> };
>
> -static struct ralink_pmx_func p3led_an_grp[] = {
> +static struct mtmips_pmx_func p3led_an_grp[] = {
> FUNC("jtag", 3, 40, 1),
> FUNC("utif", 2, 40, 1),
> FUNC("gpio", 1, 40, 1),
> FUNC("p3led_an", 0, 40, 1),
> };
>
> -static struct ralink_pmx_func p2led_an_grp[] = {
> +static struct mtmips_pmx_func p2led_an_grp[] = {
> FUNC("jtag", 3, 41, 1),
> FUNC("utif", 2, 41, 1),
> FUNC("gpio", 1, 41, 1),
> FUNC("p2led_an", 0, 41, 1),
> };
>
> -static struct ralink_pmx_func p1led_an_grp[] = {
> +static struct mtmips_pmx_func p1led_an_grp[] = {
> FUNC("jtag", 3, 42, 1),
> FUNC("utif", 2, 42, 1),
> FUNC("gpio", 1, 42, 1),
> FUNC("p1led_an", 0, 42, 1),
> };
>
> -static struct ralink_pmx_func p0led_an_grp[] = {
> +static struct mtmips_pmx_func p0led_an_grp[] = {
> FUNC("jtag", 3, 43, 1),
> FUNC("rsvd", 2, 43, 1),
> FUNC("gpio", 1, 43, 1),
> FUNC("p0led_an", 0, 43, 1),
> };
>
> -static struct ralink_pmx_func wled_an_grp[] = {
> +static struct mtmips_pmx_func wled_an_grp[] = {
> FUNC("rsvd", 3, 44, 1),
> FUNC("rsvd", 2, 44, 1),
> FUNC("gpio", 1, 44, 1),
> FUNC("wled_an", 0, 44, 1),
> };
>
> -static struct ralink_pmx_group mt76x8_pinmux_data[] = {
> +static struct mtmips_pmx_group mt76x8_pinmux_data[] = {
> GRP_G("pwm1", pwm1_grp, MT76X8_GPIO_MODE_MASK,
> 1, MT76X8_GPIO_MODE_PWM1),
> GRP_G("pwm0", pwm0_grp, MT76X8_GPIO_MODE_MASK,
> @@ -257,7 +257,7 @@ static struct ralink_pmx_group mt76x8_pinmux_data[] = {
>
> static int mt76x8_pinctrl_probe(struct platform_device *pdev)
> {
> - return ralink_pinctrl_init(pdev, mt76x8_pinmux_data);
> + return mtmips_pinctrl_init(pdev, mt76x8_pinmux_data);
> }
>
> static const struct of_device_id mt76x8_pinctrl_match[] = {
> diff --git a/drivers/pinctrl/ralink/pinctrl-ralink.c b/drivers/pinctrl/mediatek/pinctrl-mtmips.c
> similarity index 74%
> rename from drivers/pinctrl/ralink/pinctrl-ralink.c
> rename to drivers/pinctrl/mediatek/pinctrl-mtmips.c
> index 770862f45b3f..efd77b6c56a1 100644
> --- a/drivers/pinctrl/ralink/pinctrl-ralink.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-mtmips.c
> @@ -19,23 +19,23 @@
> #include <asm/mach-ralink/ralink_regs.h>
> #include <asm/mach-ralink/mt7620.h>
>
> -#include "pinctrl-ralink.h"
> +#include "pinctrl-mtmips.h"
> #include "../core.h"
> #include "../pinctrl-utils.h"
>
> #define SYSC_REG_GPIO_MODE 0x60
> #define SYSC_REG_GPIO_MODE2 0x64
>
> -struct ralink_priv {
> +struct mtmips_priv {
> struct device *dev;
>
> struct pinctrl_pin_desc *pads;
> struct pinctrl_desc *desc;
>
> - struct ralink_pmx_func **func;
> + struct mtmips_pmx_func **func;
> int func_count;
>
> - struct ralink_pmx_group *groups;
> + struct mtmips_pmx_group *groups;
> const char **group_names;
> int group_count;
>
> @@ -43,27 +43,27 @@ struct ralink_priv {
> int max_pins;
> };
>
> -static int ralink_get_group_count(struct pinctrl_dev *pctrldev)
> +static int mtmips_get_group_count(struct pinctrl_dev *pctrldev)
> {
> - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
>
> return p->group_count;
> }
>
> -static const char *ralink_get_group_name(struct pinctrl_dev *pctrldev,
> +static const char *mtmips_get_group_name(struct pinctrl_dev *pctrldev,
> unsigned int group)
> {
> - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
>
> return (group >= p->group_count) ? NULL : p->group_names[group];
> }
>
> -static int ralink_get_group_pins(struct pinctrl_dev *pctrldev,
> +static int mtmips_get_group_pins(struct pinctrl_dev *pctrldev,
> unsigned int group,
> const unsigned int **pins,
> unsigned int *num_pins)
> {
> - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
>
> if (group >= p->group_count)
> return -EINVAL;
> @@ -74,35 +74,35 @@ static int ralink_get_group_pins(struct pinctrl_dev *pctrldev,
> return 0;
> }
>
> -static const struct pinctrl_ops ralink_pctrl_ops = {
> - .get_groups_count = ralink_get_group_count,
> - .get_group_name = ralink_get_group_name,
> - .get_group_pins = ralink_get_group_pins,
> +static const struct pinctrl_ops mtmips_pctrl_ops = {
> + .get_groups_count = mtmips_get_group_count,
> + .get_group_name = mtmips_get_group_name,
> + .get_group_pins = mtmips_get_group_pins,
> .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
> .dt_free_map = pinconf_generic_dt_free_map,
> };
>
> -static int ralink_pmx_func_count(struct pinctrl_dev *pctrldev)
> +static int mtmips_pmx_func_count(struct pinctrl_dev *pctrldev)
> {
> - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
>
> return p->func_count;
> }
>
> -static const char *ralink_pmx_func_name(struct pinctrl_dev *pctrldev,
> +static const char *mtmips_pmx_func_name(struct pinctrl_dev *pctrldev,
> unsigned int func)
> {
> - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
>
> return p->func[func]->name;
> }
>
> -static int ralink_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
> +static int mtmips_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
> unsigned int func,
> const char * const **groups,
> unsigned int * const num_groups)
> {
> - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
>
> if (p->func[func]->group_count == 1)
> *groups = &p->group_names[p->func[func]->groups[0]];
> @@ -114,10 +114,10 @@ static int ralink_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
> return 0;
> }
>
> -static int ralink_pmx_group_enable(struct pinctrl_dev *pctrldev,
> +static int mtmips_pmx_group_enable(struct pinctrl_dev *pctrldev,
> unsigned int func, unsigned int group)
> {
> - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> u32 mode = 0;
> u32 reg = SYSC_REG_GPIO_MODE;
> int i;
> @@ -158,11 +158,11 @@ static int ralink_pmx_group_enable(struct pinctrl_dev *pctrldev,
> return 0;
> }
>
> -static int ralink_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
> +static int mtmips_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
> struct pinctrl_gpio_range *range,
> unsigned int pin)
> {
> - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
>
> if (!p->gpio[pin]) {
> dev_err(p->dev, "pin %d is not set to gpio mux\n", pin);
> @@ -172,28 +172,28 @@ static int ralink_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
> return 0;
> }
>
> -static const struct pinmux_ops ralink_pmx_group_ops = {
> - .get_functions_count = ralink_pmx_func_count,
> - .get_function_name = ralink_pmx_func_name,
> - .get_function_groups = ralink_pmx_group_get_groups,
> - .set_mux = ralink_pmx_group_enable,
> - .gpio_request_enable = ralink_pmx_group_gpio_request_enable,
> +static const struct pinmux_ops mtmips_pmx_group_ops = {
> + .get_functions_count = mtmips_pmx_func_count,
> + .get_function_name = mtmips_pmx_func_name,
> + .get_function_groups = mtmips_pmx_group_get_groups,
> + .set_mux = mtmips_pmx_group_enable,
> + .gpio_request_enable = mtmips_pmx_group_gpio_request_enable,
> };
>
> -static struct pinctrl_desc ralink_pctrl_desc = {
> +static struct pinctrl_desc mtmips_pctrl_desc = {
> .owner = THIS_MODULE,
> - .name = "ralink-pinctrl",
> - .pctlops = &ralink_pctrl_ops,
> - .pmxops = &ralink_pmx_group_ops,
> + .name = "mtmips-pinctrl",
> + .pctlops = &mtmips_pctrl_ops,
> + .pmxops = &mtmips_pmx_group_ops,
> };
>
> -static struct ralink_pmx_func gpio_func = {
> +static struct mtmips_pmx_func gpio_func = {
> .name = "gpio",
> };
>
> -static int ralink_pinctrl_index(struct ralink_priv *p)
> +static int mtmips_pinctrl_index(struct mtmips_priv *p)
> {
> - struct ralink_pmx_group *mux = p->groups;
> + struct mtmips_pmx_group *mux = p->groups;
> int i, j, c = 0;
>
> /* count the mux functions */
> @@ -248,7 +248,7 @@ static int ralink_pinctrl_index(struct ralink_priv *p)
> return 0;
> }
>
> -static int ralink_pinctrl_pins(struct ralink_priv *p)
> +static int mtmips_pinctrl_pins(struct mtmips_priv *p)
> {
> int i, j;
>
> @@ -313,10 +313,10 @@ static int ralink_pinctrl_pins(struct ralink_priv *p)
> return 0;
> }
>
> -int ralink_pinctrl_init(struct platform_device *pdev,
> - struct ralink_pmx_group *data)
> +int mtmips_pinctrl_init(struct platform_device *pdev,
> + struct mtmips_pmx_group *data)
> {
> - struct ralink_priv *p;
> + struct mtmips_priv *p;
> struct pinctrl_dev *dev;
> int err;
>
> @@ -324,23 +324,23 @@ int ralink_pinctrl_init(struct platform_device *pdev,
> return -ENOTSUPP;
>
> /* setup the private data */
> - p = devm_kzalloc(&pdev->dev, sizeof(struct ralink_priv), GFP_KERNEL);
> + p = devm_kzalloc(&pdev->dev, sizeof(struct mtmips_priv), GFP_KERNEL);
> if (!p)
> return -ENOMEM;
>
> p->dev = &pdev->dev;
> - p->desc = &ralink_pctrl_desc;
> + p->desc = &mtmips_pctrl_desc;
> p->groups = data;
> platform_set_drvdata(pdev, p);
>
> /* init the device */
> - err = ralink_pinctrl_index(p);
> + err = mtmips_pinctrl_index(p);
> if (err) {
> dev_err(&pdev->dev, "failed to load index\n");
> return err;
> }
>
> - err = ralink_pinctrl_pins(p);
> + err = mtmips_pinctrl_pins(p);
> if (err) {
> dev_err(&pdev->dev, "failed to load pins\n");
> return err;
> diff --git a/drivers/pinctrl/ralink/pinctrl-ralink.h b/drivers/pinctrl/mediatek/pinctrl-mtmips.h
> similarity index 75%
> rename from drivers/pinctrl/ralink/pinctrl-ralink.h
> rename to drivers/pinctrl/mediatek/pinctrl-mtmips.h
> index e6037be1e153..a7c3dd724431 100644
> --- a/drivers/pinctrl/ralink/pinctrl-ralink.h
> +++ b/drivers/pinctrl/mediatek/pinctrl-mtmips.h
> @@ -3,8 +3,8 @@
> * Copyright (C) 2012 John Crispin <[email protected]>
> */
>
> -#ifndef _PINCTRL_RALINK_H__
> -#define _PINCTRL_RALINK_H__
> +#ifndef _PINCTRL_MTMIPS_H__
> +#define _PINCTRL_MTMIPS_H__
>
> #define FUNC(name, value, pin_first, pin_count) \
> { name, value, pin_first, pin_count }
> @@ -19,9 +19,9 @@
> .func = _func, .gpio = _gpio, \
> .func_count = ARRAY_SIZE(_func) }
>
> -struct ralink_pmx_group;
> +struct mtmips_pmx_group;
>
> -struct ralink_pmx_func {
> +struct mtmips_pmx_func {
> const char *name;
> const char value;
>
> @@ -35,7 +35,7 @@ struct ralink_pmx_func {
> int enabled;
> };
>
> -struct ralink_pmx_group {
> +struct mtmips_pmx_group {
> const char *name;
> int enabled;
>
> @@ -43,11 +43,11 @@ struct ralink_pmx_group {
> const char mask;
> const char gpio;
>
> - struct ralink_pmx_func *func;
> + struct mtmips_pmx_func *func;
> int func_count;
> };
>
> -int ralink_pinctrl_init(struct platform_device *pdev,
> - struct ralink_pmx_group *data);
> +int mtmips_pinctrl_init(struct platform_device *pdev,
> + struct mtmips_pmx_group *data);
>
> #endif
> diff --git a/drivers/pinctrl/ralink/pinctrl-rt2880.c b/drivers/pinctrl/mediatek/pinctrl-rt2880.c
> similarity index 71%
> rename from drivers/pinctrl/ralink/pinctrl-rt2880.c
> rename to drivers/pinctrl/mediatek/pinctrl-rt2880.c
> index d7a65fcc7755..e0366721a515 100644
> --- a/drivers/pinctrl/ralink/pinctrl-rt2880.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-rt2880.c
> @@ -4,7 +4,7 @@
> #include <linux/module.h>
> #include <linux/platform_device.h>
> #include <linux/of.h>
> -#include "pinctrl-ralink.h"
> +#include "pinctrl-mtmips.h"
>
> #define RT2880_GPIO_MODE_I2C BIT(0)
> #define RT2880_GPIO_MODE_UART0 BIT(1)
> @@ -15,15 +15,15 @@
> #define RT2880_GPIO_MODE_SDRAM BIT(6)
> #define RT2880_GPIO_MODE_PCI BIT(7)
>
> -static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> -static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> -static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 7, 8) };
> -static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
> -static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
> -static struct ralink_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
> -static struct ralink_pmx_func pci_grp[] = { FUNC("pci", 0, 40, 32) };
> +static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> +static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> +static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 7, 8) };
> +static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
> +static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
> +static struct mtmips_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
> +static struct mtmips_pmx_func pci_grp[] = { FUNC("pci", 0, 40, 32) };
>
> -static struct ralink_pmx_group rt2880_pinmux_data_act[] = {
> +static struct mtmips_pmx_group rt2880_pinmux_data_act[] = {
> GRP("i2c", i2c_grp, 1, RT2880_GPIO_MODE_I2C),
> GRP("spi", spi_grp, 1, RT2880_GPIO_MODE_SPI),
> GRP("uartlite", uartlite_grp, 1, RT2880_GPIO_MODE_UART0),
> @@ -36,7 +36,7 @@ static struct ralink_pmx_group rt2880_pinmux_data_act[] = {
>
> static int rt2880_pinctrl_probe(struct platform_device *pdev)
> {
> - return ralink_pinctrl_init(pdev, rt2880_pinmux_data_act);
> + return mtmips_pinctrl_init(pdev, rt2880_pinmux_data_act);
> }
>
> static const struct of_device_id rt2880_pinctrl_match[] = {
> diff --git a/drivers/pinctrl/ralink/pinctrl-rt305x.c b/drivers/pinctrl/mediatek/pinctrl-rt305x.c
> similarity index 75%
> rename from drivers/pinctrl/ralink/pinctrl-rt305x.c
> rename to drivers/pinctrl/mediatek/pinctrl-rt305x.c
> index fa3743c7680f..77bd4d1f6122 100644
> --- a/drivers/pinctrl/ralink/pinctrl-rt305x.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-rt305x.c
> @@ -5,7 +5,7 @@
> #include <linux/module.h>
> #include <linux/platform_device.h>
> #include <linux/of.h>
> -#include "pinctrl-ralink.h"
> +#include "pinctrl-mtmips.h"
>
> #define RT305X_GPIO_MODE_UART0_SHIFT 2
> #define RT305X_GPIO_MODE_UART0_MASK 0x7
> @@ -31,9 +31,9 @@
> #define RT3352_GPIO_MODE_LNA 18
> #define RT3352_GPIO_MODE_PA 20
>
> -static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> -static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> -static struct ralink_pmx_func uartf_grp[] = {
> +static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> +static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> +static struct mtmips_pmx_func uartf_grp[] = {
> FUNC("uartf", RT305X_GPIO_MODE_UARTF, 7, 8),
> FUNC("pcm uartf", RT305X_GPIO_MODE_PCM_UARTF, 7, 8),
> FUNC("pcm i2s", RT305X_GPIO_MODE_PCM_I2S, 7, 8),
> @@ -42,28 +42,28 @@ static struct ralink_pmx_func uartf_grp[] = {
> FUNC("gpio uartf", RT305X_GPIO_MODE_GPIO_UARTF, 7, 4),
> FUNC("gpio i2s", RT305X_GPIO_MODE_GPIO_I2S, 7, 4),
> };
> -static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
> -static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
> -static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
> -static struct ralink_pmx_func rt5350_led_grp[] = { FUNC("led", 0, 22, 5) };
> -static struct ralink_pmx_func rt5350_cs1_grp[] = {
> +static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
> +static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
> +static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
> +static struct mtmips_pmx_func rt5350_led_grp[] = { FUNC("led", 0, 22, 5) };
> +static struct mtmips_pmx_func rt5350_cs1_grp[] = {
> FUNC("spi_cs1", 0, 27, 1),
> FUNC("wdg_cs1", 1, 27, 1),
> };
> -static struct ralink_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
> -static struct ralink_pmx_func rt3352_rgmii_grp[] = {
> +static struct mtmips_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
> +static struct mtmips_pmx_func rt3352_rgmii_grp[] = {
> FUNC("rgmii", 0, 24, 12)
> };
> -static struct ralink_pmx_func rgmii_grp[] = { FUNC("rgmii", 0, 40, 12) };
> -static struct ralink_pmx_func rt3352_lna_grp[] = { FUNC("lna", 0, 36, 2) };
> -static struct ralink_pmx_func rt3352_pa_grp[] = { FUNC("pa", 0, 38, 2) };
> -static struct ralink_pmx_func rt3352_led_grp[] = { FUNC("led", 0, 40, 5) };
> -static struct ralink_pmx_func rt3352_cs1_grp[] = {
> +static struct mtmips_pmx_func rgmii_grp[] = { FUNC("rgmii", 0, 40, 12) };
> +static struct mtmips_pmx_func rt3352_lna_grp[] = { FUNC("lna", 0, 36, 2) };
> +static struct mtmips_pmx_func rt3352_pa_grp[] = { FUNC("pa", 0, 38, 2) };
> +static struct mtmips_pmx_func rt3352_led_grp[] = { FUNC("led", 0, 40, 5) };
> +static struct mtmips_pmx_func rt3352_cs1_grp[] = {
> FUNC("spi_cs1", 0, 45, 1),
> FUNC("wdg_cs1", 1, 45, 1),
> };
>
> -static struct ralink_pmx_group rt3050_pinmux_data[] = {
> +static struct mtmips_pmx_group rt3050_pinmux_data[] = {
> GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C),
> GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI),
> GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK,
> @@ -76,7 +76,7 @@ static struct ralink_pmx_group rt3050_pinmux_data[] = {
> { 0 }
> };
>
> -static struct ralink_pmx_group rt3352_pinmux_data[] = {
> +static struct mtmips_pmx_group rt3352_pinmux_data[] = {
> GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C),
> GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI),
> GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK,
> @@ -92,7 +92,7 @@ static struct ralink_pmx_group rt3352_pinmux_data[] = {
> { 0 }
> };
>
> -static struct ralink_pmx_group rt5350_pinmux_data[] = {
> +static struct mtmips_pmx_group rt5350_pinmux_data[] = {
> GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C),
> GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI),
> GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK,
> @@ -107,11 +107,11 @@ static struct ralink_pmx_group rt5350_pinmux_data[] = {
> static int rt305x_pinctrl_probe(struct platform_device *pdev)
> {
> if (soc_is_rt5350())
> - return ralink_pinctrl_init(pdev, rt5350_pinmux_data);
> + return mtmips_pinctrl_init(pdev, rt5350_pinmux_data);
> else if (soc_is_rt305x() || soc_is_rt3350())
> - return ralink_pinctrl_init(pdev, rt3050_pinmux_data);
> + return mtmips_pinctrl_init(pdev, rt3050_pinmux_data);
> else if (soc_is_rt3352())
> - return ralink_pinctrl_init(pdev, rt3352_pinmux_data);
> + return mtmips_pinctrl_init(pdev, rt3352_pinmux_data);
> else
> return -EINVAL;
> }
> diff --git a/drivers/pinctrl/ralink/pinctrl-rt3883.c b/drivers/pinctrl/mediatek/pinctrl-rt3883.c
> similarity index 80%
> rename from drivers/pinctrl/ralink/pinctrl-rt3883.c
> rename to drivers/pinctrl/mediatek/pinctrl-rt3883.c
> index 5f766d76bafa..eeaf344c3647 100644
> --- a/drivers/pinctrl/ralink/pinctrl-rt3883.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-rt3883.c
> @@ -3,7 +3,7 @@
> #include <linux/module.h>
> #include <linux/platform_device.h>
> #include <linux/of.h>
> -#include "pinctrl-ralink.h"
> +#include "pinctrl-mtmips.h"
>
> #define RT3883_GPIO_MODE_UART0_SHIFT 2
> #define RT3883_GPIO_MODE_UART0_MASK 0x7
> @@ -39,9 +39,9 @@
> #define RT3883_GPIO_MODE_LNA_G_GPIO 0x3
> #define RT3883_GPIO_MODE_LNA_G _RT3883_GPIO_MODE_LNA_G(RT3883_GPIO_MODE_LNA_G_MASK)
>
> -static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> -static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> -static struct ralink_pmx_func uartf_grp[] = {
> +static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> +static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> +static struct mtmips_pmx_func uartf_grp[] = {
> FUNC("uartf", RT3883_GPIO_MODE_UARTF, 7, 8),
> FUNC("pcm uartf", RT3883_GPIO_MODE_PCM_UARTF, 7, 8),
> FUNC("pcm i2s", RT3883_GPIO_MODE_PCM_I2S, 7, 8),
> @@ -50,21 +50,21 @@ static struct ralink_pmx_func uartf_grp[] = {
> FUNC("gpio uartf", RT3883_GPIO_MODE_GPIO_UARTF, 7, 4),
> FUNC("gpio i2s", RT3883_GPIO_MODE_GPIO_I2S, 7, 4),
> };
> -static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
> -static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
> -static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
> -static struct ralink_pmx_func lna_a_grp[] = { FUNC("lna a", 0, 32, 3) };
> -static struct ralink_pmx_func lna_g_grp[] = { FUNC("lna g", 0, 35, 3) };
> -static struct ralink_pmx_func pci_grp[] = {
> +static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
> +static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
> +static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
> +static struct mtmips_pmx_func lna_a_grp[] = { FUNC("lna a", 0, 32, 3) };
> +static struct mtmips_pmx_func lna_g_grp[] = { FUNC("lna g", 0, 35, 3) };
> +static struct mtmips_pmx_func pci_grp[] = {
> FUNC("pci-dev", 0, 40, 32),
> FUNC("pci-host2", 1, 40, 32),
> FUNC("pci-host1", 2, 40, 32),
> FUNC("pci-fnc", 3, 40, 32)
> };
> -static struct ralink_pmx_func ge1_grp[] = { FUNC("ge1", 0, 72, 12) };
> -static struct ralink_pmx_func ge2_grp[] = { FUNC("ge2", 0, 84, 12) };
> +static struct mtmips_pmx_func ge1_grp[] = { FUNC("ge1", 0, 72, 12) };
> +static struct mtmips_pmx_func ge2_grp[] = { FUNC("ge2", 0, 84, 12) };
>
> -static struct ralink_pmx_group rt3883_pinmux_data[] = {
> +static struct mtmips_pmx_group rt3883_pinmux_data[] = {
> GRP("i2c", i2c_grp, 1, RT3883_GPIO_MODE_I2C),
> GRP("spi", spi_grp, 1, RT3883_GPIO_MODE_SPI),
> GRP("uartf", uartf_grp, RT3883_GPIO_MODE_UART0_MASK,
> @@ -83,7 +83,7 @@ static struct ralink_pmx_group rt3883_pinmux_data[] = {
>
> static int rt3883_pinctrl_probe(struct platform_device *pdev)
> {
> - return ralink_pinctrl_init(pdev, rt3883_pinmux_data);
> + return mtmips_pinctrl_init(pdev, rt3883_pinmux_data);
> }
>
> static const struct of_device_id rt3883_pinctrl_match[] = {
> diff --git a/drivers/pinctrl/ralink/Kconfig b/drivers/pinctrl/ralink/Kconfig
> deleted file mode 100644
> index c5fe4c31aaea..000000000000
> --- a/drivers/pinctrl/ralink/Kconfig
> +++ /dev/null
> @@ -1,40 +0,0 @@
> -# SPDX-License-Identifier: GPL-2.0-only
> -menu "Ralink pinctrl drivers"
> - depends on RALINK
> -
> -config PINCTRL_RALINK
> - bool "Ralink pinctrl driver"
> - select PINMUX
> - select GENERIC_PINCONF
> -
> -config PINCTRL_MT7620
> - bool "MT7620 pinctrl subdriver"
> - depends on RALINK && SOC_MT7620
> - select PINCTRL_RALINK
> -
> -config PINCTRL_MT7621
> - bool "MT7621 pinctrl subdriver"
> - depends on RALINK && SOC_MT7621
> - select PINCTRL_RALINK
> -
> -config PINCTRL_MT76X8
> - bool "MT76X8 pinctrl subdriver"
> - depends on RALINK && SOC_MT7620
> - select PINCTRL_RALINK
> -
> -config PINCTRL_RT2880
> - bool "RT2880 pinctrl subdriver"
> - depends on RALINK && SOC_RT288X
> - select PINCTRL_RALINK
> -
> -config PINCTRL_RT305X
> - bool "RT305X pinctrl subdriver"
> - depends on RALINK && SOC_RT305X
> - select PINCTRL_RALINK
> -
> -config PINCTRL_RT3883
> - bool "RT3883 pinctrl subdriver"
> - depends on RALINK && SOC_RT3883
> - select PINCTRL_RALINK
> -
> -endmenu
> diff --git a/drivers/pinctrl/ralink/Makefile b/drivers/pinctrl/ralink/Makefile
> deleted file mode 100644
> index be9acf2e27fd..000000000000
> --- a/drivers/pinctrl/ralink/Makefile
> +++ /dev/null
> @@ -1,9 +0,0 @@
> -# SPDX-License-Identifier: GPL-2.0
> -obj-$(CONFIG_PINCTRL_RALINK) += pinctrl-ralink.o
> -
> -obj-$(CONFIG_PINCTRL_MT7620) += pinctrl-mt7620.o
> -obj-$(CONFIG_PINCTRL_MT7621) += pinctrl-mt7621.o
> -obj-$(CONFIG_PINCTRL_MT76X8) += pinctrl-mt76x8.o
> -obj-$(CONFIG_PINCTRL_RT2880) += pinctrl-rt2880.o
> -obj-$(CONFIG_PINCTRL_RT305X) += pinctrl-rt305x.o
> -obj-$(CONFIG_PINCTRL_RT3883) += pinctrl-rt3883.o
> --
> 2.37.2
>
On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
>
> From: Arınç ÜNAL <[email protected]>
>
> The OF_GPIO option is enabled by default when GPIOLIB is enabled, and
> cannot be disabled. Remove it as a reverse dependency where GPIOLIB is also
> set as a reverse dependency.
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> drivers/pinctrl/mediatek/Kconfig | 3 ---
> 1 file changed, 3 deletions(-)
>
Reviewed-by: Sergio Paracuellos <[email protected]>
Thanks,
Sergio Paracuellos
On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
>
> From: Arınç ÜNAL <[email protected]>
>
> The Ralink pinctrl driver is now under the name of MediaTek MIPS pin
> controller. Move the maintainer information accordingly. Add dt-binding
> schema files. Add [email protected] as an associated
> mailing list.
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> MAINTAINERS | 29 ++++++++++++++++++++++-------
> 1 file changed, 22 insertions(+), 7 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 8a851eb053ca..83fa1e9651ef 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -16541,6 +16541,28 @@ F: Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
> F: Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
> F: drivers/pinctrl/mediatek/
>
> +PIN CONTROLLER - MEDIATEK MIPS
> +M: Arınç ÜNAL <[email protected]>
> +M: Sergio Paracuellos <[email protected]>
> +L: [email protected] (moderated for non-subscribers)
> +L: [email protected]
> +S: Maintained
> +F: Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
> +F: Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml
> +F: Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml
> +F: Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml
> +F: Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
> +F: Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml
> +F: Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml
> +F: Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml
> +F: drivers/pinctrl/mediatek/pinctrl-mt7620.c
> +F: drivers/pinctrl/mediatek/pinctrl-mt7621.c
> +F: drivers/pinctrl/mediatek/pinctrl-mt76x8.c
> +F: drivers/pinctrl/mediatek/pinctrl-mtmips.*
> +F: drivers/pinctrl/mediatek/pinctrl-rt2880.c
> +F: drivers/pinctrl/mediatek/pinctrl-rt305x.c
> +F: drivers/pinctrl/mediatek/pinctrl-rt3883.c
> +
> PIN CONTROLLER - MICROCHIP AT91
> M: Ludovic Desroches <[email protected]>
> L: [email protected] (moderated for non-subscribers)
> @@ -17486,13 +17508,6 @@ L: [email protected]
> S: Maintained
> F: arch/mips/boot/dts/ralink/mt7621*
>
> -RALINK PINCTRL DRIVER
> -M: Arınç ÜNAL <[email protected]>
> -M: Sergio Paracuellos <[email protected]>
> -L: [email protected]
> -S: Maintained
> -F: drivers/pinctrl/ralink/
> -
> RALINK RT2X00 WIRELESS LAN DRIVER
> M: Stanislaw Gruszka <[email protected]>
> M: Helmut Schaa <[email protected]>
> --
> 2.37.2
>
Acked-by: Sergio Paracuellos <[email protected]>
Thanks,
Sergio Paracuellos
On Fri, Mar 3, 2023 at 7:17 AM Sergio Paracuellos
<[email protected]> wrote:
>
> Hi Arınç,
>
> On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
> >
> > From: Arınç ÜNAL <[email protected]>
> >
> > This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
> > introduced new SoCs which utilise this platform. Move the driver to
> > mediatek pinctrl directory. Rename the ralink core driver to mtmips.
> >
> > Signed-off-by: Arınç ÜNAL <[email protected]>
> > ---
> > drivers/pinctrl/Kconfig | 1 -
> > drivers/pinctrl/Makefile | 1 -
> > drivers/pinctrl/mediatek/Kconfig | 51 ++++++++++-
> > drivers/pinctrl/mediatek/Makefile | 63 +++++++------
> > .../{ralink => mediatek}/pinctrl-mt7620.c | 34 +++----
> > .../{ralink => mediatek}/pinctrl-mt7621.c | 30 +++----
> > .../{ralink => mediatek}/pinctrl-mt76x8.c | 60 ++++++-------
> > .../pinctrl-mtmips.c} | 90 +++++++++----------
> > .../pinctrl-mtmips.h} | 16 ++--
> > .../{ralink => mediatek}/pinctrl-rt2880.c | 20 ++---
> > .../{ralink => mediatek}/pinctrl-rt305x.c | 44 ++++-----
> > .../{ralink => mediatek}/pinctrl-rt3883.c | 28 +++---
> > drivers/pinctrl/ralink/Kconfig | 40 ---------
> > drivers/pinctrl/ralink/Makefile | 9 --
> > 14 files changed, 246 insertions(+), 241 deletions(-)
> > rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7620.c (81%)
> > rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7621.c (80%)
> > rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt76x8.c (81%)
> > rename drivers/pinctrl/{ralink/pinctrl-ralink.c => mediatek/pinctrl-mtmips.c} (74%)
> > rename drivers/pinctrl/{ralink/pinctrl-ralink.h => mediatek/pinctrl-mtmips.h} (75%)
> > rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt2880.c (71%)
> > rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt305x.c (75%)
> > rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt3883.c (80%)
> > delete mode 100644 drivers/pinctrl/ralink/Kconfig
> > delete mode 100644 drivers/pinctrl/ralink/Makefile
> >
> > diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> > index dcb53c4a9584..8a6012770640 100644
> > --- a/drivers/pinctrl/Kconfig
> > +++ b/drivers/pinctrl/Kconfig
> > @@ -537,7 +537,6 @@ source "drivers/pinctrl/nomadik/Kconfig"
> > source "drivers/pinctrl/nuvoton/Kconfig"
> > source "drivers/pinctrl/pxa/Kconfig"
> > source "drivers/pinctrl/qcom/Kconfig"
> > -source "drivers/pinctrl/ralink/Kconfig"
> > source "drivers/pinctrl/renesas/Kconfig"
> > source "drivers/pinctrl/samsung/Kconfig"
> > source "drivers/pinctrl/spear/Kconfig"
> > diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
> > index d5939840bb2a..ada6ed1d4e91 100644
> > --- a/drivers/pinctrl/Makefile
> > +++ b/drivers/pinctrl/Makefile
> > @@ -66,7 +66,6 @@ obj-y += nomadik/
> > obj-y += nuvoton/
> > obj-$(CONFIG_PINCTRL_PXA) += pxa/
> > obj-$(CONFIG_ARCH_QCOM) += qcom/
> > -obj-$(CONFIG_PINCTRL_RALINK) += ralink/
> > obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
> > obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
> > obj-$(CONFIG_PINCTRL_SPEAR) += spear/
> > diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
> > index a71874fed3d6..2eeb55010563 100644
> > --- a/drivers/pinctrl/mediatek/Kconfig
> > +++ b/drivers/pinctrl/mediatek/Kconfig
> > @@ -1,6 +1,6 @@
> > # SPDX-License-Identifier: GPL-2.0-only
> > menu "MediaTek pinctrl drivers"
> > - depends on ARCH_MEDIATEK || COMPILE_TEST
> > + depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST
> >
> > config EINT_MTK
> > tristate "MediaTek External Interrupt Support"
> > @@ -22,6 +22,12 @@ config PINCTRL_MTK
> > config PINCTRL_MTK_V2
> > tristate
> >
> > +config PINCTRL_MTK_MTMIPS
> > + bool
> > + depends on RALINK
> > + select PINMUX
> > + select GENERIC_PINCONF
> > +
> > config PINCTRL_MTK_MOORE
> > bool
> > depends on OF
> > @@ -43,6 +49,49 @@ config PINCTRL_MTK_PARIS
> > select OF_GPIO
> > select PINCTRL_MTK_V2
> >
> > +# For MIPS SoCs
> > +config PINCTRL_MT7620
> > + bool "MediaTek MT7620 pin control"
> > + depends on SOC_MT7620 || COMPILE_TEST
> > + depends on RALINK
> > + default SOC_MT7620
> > + select PINCTRL_MTK_MTMIPS
> > +
> > +config PINCTRL_MT7621
> > + bool "MediaTek MT7621 pin control"
> > + depends on SOC_MT7621 || COMPILE_TEST
> > + depends on RALINK
> > + default SOC_MT7621
> > + select PINCTRL_MTK_MTMIPS
> > +
> > +config PINCTRL_MT76X8
> > + bool "MediaTek MT76X8 pin control"
> > + depends on SOC_MT7620 || COMPILE_TEST
> > + depends on RALINK
> > + default SOC_MT7620
> > + select PINCTRL_MTK_MTMIPS
> > +
> > +config PINCTRL_RT2880
> > + bool "Ralink RT2880 pin control"
> > + depends on SOC_RT288X || COMPILE_TEST
> > + depends on RALINK
> > + default SOC_RT288X
> > + select PINCTRL_MTK_MTMIPS
> > +
> > +config PINCTRL_RT305X
> > + bool "Ralink RT305X pin control"
> > + depends on SOC_RT305X || COMPILE_TEST
> > + depends on RALINK
> > + default SOC_RT305X
> > + select PINCTRL_MTK_MTMIPS
> > +
> > +config PINCTRL_RT3883
> > + bool "Ralink RT3883 pin control"
> > + depends on SOC_RT3883 || COMPILE_TEST
> > + depends on RALINK
> > + default SOC_RT3883
> > + select PINCTRL_MTK_MTMIPS
> > +
>
> I am not a Kconfig expert at all but...
>
> Should not all of these be depends on SOC_XXX || (COMPILE_TEST &&
> RALINK) and avoid the " depends on RALINK" next line in all of them?
>
> Just asking since we have yet arch read and write register operations
> in pinctrl common ralink code. Having in this way, when we address
> this arch thing in the next series just removing the "&& RALINK" part
> makes the review pretty obvious.
>
> Other than that, changes look good to me.
I think "depends on SOC_XXX || (COMPILE_TEST && MIPS)" would work also
and might be more accurate for compile testing targets.
Thanks,
Sergio Paracuellos
>
>
> > # For ARMv7 SoCs
> > config PINCTRL_MT2701
> > bool "MediaTek MT2701 pin control"
> > diff --git a/drivers/pinctrl/mediatek/Makefile b/drivers/pinctrl/mediatek/Makefile
> > index 44d197af516a..680f7e8526e0 100644
> > --- a/drivers/pinctrl/mediatek/Makefile
> > +++ b/drivers/pinctrl/mediatek/Makefile
> > @@ -1,32 +1,39 @@
> > # SPDX-License-Identifier: GPL-2.0
> > # Core
> > -obj-$(CONFIG_EINT_MTK) += mtk-eint.o
> > -obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o
> > -obj-$(CONFIG_PINCTRL_MTK_V2) += pinctrl-mtk-common-v2.o
> > -obj-$(CONFIG_PINCTRL_MTK_MOORE) += pinctrl-moore.o
> > -obj-$(CONFIG_PINCTRL_MTK_PARIS) += pinctrl-paris.o
> > +obj-$(CONFIG_EINT_MTK) += mtk-eint.o
> > +obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o
> > +obj-$(CONFIG_PINCTRL_MTK_V2) += pinctrl-mtk-common-v2.o
> > +obj-$(CONFIG_PINCTRL_MTK_MTMIPS) += pinctrl-mtmips.o
> > +obj-$(CONFIG_PINCTRL_MTK_MOORE) += pinctrl-moore.o
> > +obj-$(CONFIG_PINCTRL_MTK_PARIS) += pinctrl-paris.o
> >
> > # SoC Drivers
> > -obj-$(CONFIG_PINCTRL_MT2701) += pinctrl-mt2701.o
> > -obj-$(CONFIG_PINCTRL_MT2712) += pinctrl-mt2712.o
> > -obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o
> > -obj-$(CONFIG_PINCTRL_MT8127) += pinctrl-mt8127.o
> > -obj-$(CONFIG_PINCTRL_MT6765) += pinctrl-mt6765.o
> > -obj-$(CONFIG_PINCTRL_MT6779) += pinctrl-mt6779.o
> > -obj-$(CONFIG_PINCTRL_MT6795) += pinctrl-mt6795.o
> > -obj-$(CONFIG_PINCTRL_MT6797) += pinctrl-mt6797.o
> > -obj-$(CONFIG_PINCTRL_MT7622) += pinctrl-mt7622.o
> > -obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o
> > -obj-$(CONFIG_PINCTRL_MT7629) += pinctrl-mt7629.o
> > -obj-$(CONFIG_PINCTRL_MT7981) += pinctrl-mt7981.o
> > -obj-$(CONFIG_PINCTRL_MT7986) += pinctrl-mt7986.o
> > -obj-$(CONFIG_PINCTRL_MT8167) += pinctrl-mt8167.o
> > -obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o
> > -obj-$(CONFIG_PINCTRL_MT8183) += pinctrl-mt8183.o
> > -obj-$(CONFIG_PINCTRL_MT8186) += pinctrl-mt8186.o
> > -obj-$(CONFIG_PINCTRL_MT8188) += pinctrl-mt8188.o
> > -obj-$(CONFIG_PINCTRL_MT8192) += pinctrl-mt8192.o
> > -obj-$(CONFIG_PINCTRL_MT8195) += pinctrl-mt8195.o
> > -obj-$(CONFIG_PINCTRL_MT8365) += pinctrl-mt8365.o
> > -obj-$(CONFIG_PINCTRL_MT8516) += pinctrl-mt8516.o
> > -obj-$(CONFIG_PINCTRL_MT6397) += pinctrl-mt6397.o
> > +obj-$(CONFIG_PINCTRL_MT7620) += pinctrl-mt7620.o
> > +obj-$(CONFIG_PINCTRL_MT7621) += pinctrl-mt7621.o
> > +obj-$(CONFIG_PINCTRL_MT76X8) += pinctrl-mt76x8.o
> > +obj-$(CONFIG_PINCTRL_RT2880) += pinctrl-rt2880.o
> > +obj-$(CONFIG_PINCTRL_RT305X) += pinctrl-rt305x.o
> > +obj-$(CONFIG_PINCTRL_RT3883) += pinctrl-rt3883.o
> > +obj-$(CONFIG_PINCTRL_MT2701) += pinctrl-mt2701.o
> > +obj-$(CONFIG_PINCTRL_MT2712) += pinctrl-mt2712.o
> > +obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o
> > +obj-$(CONFIG_PINCTRL_MT8127) += pinctrl-mt8127.o
> > +obj-$(CONFIG_PINCTRL_MT6765) += pinctrl-mt6765.o
> > +obj-$(CONFIG_PINCTRL_MT6779) += pinctrl-mt6779.o
> > +obj-$(CONFIG_PINCTRL_MT6795) += pinctrl-mt6795.o
> > +obj-$(CONFIG_PINCTRL_MT6797) += pinctrl-mt6797.o
> > +obj-$(CONFIG_PINCTRL_MT7622) += pinctrl-mt7622.o
> > +obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o
> > +obj-$(CONFIG_PINCTRL_MT7629) += pinctrl-mt7629.o
> > +obj-$(CONFIG_PINCTRL_MT7981) += pinctrl-mt7981.o
> > +obj-$(CONFIG_PINCTRL_MT7986) += pinctrl-mt7986.o
> > +obj-$(CONFIG_PINCTRL_MT8167) += pinctrl-mt8167.o
> > +obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o
> > +obj-$(CONFIG_PINCTRL_MT8183) += pinctrl-mt8183.o
> > +obj-$(CONFIG_PINCTRL_MT8186) += pinctrl-mt8186.o
> > +obj-$(CONFIG_PINCTRL_MT8188) += pinctrl-mt8188.o
> > +obj-$(CONFIG_PINCTRL_MT8192) += pinctrl-mt8192.o
> > +obj-$(CONFIG_PINCTRL_MT8195) += pinctrl-mt8195.o
> > +obj-$(CONFIG_PINCTRL_MT8365) += pinctrl-mt8365.o
> > +obj-$(CONFIG_PINCTRL_MT8516) += pinctrl-mt8516.o
> > +obj-$(CONFIG_PINCTRL_MT6397) += pinctrl-mt6397.o
> > diff --git a/drivers/pinctrl/ralink/pinctrl-mt7620.c b/drivers/pinctrl/mediatek/pinctrl-mt7620.c
> > similarity index 81%
> > rename from drivers/pinctrl/ralink/pinctrl-mt7620.c
> > rename to drivers/pinctrl/mediatek/pinctrl-mt7620.c
> > index b2245fd65c72..1a2dbbdd25f1 100644
> > --- a/drivers/pinctrl/ralink/pinctrl-mt7620.c
> > +++ b/drivers/pinctrl/mediatek/pinctrl-mt7620.c
> > @@ -3,7 +3,7 @@
> > #include <linux/module.h>
> > #include <linux/platform_device.h>
> > #include <linux/of.h>
> > -#include "pinctrl-ralink.h"
> > +#include "pinctrl-mtmips.h"
> >
> > #define MT7620_GPIO_MODE_UART0_SHIFT 2
> > #define MT7620_GPIO_MODE_UART0_MASK 0x7
> > @@ -52,20 +52,20 @@
> > #define MT7620_GPIO_MODE_EPHY 15
> > #define MT7620_GPIO_MODE_PA 20
> >
> > -static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> > -static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> > -static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
> > -static struct ralink_pmx_func mdio_grp[] = {
> > +static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> > +static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> > +static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
> > +static struct mtmips_pmx_func mdio_grp[] = {
> > FUNC("mdio", MT7620_GPIO_MODE_MDIO, 22, 2),
> > FUNC("refclk", MT7620_GPIO_MODE_MDIO_REFCLK, 22, 2),
> > };
> > -static struct ralink_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 24, 12) };
> > -static struct ralink_pmx_func refclk_grp[] = { FUNC("spi refclk", 0, 37, 3) };
> > -static struct ralink_pmx_func ephy_grp[] = { FUNC("ephy", 0, 40, 5) };
> > -static struct ralink_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 60, 12) };
> > -static struct ralink_pmx_func wled_grp[] = { FUNC("wled", 0, 72, 1) };
> > -static struct ralink_pmx_func pa_grp[] = { FUNC("pa", 0, 18, 4) };
> > -static struct ralink_pmx_func uartf_grp[] = {
> > +static struct mtmips_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 24, 12) };
> > +static struct mtmips_pmx_func refclk_grp[] = { FUNC("spi refclk", 0, 37, 3) };
> > +static struct mtmips_pmx_func ephy_grp[] = { FUNC("ephy", 0, 40, 5) };
> > +static struct mtmips_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 60, 12) };
> > +static struct mtmips_pmx_func wled_grp[] = { FUNC("wled", 0, 72, 1) };
> > +static struct mtmips_pmx_func pa_grp[] = { FUNC("pa", 0, 18, 4) };
> > +static struct mtmips_pmx_func uartf_grp[] = {
> > FUNC("uartf", MT7620_GPIO_MODE_UARTF, 7, 8),
> > FUNC("pcm uartf", MT7620_GPIO_MODE_PCM_UARTF, 7, 8),
> > FUNC("pcm i2s", MT7620_GPIO_MODE_PCM_I2S, 7, 8),
> > @@ -74,20 +74,20 @@ static struct ralink_pmx_func uartf_grp[] = {
> > FUNC("gpio uartf", MT7620_GPIO_MODE_GPIO_UARTF, 7, 4),
> > FUNC("gpio i2s", MT7620_GPIO_MODE_GPIO_I2S, 7, 4),
> > };
> > -static struct ralink_pmx_func wdt_grp[] = {
> > +static struct mtmips_pmx_func wdt_grp[] = {
> > FUNC("wdt rst", 0, 17, 1),
> > FUNC("wdt refclk", 0, 17, 1),
> > };
> > -static struct ralink_pmx_func pcie_rst_grp[] = {
> > +static struct mtmips_pmx_func pcie_rst_grp[] = {
> > FUNC("pcie rst", MT7620_GPIO_MODE_PCIE_RST, 36, 1),
> > FUNC("pcie refclk", MT7620_GPIO_MODE_PCIE_REF, 36, 1)
> > };
> > -static struct ralink_pmx_func nd_sd_grp[] = {
> > +static struct mtmips_pmx_func nd_sd_grp[] = {
> > FUNC("nand", MT7620_GPIO_MODE_NAND, 45, 15),
> > FUNC("sd", MT7620_GPIO_MODE_SD, 47, 13)
> > };
> >
> > -static struct ralink_pmx_group mt7620a_pinmux_data[] = {
> > +static struct mtmips_pmx_group mt7620a_pinmux_data[] = {
> > GRP("i2c", i2c_grp, 1, MT7620_GPIO_MODE_I2C),
> > GRP("uartf", uartf_grp, MT7620_GPIO_MODE_UART0_MASK,
> > MT7620_GPIO_MODE_UART0_SHIFT),
> > @@ -112,7 +112,7 @@ static struct ralink_pmx_group mt7620a_pinmux_data[] = {
> >
> > static int mt7620_pinctrl_probe(struct platform_device *pdev)
> > {
> > - return ralink_pinctrl_init(pdev, mt7620a_pinmux_data);
> > + return mtmips_pinctrl_init(pdev, mt7620a_pinmux_data);
> > }
> >
> > static const struct of_device_id mt7620_pinctrl_match[] = {
> > diff --git a/drivers/pinctrl/ralink/pinctrl-mt7621.c b/drivers/pinctrl/mediatek/pinctrl-mt7621.c
> > similarity index 80%
> > rename from drivers/pinctrl/ralink/pinctrl-mt7621.c
> > rename to drivers/pinctrl/mediatek/pinctrl-mt7621.c
> > index 2128a94f6d1b..96c5ef942cf4 100644
> > --- a/drivers/pinctrl/ralink/pinctrl-mt7621.c
> > +++ b/drivers/pinctrl/mediatek/pinctrl-mt7621.c
> > @@ -3,7 +3,7 @@
> > #include <linux/module.h>
> > #include <linux/platform_device.h>
> > #include <linux/of.h>
> > -#include "pinctrl-ralink.h"
> > +#include "pinctrl-mtmips.h"
> >
> > #define MT7621_GPIO_MODE_UART1 1
> > #define MT7621_GPIO_MODE_I2C 2
> > @@ -34,40 +34,40 @@
> > #define MT7621_GPIO_MODE_SDHCI_SHIFT 18
> > #define MT7621_GPIO_MODE_SDHCI_GPIO 1
> >
> > -static struct ralink_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) };
> > -static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) };
> > -static struct ralink_pmx_func uart3_grp[] = {
> > +static struct mtmips_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) };
> > +static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) };
> > +static struct mtmips_pmx_func uart3_grp[] = {
> > FUNC("uart3", 0, 5, 4),
> > FUNC("i2s", 2, 5, 4),
> > FUNC("spdif3", 3, 5, 4),
> > };
> > -static struct ralink_pmx_func uart2_grp[] = {
> > +static struct mtmips_pmx_func uart2_grp[] = {
> > FUNC("uart2", 0, 9, 4),
> > FUNC("pcm", 2, 9, 4),
> > FUNC("spdif2", 3, 9, 4),
> > };
> > -static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 13, 5) };
> > -static struct ralink_pmx_func wdt_grp[] = {
> > +static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 13, 5) };
> > +static struct mtmips_pmx_func wdt_grp[] = {
> > FUNC("wdt rst", 0, 18, 1),
> > FUNC("wdt refclk", 2, 18, 1),
> > };
> > -static struct ralink_pmx_func pcie_rst_grp[] = {
> > +static struct mtmips_pmx_func pcie_rst_grp[] = {
> > FUNC("pcie rst", MT7621_GPIO_MODE_PCIE_RST, 19, 1),
> > FUNC("pcie refclk", MT7621_GPIO_MODE_PCIE_REF, 19, 1)
> > };
> > -static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 20, 2) };
> > -static struct ralink_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 22, 12) };
> > -static struct ralink_pmx_func spi_grp[] = {
> > +static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 20, 2) };
> > +static struct mtmips_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 22, 12) };
> > +static struct mtmips_pmx_func spi_grp[] = {
> > FUNC("spi", 0, 34, 7),
> > FUNC("nand1", 2, 34, 7),
> > };
> > -static struct ralink_pmx_func sdhci_grp[] = {
> > +static struct mtmips_pmx_func sdhci_grp[] = {
> > FUNC("sdhci", 0, 41, 8),
> > FUNC("nand2", 2, 41, 8),
> > };
> > -static struct ralink_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 49, 12) };
> > +static struct mtmips_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 49, 12) };
> >
> > -static struct ralink_pmx_group mt7621_pinmux_data[] = {
> > +static struct mtmips_pmx_group mt7621_pinmux_data[] = {
> > GRP("uart1", uart1_grp, 1, MT7621_GPIO_MODE_UART1),
> > GRP("i2c", i2c_grp, 1, MT7621_GPIO_MODE_I2C),
> > GRP_G("uart3", uart3_grp, MT7621_GPIO_MODE_UART3_MASK,
> > @@ -92,7 +92,7 @@ static struct ralink_pmx_group mt7621_pinmux_data[] = {
> >
> > static int mt7621_pinctrl_probe(struct platform_device *pdev)
> > {
> > - return ralink_pinctrl_init(pdev, mt7621_pinmux_data);
> > + return mtmips_pinctrl_init(pdev, mt7621_pinmux_data);
> > }
> >
> > static const struct of_device_id mt7621_pinctrl_match[] = {
> > diff --git a/drivers/pinctrl/ralink/pinctrl-mt76x8.c b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
> > similarity index 81%
> > rename from drivers/pinctrl/ralink/pinctrl-mt76x8.c
> > rename to drivers/pinctrl/mediatek/pinctrl-mt76x8.c
> > index 5a6a82a58180..1d463bcfb1bd 100644
> > --- a/drivers/pinctrl/ralink/pinctrl-mt76x8.c
> > +++ b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
> > @@ -3,7 +3,7 @@
> > #include <linux/module.h>
> > #include <linux/platform_device.h>
> > #include <linux/of.h>
> > -#include "pinctrl-ralink.h"
> > +#include "pinctrl-mtmips.h"
> >
> > #define MT76X8_GPIO_MODE_MASK 0x3
> >
> > @@ -35,173 +35,173 @@
> > #define MT76X8_GPIO_MODE_SPIS 2
> > #define MT76X8_GPIO_MODE_GPIO 0
> >
> > -static struct ralink_pmx_func pwm1_grp[] = {
> > +static struct mtmips_pmx_func pwm1_grp[] = {
> > FUNC("sdxc d6", 3, 19, 1),
> > FUNC("utif", 2, 19, 1),
> > FUNC("gpio", 1, 19, 1),
> > FUNC("pwm1", 0, 19, 1),
> > };
> >
> > -static struct ralink_pmx_func pwm0_grp[] = {
> > +static struct mtmips_pmx_func pwm0_grp[] = {
> > FUNC("sdxc d7", 3, 18, 1),
> > FUNC("utif", 2, 18, 1),
> > FUNC("gpio", 1, 18, 1),
> > FUNC("pwm0", 0, 18, 1),
> > };
> >
> > -static struct ralink_pmx_func uart2_grp[] = {
> > +static struct mtmips_pmx_func uart2_grp[] = {
> > FUNC("sdxc d5 d4", 3, 20, 2),
> > FUNC("pwm", 2, 20, 2),
> > FUNC("gpio", 1, 20, 2),
> > FUNC("uart2", 0, 20, 2),
> > };
> >
> > -static struct ralink_pmx_func uart1_grp[] = {
> > +static struct mtmips_pmx_func uart1_grp[] = {
> > FUNC("sw_r", 3, 45, 2),
> > FUNC("pwm", 2, 45, 2),
> > FUNC("gpio", 1, 45, 2),
> > FUNC("uart1", 0, 45, 2),
> > };
> >
> > -static struct ralink_pmx_func i2c_grp[] = {
> > +static struct mtmips_pmx_func i2c_grp[] = {
> > FUNC("-", 3, 4, 2),
> > FUNC("debug", 2, 4, 2),
> > FUNC("gpio", 1, 4, 2),
> > FUNC("i2c", 0, 4, 2),
> > };
> >
> > -static struct ralink_pmx_func refclk_grp[] = { FUNC("refclk", 0, 37, 1) };
> > -static struct ralink_pmx_func perst_grp[] = { FUNC("perst", 0, 36, 1) };
> > -static struct ralink_pmx_func wdt_grp[] = { FUNC("wdt", 0, 38, 1) };
> > -static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 7, 4) };
> > +static struct mtmips_pmx_func refclk_grp[] = { FUNC("refclk", 0, 37, 1) };
> > +static struct mtmips_pmx_func perst_grp[] = { FUNC("perst", 0, 36, 1) };
> > +static struct mtmips_pmx_func wdt_grp[] = { FUNC("wdt", 0, 38, 1) };
> > +static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 7, 4) };
> >
> > -static struct ralink_pmx_func sd_mode_grp[] = {
> > +static struct mtmips_pmx_func sd_mode_grp[] = {
> > FUNC("jtag", 3, 22, 8),
> > FUNC("utif", 2, 22, 8),
> > FUNC("gpio", 1, 22, 8),
> > FUNC("sdxc", 0, 22, 8),
> > };
> >
> > -static struct ralink_pmx_func uart0_grp[] = {
> > +static struct mtmips_pmx_func uart0_grp[] = {
> > FUNC("-", 3, 12, 2),
> > FUNC("-", 2, 12, 2),
> > FUNC("gpio", 1, 12, 2),
> > FUNC("uart0", 0, 12, 2),
> > };
> >
> > -static struct ralink_pmx_func i2s_grp[] = {
> > +static struct mtmips_pmx_func i2s_grp[] = {
> > FUNC("antenna", 3, 0, 4),
> > FUNC("pcm", 2, 0, 4),
> > FUNC("gpio", 1, 0, 4),
> > FUNC("i2s", 0, 0, 4),
> > };
> >
> > -static struct ralink_pmx_func spi_cs1_grp[] = {
> > +static struct mtmips_pmx_func spi_cs1_grp[] = {
> > FUNC("-", 3, 6, 1),
> > FUNC("refclk", 2, 6, 1),
> > FUNC("gpio", 1, 6, 1),
> > FUNC("spi cs1", 0, 6, 1),
> > };
> >
> > -static struct ralink_pmx_func spis_grp[] = {
> > +static struct mtmips_pmx_func spis_grp[] = {
> > FUNC("pwm_uart2", 3, 14, 4),
> > FUNC("utif", 2, 14, 4),
> > FUNC("gpio", 1, 14, 4),
> > FUNC("spis", 0, 14, 4),
> > };
> >
> > -static struct ralink_pmx_func gpio_grp[] = {
> > +static struct mtmips_pmx_func gpio_grp[] = {
> > FUNC("pcie", 3, 11, 1),
> > FUNC("refclk", 2, 11, 1),
> > FUNC("gpio", 1, 11, 1),
> > FUNC("gpio", 0, 11, 1),
> > };
> >
> > -static struct ralink_pmx_func p4led_kn_grp[] = {
> > +static struct mtmips_pmx_func p4led_kn_grp[] = {
> > FUNC("jtag", 3, 30, 1),
> > FUNC("utif", 2, 30, 1),
> > FUNC("gpio", 1, 30, 1),
> > FUNC("p4led_kn", 0, 30, 1),
> > };
> >
> > -static struct ralink_pmx_func p3led_kn_grp[] = {
> > +static struct mtmips_pmx_func p3led_kn_grp[] = {
> > FUNC("jtag", 3, 31, 1),
> > FUNC("utif", 2, 31, 1),
> > FUNC("gpio", 1, 31, 1),
> > FUNC("p3led_kn", 0, 31, 1),
> > };
> >
> > -static struct ralink_pmx_func p2led_kn_grp[] = {
> > +static struct mtmips_pmx_func p2led_kn_grp[] = {
> > FUNC("jtag", 3, 32, 1),
> > FUNC("utif", 2, 32, 1),
> > FUNC("gpio", 1, 32, 1),
> > FUNC("p2led_kn", 0, 32, 1),
> > };
> >
> > -static struct ralink_pmx_func p1led_kn_grp[] = {
> > +static struct mtmips_pmx_func p1led_kn_grp[] = {
> > FUNC("jtag", 3, 33, 1),
> > FUNC("utif", 2, 33, 1),
> > FUNC("gpio", 1, 33, 1),
> > FUNC("p1led_kn", 0, 33, 1),
> > };
> >
> > -static struct ralink_pmx_func p0led_kn_grp[] = {
> > +static struct mtmips_pmx_func p0led_kn_grp[] = {
> > FUNC("jtag", 3, 34, 1),
> > FUNC("rsvd", 2, 34, 1),
> > FUNC("gpio", 1, 34, 1),
> > FUNC("p0led_kn", 0, 34, 1),
> > };
> >
> > -static struct ralink_pmx_func wled_kn_grp[] = {
> > +static struct mtmips_pmx_func wled_kn_grp[] = {
> > FUNC("rsvd", 3, 35, 1),
> > FUNC("rsvd", 2, 35, 1),
> > FUNC("gpio", 1, 35, 1),
> > FUNC("wled_kn", 0, 35, 1),
> > };
> >
> > -static struct ralink_pmx_func p4led_an_grp[] = {
> > +static struct mtmips_pmx_func p4led_an_grp[] = {
> > FUNC("jtag", 3, 39, 1),
> > FUNC("utif", 2, 39, 1),
> > FUNC("gpio", 1, 39, 1),
> > FUNC("p4led_an", 0, 39, 1),
> > };
> >
> > -static struct ralink_pmx_func p3led_an_grp[] = {
> > +static struct mtmips_pmx_func p3led_an_grp[] = {
> > FUNC("jtag", 3, 40, 1),
> > FUNC("utif", 2, 40, 1),
> > FUNC("gpio", 1, 40, 1),
> > FUNC("p3led_an", 0, 40, 1),
> > };
> >
> > -static struct ralink_pmx_func p2led_an_grp[] = {
> > +static struct mtmips_pmx_func p2led_an_grp[] = {
> > FUNC("jtag", 3, 41, 1),
> > FUNC("utif", 2, 41, 1),
> > FUNC("gpio", 1, 41, 1),
> > FUNC("p2led_an", 0, 41, 1),
> > };
> >
> > -static struct ralink_pmx_func p1led_an_grp[] = {
> > +static struct mtmips_pmx_func p1led_an_grp[] = {
> > FUNC("jtag", 3, 42, 1),
> > FUNC("utif", 2, 42, 1),
> > FUNC("gpio", 1, 42, 1),
> > FUNC("p1led_an", 0, 42, 1),
> > };
> >
> > -static struct ralink_pmx_func p0led_an_grp[] = {
> > +static struct mtmips_pmx_func p0led_an_grp[] = {
> > FUNC("jtag", 3, 43, 1),
> > FUNC("rsvd", 2, 43, 1),
> > FUNC("gpio", 1, 43, 1),
> > FUNC("p0led_an", 0, 43, 1),
> > };
> >
> > -static struct ralink_pmx_func wled_an_grp[] = {
> > +static struct mtmips_pmx_func wled_an_grp[] = {
> > FUNC("rsvd", 3, 44, 1),
> > FUNC("rsvd", 2, 44, 1),
> > FUNC("gpio", 1, 44, 1),
> > FUNC("wled_an", 0, 44, 1),
> > };
> >
> > -static struct ralink_pmx_group mt76x8_pinmux_data[] = {
> > +static struct mtmips_pmx_group mt76x8_pinmux_data[] = {
> > GRP_G("pwm1", pwm1_grp, MT76X8_GPIO_MODE_MASK,
> > 1, MT76X8_GPIO_MODE_PWM1),
> > GRP_G("pwm0", pwm0_grp, MT76X8_GPIO_MODE_MASK,
> > @@ -257,7 +257,7 @@ static struct ralink_pmx_group mt76x8_pinmux_data[] = {
> >
> > static int mt76x8_pinctrl_probe(struct platform_device *pdev)
> > {
> > - return ralink_pinctrl_init(pdev, mt76x8_pinmux_data);
> > + return mtmips_pinctrl_init(pdev, mt76x8_pinmux_data);
> > }
> >
> > static const struct of_device_id mt76x8_pinctrl_match[] = {
> > diff --git a/drivers/pinctrl/ralink/pinctrl-ralink.c b/drivers/pinctrl/mediatek/pinctrl-mtmips.c
> > similarity index 74%
> > rename from drivers/pinctrl/ralink/pinctrl-ralink.c
> > rename to drivers/pinctrl/mediatek/pinctrl-mtmips.c
> > index 770862f45b3f..efd77b6c56a1 100644
> > --- a/drivers/pinctrl/ralink/pinctrl-ralink.c
> > +++ b/drivers/pinctrl/mediatek/pinctrl-mtmips.c
> > @@ -19,23 +19,23 @@
> > #include <asm/mach-ralink/ralink_regs.h>
> > #include <asm/mach-ralink/mt7620.h>
> >
> > -#include "pinctrl-ralink.h"
> > +#include "pinctrl-mtmips.h"
> > #include "../core.h"
> > #include "../pinctrl-utils.h"
> >
> > #define SYSC_REG_GPIO_MODE 0x60
> > #define SYSC_REG_GPIO_MODE2 0x64
> >
> > -struct ralink_priv {
> > +struct mtmips_priv {
> > struct device *dev;
> >
> > struct pinctrl_pin_desc *pads;
> > struct pinctrl_desc *desc;
> >
> > - struct ralink_pmx_func **func;
> > + struct mtmips_pmx_func **func;
> > int func_count;
> >
> > - struct ralink_pmx_group *groups;
> > + struct mtmips_pmx_group *groups;
> > const char **group_names;
> > int group_count;
> >
> > @@ -43,27 +43,27 @@ struct ralink_priv {
> > int max_pins;
> > };
> >
> > -static int ralink_get_group_count(struct pinctrl_dev *pctrldev)
> > +static int mtmips_get_group_count(struct pinctrl_dev *pctrldev)
> > {
> > - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> > + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> >
> > return p->group_count;
> > }
> >
> > -static const char *ralink_get_group_name(struct pinctrl_dev *pctrldev,
> > +static const char *mtmips_get_group_name(struct pinctrl_dev *pctrldev,
> > unsigned int group)
> > {
> > - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> > + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> >
> > return (group >= p->group_count) ? NULL : p->group_names[group];
> > }
> >
> > -static int ralink_get_group_pins(struct pinctrl_dev *pctrldev,
> > +static int mtmips_get_group_pins(struct pinctrl_dev *pctrldev,
> > unsigned int group,
> > const unsigned int **pins,
> > unsigned int *num_pins)
> > {
> > - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> > + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> >
> > if (group >= p->group_count)
> > return -EINVAL;
> > @@ -74,35 +74,35 @@ static int ralink_get_group_pins(struct pinctrl_dev *pctrldev,
> > return 0;
> > }
> >
> > -static const struct pinctrl_ops ralink_pctrl_ops = {
> > - .get_groups_count = ralink_get_group_count,
> > - .get_group_name = ralink_get_group_name,
> > - .get_group_pins = ralink_get_group_pins,
> > +static const struct pinctrl_ops mtmips_pctrl_ops = {
> > + .get_groups_count = mtmips_get_group_count,
> > + .get_group_name = mtmips_get_group_name,
> > + .get_group_pins = mtmips_get_group_pins,
> > .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
> > .dt_free_map = pinconf_generic_dt_free_map,
> > };
> >
> > -static int ralink_pmx_func_count(struct pinctrl_dev *pctrldev)
> > +static int mtmips_pmx_func_count(struct pinctrl_dev *pctrldev)
> > {
> > - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> > + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> >
> > return p->func_count;
> > }
> >
> > -static const char *ralink_pmx_func_name(struct pinctrl_dev *pctrldev,
> > +static const char *mtmips_pmx_func_name(struct pinctrl_dev *pctrldev,
> > unsigned int func)
> > {
> > - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> > + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> >
> > return p->func[func]->name;
> > }
> >
> > -static int ralink_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
> > +static int mtmips_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
> > unsigned int func,
> > const char * const **groups,
> > unsigned int * const num_groups)
> > {
> > - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> > + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> >
> > if (p->func[func]->group_count == 1)
> > *groups = &p->group_names[p->func[func]->groups[0]];
> > @@ -114,10 +114,10 @@ static int ralink_pmx_group_get_groups(struct pinctrl_dev *pctrldev,
> > return 0;
> > }
> >
> > -static int ralink_pmx_group_enable(struct pinctrl_dev *pctrldev,
> > +static int mtmips_pmx_group_enable(struct pinctrl_dev *pctrldev,
> > unsigned int func, unsigned int group)
> > {
> > - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> > + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> > u32 mode = 0;
> > u32 reg = SYSC_REG_GPIO_MODE;
> > int i;
> > @@ -158,11 +158,11 @@ static int ralink_pmx_group_enable(struct pinctrl_dev *pctrldev,
> > return 0;
> > }
> >
> > -static int ralink_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
> > +static int mtmips_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
> > struct pinctrl_gpio_range *range,
> > unsigned int pin)
> > {
> > - struct ralink_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> > + struct mtmips_priv *p = pinctrl_dev_get_drvdata(pctrldev);
> >
> > if (!p->gpio[pin]) {
> > dev_err(p->dev, "pin %d is not set to gpio mux\n", pin);
> > @@ -172,28 +172,28 @@ static int ralink_pmx_group_gpio_request_enable(struct pinctrl_dev *pctrldev,
> > return 0;
> > }
> >
> > -static const struct pinmux_ops ralink_pmx_group_ops = {
> > - .get_functions_count = ralink_pmx_func_count,
> > - .get_function_name = ralink_pmx_func_name,
> > - .get_function_groups = ralink_pmx_group_get_groups,
> > - .set_mux = ralink_pmx_group_enable,
> > - .gpio_request_enable = ralink_pmx_group_gpio_request_enable,
> > +static const struct pinmux_ops mtmips_pmx_group_ops = {
> > + .get_functions_count = mtmips_pmx_func_count,
> > + .get_function_name = mtmips_pmx_func_name,
> > + .get_function_groups = mtmips_pmx_group_get_groups,
> > + .set_mux = mtmips_pmx_group_enable,
> > + .gpio_request_enable = mtmips_pmx_group_gpio_request_enable,
> > };
> >
> > -static struct pinctrl_desc ralink_pctrl_desc = {
> > +static struct pinctrl_desc mtmips_pctrl_desc = {
> > .owner = THIS_MODULE,
> > - .name = "ralink-pinctrl",
> > - .pctlops = &ralink_pctrl_ops,
> > - .pmxops = &ralink_pmx_group_ops,
> > + .name = "mtmips-pinctrl",
> > + .pctlops = &mtmips_pctrl_ops,
> > + .pmxops = &mtmips_pmx_group_ops,
> > };
> >
> > -static struct ralink_pmx_func gpio_func = {
> > +static struct mtmips_pmx_func gpio_func = {
> > .name = "gpio",
> > };
> >
> > -static int ralink_pinctrl_index(struct ralink_priv *p)
> > +static int mtmips_pinctrl_index(struct mtmips_priv *p)
> > {
> > - struct ralink_pmx_group *mux = p->groups;
> > + struct mtmips_pmx_group *mux = p->groups;
> > int i, j, c = 0;
> >
> > /* count the mux functions */
> > @@ -248,7 +248,7 @@ static int ralink_pinctrl_index(struct ralink_priv *p)
> > return 0;
> > }
> >
> > -static int ralink_pinctrl_pins(struct ralink_priv *p)
> > +static int mtmips_pinctrl_pins(struct mtmips_priv *p)
> > {
> > int i, j;
> >
> > @@ -313,10 +313,10 @@ static int ralink_pinctrl_pins(struct ralink_priv *p)
> > return 0;
> > }
> >
> > -int ralink_pinctrl_init(struct platform_device *pdev,
> > - struct ralink_pmx_group *data)
> > +int mtmips_pinctrl_init(struct platform_device *pdev,
> > + struct mtmips_pmx_group *data)
> > {
> > - struct ralink_priv *p;
> > + struct mtmips_priv *p;
> > struct pinctrl_dev *dev;
> > int err;
> >
> > @@ -324,23 +324,23 @@ int ralink_pinctrl_init(struct platform_device *pdev,
> > return -ENOTSUPP;
> >
> > /* setup the private data */
> > - p = devm_kzalloc(&pdev->dev, sizeof(struct ralink_priv), GFP_KERNEL);
> > + p = devm_kzalloc(&pdev->dev, sizeof(struct mtmips_priv), GFP_KERNEL);
> > if (!p)
> > return -ENOMEM;
> >
> > p->dev = &pdev->dev;
> > - p->desc = &ralink_pctrl_desc;
> > + p->desc = &mtmips_pctrl_desc;
> > p->groups = data;
> > platform_set_drvdata(pdev, p);
> >
> > /* init the device */
> > - err = ralink_pinctrl_index(p);
> > + err = mtmips_pinctrl_index(p);
> > if (err) {
> > dev_err(&pdev->dev, "failed to load index\n");
> > return err;
> > }
> >
> > - err = ralink_pinctrl_pins(p);
> > + err = mtmips_pinctrl_pins(p);
> > if (err) {
> > dev_err(&pdev->dev, "failed to load pins\n");
> > return err;
> > diff --git a/drivers/pinctrl/ralink/pinctrl-ralink.h b/drivers/pinctrl/mediatek/pinctrl-mtmips.h
> > similarity index 75%
> > rename from drivers/pinctrl/ralink/pinctrl-ralink.h
> > rename to drivers/pinctrl/mediatek/pinctrl-mtmips.h
> > index e6037be1e153..a7c3dd724431 100644
> > --- a/drivers/pinctrl/ralink/pinctrl-ralink.h
> > +++ b/drivers/pinctrl/mediatek/pinctrl-mtmips.h
> > @@ -3,8 +3,8 @@
> > * Copyright (C) 2012 John Crispin <[email protected]>
> > */
> >
> > -#ifndef _PINCTRL_RALINK_H__
> > -#define _PINCTRL_RALINK_H__
> > +#ifndef _PINCTRL_MTMIPS_H__
> > +#define _PINCTRL_MTMIPS_H__
> >
> > #define FUNC(name, value, pin_first, pin_count) \
> > { name, value, pin_first, pin_count }
> > @@ -19,9 +19,9 @@
> > .func = _func, .gpio = _gpio, \
> > .func_count = ARRAY_SIZE(_func) }
> >
> > -struct ralink_pmx_group;
> > +struct mtmips_pmx_group;
> >
> > -struct ralink_pmx_func {
> > +struct mtmips_pmx_func {
> > const char *name;
> > const char value;
> >
> > @@ -35,7 +35,7 @@ struct ralink_pmx_func {
> > int enabled;
> > };
> >
> > -struct ralink_pmx_group {
> > +struct mtmips_pmx_group {
> > const char *name;
> > int enabled;
> >
> > @@ -43,11 +43,11 @@ struct ralink_pmx_group {
> > const char mask;
> > const char gpio;
> >
> > - struct ralink_pmx_func *func;
> > + struct mtmips_pmx_func *func;
> > int func_count;
> > };
> >
> > -int ralink_pinctrl_init(struct platform_device *pdev,
> > - struct ralink_pmx_group *data);
> > +int mtmips_pinctrl_init(struct platform_device *pdev,
> > + struct mtmips_pmx_group *data);
> >
> > #endif
> > diff --git a/drivers/pinctrl/ralink/pinctrl-rt2880.c b/drivers/pinctrl/mediatek/pinctrl-rt2880.c
> > similarity index 71%
> > rename from drivers/pinctrl/ralink/pinctrl-rt2880.c
> > rename to drivers/pinctrl/mediatek/pinctrl-rt2880.c
> > index d7a65fcc7755..e0366721a515 100644
> > --- a/drivers/pinctrl/ralink/pinctrl-rt2880.c
> > +++ b/drivers/pinctrl/mediatek/pinctrl-rt2880.c
> > @@ -4,7 +4,7 @@
> > #include <linux/module.h>
> > #include <linux/platform_device.h>
> > #include <linux/of.h>
> > -#include "pinctrl-ralink.h"
> > +#include "pinctrl-mtmips.h"
> >
> > #define RT2880_GPIO_MODE_I2C BIT(0)
> > #define RT2880_GPIO_MODE_UART0 BIT(1)
> > @@ -15,15 +15,15 @@
> > #define RT2880_GPIO_MODE_SDRAM BIT(6)
> > #define RT2880_GPIO_MODE_PCI BIT(7)
> >
> > -static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> > -static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> > -static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 7, 8) };
> > -static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
> > -static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
> > -static struct ralink_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
> > -static struct ralink_pmx_func pci_grp[] = { FUNC("pci", 0, 40, 32) };
> > +static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> > +static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> > +static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 7, 8) };
> > +static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
> > +static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
> > +static struct mtmips_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
> > +static struct mtmips_pmx_func pci_grp[] = { FUNC("pci", 0, 40, 32) };
> >
> > -static struct ralink_pmx_group rt2880_pinmux_data_act[] = {
> > +static struct mtmips_pmx_group rt2880_pinmux_data_act[] = {
> > GRP("i2c", i2c_grp, 1, RT2880_GPIO_MODE_I2C),
> > GRP("spi", spi_grp, 1, RT2880_GPIO_MODE_SPI),
> > GRP("uartlite", uartlite_grp, 1, RT2880_GPIO_MODE_UART0),
> > @@ -36,7 +36,7 @@ static struct ralink_pmx_group rt2880_pinmux_data_act[] = {
> >
> > static int rt2880_pinctrl_probe(struct platform_device *pdev)
> > {
> > - return ralink_pinctrl_init(pdev, rt2880_pinmux_data_act);
> > + return mtmips_pinctrl_init(pdev, rt2880_pinmux_data_act);
> > }
> >
> > static const struct of_device_id rt2880_pinctrl_match[] = {
> > diff --git a/drivers/pinctrl/ralink/pinctrl-rt305x.c b/drivers/pinctrl/mediatek/pinctrl-rt305x.c
> > similarity index 75%
> > rename from drivers/pinctrl/ralink/pinctrl-rt305x.c
> > rename to drivers/pinctrl/mediatek/pinctrl-rt305x.c
> > index fa3743c7680f..77bd4d1f6122 100644
> > --- a/drivers/pinctrl/ralink/pinctrl-rt305x.c
> > +++ b/drivers/pinctrl/mediatek/pinctrl-rt305x.c
> > @@ -5,7 +5,7 @@
> > #include <linux/module.h>
> > #include <linux/platform_device.h>
> > #include <linux/of.h>
> > -#include "pinctrl-ralink.h"
> > +#include "pinctrl-mtmips.h"
> >
> > #define RT305X_GPIO_MODE_UART0_SHIFT 2
> > #define RT305X_GPIO_MODE_UART0_MASK 0x7
> > @@ -31,9 +31,9 @@
> > #define RT3352_GPIO_MODE_LNA 18
> > #define RT3352_GPIO_MODE_PA 20
> >
> > -static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> > -static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> > -static struct ralink_pmx_func uartf_grp[] = {
> > +static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> > +static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> > +static struct mtmips_pmx_func uartf_grp[] = {
> > FUNC("uartf", RT305X_GPIO_MODE_UARTF, 7, 8),
> > FUNC("pcm uartf", RT305X_GPIO_MODE_PCM_UARTF, 7, 8),
> > FUNC("pcm i2s", RT305X_GPIO_MODE_PCM_I2S, 7, 8),
> > @@ -42,28 +42,28 @@ static struct ralink_pmx_func uartf_grp[] = {
> > FUNC("gpio uartf", RT305X_GPIO_MODE_GPIO_UARTF, 7, 4),
> > FUNC("gpio i2s", RT305X_GPIO_MODE_GPIO_I2S, 7, 4),
> > };
> > -static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
> > -static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
> > -static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
> > -static struct ralink_pmx_func rt5350_led_grp[] = { FUNC("led", 0, 22, 5) };
> > -static struct ralink_pmx_func rt5350_cs1_grp[] = {
> > +static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
> > +static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
> > +static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
> > +static struct mtmips_pmx_func rt5350_led_grp[] = { FUNC("led", 0, 22, 5) };
> > +static struct mtmips_pmx_func rt5350_cs1_grp[] = {
> > FUNC("spi_cs1", 0, 27, 1),
> > FUNC("wdg_cs1", 1, 27, 1),
> > };
> > -static struct ralink_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
> > -static struct ralink_pmx_func rt3352_rgmii_grp[] = {
> > +static struct mtmips_pmx_func sdram_grp[] = { FUNC("sdram", 0, 24, 16) };
> > +static struct mtmips_pmx_func rt3352_rgmii_grp[] = {
> > FUNC("rgmii", 0, 24, 12)
> > };
> > -static struct ralink_pmx_func rgmii_grp[] = { FUNC("rgmii", 0, 40, 12) };
> > -static struct ralink_pmx_func rt3352_lna_grp[] = { FUNC("lna", 0, 36, 2) };
> > -static struct ralink_pmx_func rt3352_pa_grp[] = { FUNC("pa", 0, 38, 2) };
> > -static struct ralink_pmx_func rt3352_led_grp[] = { FUNC("led", 0, 40, 5) };
> > -static struct ralink_pmx_func rt3352_cs1_grp[] = {
> > +static struct mtmips_pmx_func rgmii_grp[] = { FUNC("rgmii", 0, 40, 12) };
> > +static struct mtmips_pmx_func rt3352_lna_grp[] = { FUNC("lna", 0, 36, 2) };
> > +static struct mtmips_pmx_func rt3352_pa_grp[] = { FUNC("pa", 0, 38, 2) };
> > +static struct mtmips_pmx_func rt3352_led_grp[] = { FUNC("led", 0, 40, 5) };
> > +static struct mtmips_pmx_func rt3352_cs1_grp[] = {
> > FUNC("spi_cs1", 0, 45, 1),
> > FUNC("wdg_cs1", 1, 45, 1),
> > };
> >
> > -static struct ralink_pmx_group rt3050_pinmux_data[] = {
> > +static struct mtmips_pmx_group rt3050_pinmux_data[] = {
> > GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C),
> > GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI),
> > GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK,
> > @@ -76,7 +76,7 @@ static struct ralink_pmx_group rt3050_pinmux_data[] = {
> > { 0 }
> > };
> >
> > -static struct ralink_pmx_group rt3352_pinmux_data[] = {
> > +static struct mtmips_pmx_group rt3352_pinmux_data[] = {
> > GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C),
> > GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI),
> > GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK,
> > @@ -92,7 +92,7 @@ static struct ralink_pmx_group rt3352_pinmux_data[] = {
> > { 0 }
> > };
> >
> > -static struct ralink_pmx_group rt5350_pinmux_data[] = {
> > +static struct mtmips_pmx_group rt5350_pinmux_data[] = {
> > GRP("i2c", i2c_grp, 1, RT305X_GPIO_MODE_I2C),
> > GRP("spi", spi_grp, 1, RT305X_GPIO_MODE_SPI),
> > GRP("uartf", uartf_grp, RT305X_GPIO_MODE_UART0_MASK,
> > @@ -107,11 +107,11 @@ static struct ralink_pmx_group rt5350_pinmux_data[] = {
> > static int rt305x_pinctrl_probe(struct platform_device *pdev)
> > {
> > if (soc_is_rt5350())
> > - return ralink_pinctrl_init(pdev, rt5350_pinmux_data);
> > + return mtmips_pinctrl_init(pdev, rt5350_pinmux_data);
> > else if (soc_is_rt305x() || soc_is_rt3350())
> > - return ralink_pinctrl_init(pdev, rt3050_pinmux_data);
> > + return mtmips_pinctrl_init(pdev, rt3050_pinmux_data);
> > else if (soc_is_rt3352())
> > - return ralink_pinctrl_init(pdev, rt3352_pinmux_data);
> > + return mtmips_pinctrl_init(pdev, rt3352_pinmux_data);
> > else
> > return -EINVAL;
> > }
> > diff --git a/drivers/pinctrl/ralink/pinctrl-rt3883.c b/drivers/pinctrl/mediatek/pinctrl-rt3883.c
> > similarity index 80%
> > rename from drivers/pinctrl/ralink/pinctrl-rt3883.c
> > rename to drivers/pinctrl/mediatek/pinctrl-rt3883.c
> > index 5f766d76bafa..eeaf344c3647 100644
> > --- a/drivers/pinctrl/ralink/pinctrl-rt3883.c
> > +++ b/drivers/pinctrl/mediatek/pinctrl-rt3883.c
> > @@ -3,7 +3,7 @@
> > #include <linux/module.h>
> > #include <linux/platform_device.h>
> > #include <linux/of.h>
> > -#include "pinctrl-ralink.h"
> > +#include "pinctrl-mtmips.h"
> >
> > #define RT3883_GPIO_MODE_UART0_SHIFT 2
> > #define RT3883_GPIO_MODE_UART0_MASK 0x7
> > @@ -39,9 +39,9 @@
> > #define RT3883_GPIO_MODE_LNA_G_GPIO 0x3
> > #define RT3883_GPIO_MODE_LNA_G _RT3883_GPIO_MODE_LNA_G(RT3883_GPIO_MODE_LNA_G_MASK)
> >
> > -static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> > -static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> > -static struct ralink_pmx_func uartf_grp[] = {
> > +static struct mtmips_pmx_func i2c_grp[] = { FUNC("i2c", 0, 1, 2) };
> > +static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
> > +static struct mtmips_pmx_func uartf_grp[] = {
> > FUNC("uartf", RT3883_GPIO_MODE_UARTF, 7, 8),
> > FUNC("pcm uartf", RT3883_GPIO_MODE_PCM_UARTF, 7, 8),
> > FUNC("pcm i2s", RT3883_GPIO_MODE_PCM_I2S, 7, 8),
> > @@ -50,21 +50,21 @@ static struct ralink_pmx_func uartf_grp[] = {
> > FUNC("gpio uartf", RT3883_GPIO_MODE_GPIO_UARTF, 7, 4),
> > FUNC("gpio i2s", RT3883_GPIO_MODE_GPIO_I2S, 7, 4),
> > };
> > -static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
> > -static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
> > -static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
> > -static struct ralink_pmx_func lna_a_grp[] = { FUNC("lna a", 0, 32, 3) };
> > -static struct ralink_pmx_func lna_g_grp[] = { FUNC("lna g", 0, 35, 3) };
> > -static struct ralink_pmx_func pci_grp[] = {
> > +static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
> > +static struct mtmips_pmx_func jtag_grp[] = { FUNC("jtag", 0, 17, 5) };
> > +static struct mtmips_pmx_func mdio_grp[] = { FUNC("mdio", 0, 22, 2) };
> > +static struct mtmips_pmx_func lna_a_grp[] = { FUNC("lna a", 0, 32, 3) };
> > +static struct mtmips_pmx_func lna_g_grp[] = { FUNC("lna g", 0, 35, 3) };
> > +static struct mtmips_pmx_func pci_grp[] = {
> > FUNC("pci-dev", 0, 40, 32),
> > FUNC("pci-host2", 1, 40, 32),
> > FUNC("pci-host1", 2, 40, 32),
> > FUNC("pci-fnc", 3, 40, 32)
> > };
> > -static struct ralink_pmx_func ge1_grp[] = { FUNC("ge1", 0, 72, 12) };
> > -static struct ralink_pmx_func ge2_grp[] = { FUNC("ge2", 0, 84, 12) };
> > +static struct mtmips_pmx_func ge1_grp[] = { FUNC("ge1", 0, 72, 12) };
> > +static struct mtmips_pmx_func ge2_grp[] = { FUNC("ge2", 0, 84, 12) };
> >
> > -static struct ralink_pmx_group rt3883_pinmux_data[] = {
> > +static struct mtmips_pmx_group rt3883_pinmux_data[] = {
> > GRP("i2c", i2c_grp, 1, RT3883_GPIO_MODE_I2C),
> > GRP("spi", spi_grp, 1, RT3883_GPIO_MODE_SPI),
> > GRP("uartf", uartf_grp, RT3883_GPIO_MODE_UART0_MASK,
> > @@ -83,7 +83,7 @@ static struct ralink_pmx_group rt3883_pinmux_data[] = {
> >
> > static int rt3883_pinctrl_probe(struct platform_device *pdev)
> > {
> > - return ralink_pinctrl_init(pdev, rt3883_pinmux_data);
> > + return mtmips_pinctrl_init(pdev, rt3883_pinmux_data);
> > }
> >
> > static const struct of_device_id rt3883_pinctrl_match[] = {
> > diff --git a/drivers/pinctrl/ralink/Kconfig b/drivers/pinctrl/ralink/Kconfig
> > deleted file mode 100644
> > index c5fe4c31aaea..000000000000
> > --- a/drivers/pinctrl/ralink/Kconfig
> > +++ /dev/null
> > @@ -1,40 +0,0 @@
> > -# SPDX-License-Identifier: GPL-2.0-only
> > -menu "Ralink pinctrl drivers"
> > - depends on RALINK
> > -
> > -config PINCTRL_RALINK
> > - bool "Ralink pinctrl driver"
> > - select PINMUX
> > - select GENERIC_PINCONF
> > -
> > -config PINCTRL_MT7620
> > - bool "MT7620 pinctrl subdriver"
> > - depends on RALINK && SOC_MT7620
> > - select PINCTRL_RALINK
> > -
> > -config PINCTRL_MT7621
> > - bool "MT7621 pinctrl subdriver"
> > - depends on RALINK && SOC_MT7621
> > - select PINCTRL_RALINK
> > -
> > -config PINCTRL_MT76X8
> > - bool "MT76X8 pinctrl subdriver"
> > - depends on RALINK && SOC_MT7620
> > - select PINCTRL_RALINK
> > -
> > -config PINCTRL_RT2880
> > - bool "RT2880 pinctrl subdriver"
> > - depends on RALINK && SOC_RT288X
> > - select PINCTRL_RALINK
> > -
> > -config PINCTRL_RT305X
> > - bool "RT305X pinctrl subdriver"
> > - depends on RALINK && SOC_RT305X
> > - select PINCTRL_RALINK
> > -
> > -config PINCTRL_RT3883
> > - bool "RT3883 pinctrl subdriver"
> > - depends on RALINK && SOC_RT3883
> > - select PINCTRL_RALINK
> > -
> > -endmenu
> > diff --git a/drivers/pinctrl/ralink/Makefile b/drivers/pinctrl/ralink/Makefile
> > deleted file mode 100644
> > index be9acf2e27fd..000000000000
> > --- a/drivers/pinctrl/ralink/Makefile
> > +++ /dev/null
> > @@ -1,9 +0,0 @@
> > -# SPDX-License-Identifier: GPL-2.0
> > -obj-$(CONFIG_PINCTRL_RALINK) += pinctrl-ralink.o
> > -
> > -obj-$(CONFIG_PINCTRL_MT7620) += pinctrl-mt7620.o
> > -obj-$(CONFIG_PINCTRL_MT7621) += pinctrl-mt7621.o
> > -obj-$(CONFIG_PINCTRL_MT76X8) += pinctrl-mt76x8.o
> > -obj-$(CONFIG_PINCTRL_RT2880) += pinctrl-rt2880.o
> > -obj-$(CONFIG_PINCTRL_RT305X) += pinctrl-rt305x.o
> > -obj-$(CONFIG_PINCTRL_RT3883) += pinctrl-rt3883.o
> > --
> > 2.37.2
> >
Empty mail?
Arınç
On 3.03.2023 09:03, Sergio Paracuellos wrote:
> On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
>>
>> From: Arınç ÜNAL <[email protected]>
>>
>> Split the driver out to pinctrl-mt76x8.c. Remove including the unnecessary
>> headers since is_mt76x8() is not being used anymore.
>>
>> Introduce a new compatible string to be able to document the pin muxing
>> information properly.
>>
>> Signed-off-by: Arınç ÜNAL <[email protected]>
>> ---
>> drivers/pinctrl/ralink/Kconfig | 5 +
>> drivers/pinctrl/ralink/Makefile | 1 +
>> drivers/pinctrl/ralink/pinctrl-mt7620.c | 257 +--------------------
>> drivers/pinctrl/ralink/pinctrl-mt76x8.c | 283 ++++++++++++++++++++++++
>> 4 files changed, 290 insertions(+), 256 deletions(-)
>> create mode 100644 drivers/pinctrl/ralink/pinctrl-mt76x8.c
On Fri, Mar 3, 2023 at 8:53 AM Arınç ÜNAL <[email protected]> wrote:
>
> Empty mail?
It seems it was :). Sorry, something weird happened with my fingers
while typing, I guess...
>
> Arınç
>
> On 3.03.2023 09:03, Sergio Paracuellos wrote:
> > On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
> >>
> >> From: Arınç ÜNAL <[email protected]>
> >>
> >> Split the driver out to pinctrl-mt76x8.c. Remove including the unnecessary
> >> headers since is_mt76x8() is not being used anymore.
> >>
> >> Introduce a new compatible string to be able to document the pin muxing
> >> information properly.
> >>
> >> Signed-off-by: Arınç ÜNAL <[email protected]>
> >> ---
> >> drivers/pinctrl/ralink/Kconfig | 5 +
> >> drivers/pinctrl/ralink/Makefile | 1 +
> >> drivers/pinctrl/ralink/pinctrl-mt7620.c | 257 +--------------------
> >> drivers/pinctrl/ralink/pinctrl-mt76x8.c | 283 ++++++++++++++++++++++++
> >> 4 files changed, 290 insertions(+), 256 deletions(-)
> >> create mode 100644 drivers/pinctrl/ralink/pinctrl-mt76x8.c
Hey Sergio,
On 3.03.2023 09:34, Sergio Paracuellos wrote:
> On Fri, Mar 3, 2023 at 7:17 AM Sergio Paracuellos
> <[email protected]> wrote:
>>
>> Hi Arınç,
>>
>> On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
>>>
>>> From: Arınç ÜNAL <[email protected]>
>>>
>>> This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
>>> introduced new SoCs which utilise this platform. Move the driver to
>>> mediatek pinctrl directory. Rename the ralink core driver to mtmips.
>>>
>>> Signed-off-by: Arınç ÜNAL <[email protected]>
>>> ---
>>> drivers/pinctrl/Kconfig | 1 -
>>> drivers/pinctrl/Makefile | 1 -
>>> drivers/pinctrl/mediatek/Kconfig | 51 ++++++++++-
>>> drivers/pinctrl/mediatek/Makefile | 63 +++++++------
>>> .../{ralink => mediatek}/pinctrl-mt7620.c | 34 +++----
>>> .../{ralink => mediatek}/pinctrl-mt7621.c | 30 +++----
>>> .../{ralink => mediatek}/pinctrl-mt76x8.c | 60 ++++++-------
>>> .../pinctrl-mtmips.c} | 90 +++++++++----------
>>> .../pinctrl-mtmips.h} | 16 ++--
>>> .../{ralink => mediatek}/pinctrl-rt2880.c | 20 ++---
>>> .../{ralink => mediatek}/pinctrl-rt305x.c | 44 ++++-----
>>> .../{ralink => mediatek}/pinctrl-rt3883.c | 28 +++---
>>> drivers/pinctrl/ralink/Kconfig | 40 ---------
>>> drivers/pinctrl/ralink/Makefile | 9 --
>>> 14 files changed, 246 insertions(+), 241 deletions(-)
>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7620.c (81%)
>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7621.c (80%)
>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt76x8.c (81%)
>>> rename drivers/pinctrl/{ralink/pinctrl-ralink.c => mediatek/pinctrl-mtmips.c} (74%)
>>> rename drivers/pinctrl/{ralink/pinctrl-ralink.h => mediatek/pinctrl-mtmips.h} (75%)
>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt2880.c (71%)
>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt305x.c (75%)
>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt3883.c (80%)
>>> delete mode 100644 drivers/pinctrl/ralink/Kconfig
>>> delete mode 100644 drivers/pinctrl/ralink/Makefile
>>>
>>> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
>>> index dcb53c4a9584..8a6012770640 100644
>>> --- a/drivers/pinctrl/Kconfig
>>> +++ b/drivers/pinctrl/Kconfig
>>> @@ -537,7 +537,6 @@ source "drivers/pinctrl/nomadik/Kconfig"
>>> source "drivers/pinctrl/nuvoton/Kconfig"
>>> source "drivers/pinctrl/pxa/Kconfig"
>>> source "drivers/pinctrl/qcom/Kconfig"
>>> -source "drivers/pinctrl/ralink/Kconfig"
>>> source "drivers/pinctrl/renesas/Kconfig"
>>> source "drivers/pinctrl/samsung/Kconfig"
>>> source "drivers/pinctrl/spear/Kconfig"
>>> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
>>> index d5939840bb2a..ada6ed1d4e91 100644
>>> --- a/drivers/pinctrl/Makefile
>>> +++ b/drivers/pinctrl/Makefile
>>> @@ -66,7 +66,6 @@ obj-y += nomadik/
>>> obj-y += nuvoton/
>>> obj-$(CONFIG_PINCTRL_PXA) += pxa/
>>> obj-$(CONFIG_ARCH_QCOM) += qcom/
>>> -obj-$(CONFIG_PINCTRL_RALINK) += ralink/
>>> obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
>>> obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
>>> obj-$(CONFIG_PINCTRL_SPEAR) += spear/
>>> diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
>>> index a71874fed3d6..2eeb55010563 100644
>>> --- a/drivers/pinctrl/mediatek/Kconfig
>>> +++ b/drivers/pinctrl/mediatek/Kconfig
>>> @@ -1,6 +1,6 @@
>>> # SPDX-License-Identifier: GPL-2.0-only
>>> menu "MediaTek pinctrl drivers"
>>> - depends on ARCH_MEDIATEK || COMPILE_TEST
>>> + depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST
>>>
>>> config EINT_MTK
>>> tristate "MediaTek External Interrupt Support"
>>> @@ -22,6 +22,12 @@ config PINCTRL_MTK
>>> config PINCTRL_MTK_V2
>>> tristate
>>>
>>> +config PINCTRL_MTK_MTMIPS
>>> + bool
>>> + depends on RALINK
>>> + select PINMUX
>>> + select GENERIC_PINCONF
>>> +
>>> config PINCTRL_MTK_MOORE
>>> bool
>>> depends on OF
>>> @@ -43,6 +49,49 @@ config PINCTRL_MTK_PARIS
>>> select OF_GPIO
>>> select PINCTRL_MTK_V2
>>>
>>> +# For MIPS SoCs
>>> +config PINCTRL_MT7620
>>> + bool "MediaTek MT7620 pin control"
>>> + depends on SOC_MT7620 || COMPILE_TEST
>>> + depends on RALINK
>>> + default SOC_MT7620
>>> + select PINCTRL_MTK_MTMIPS
>>> +
>>> +config PINCTRL_MT7621
>>> + bool "MediaTek MT7621 pin control"
>>> + depends on SOC_MT7621 || COMPILE_TEST
>>> + depends on RALINK
>>> + default SOC_MT7621
>>> + select PINCTRL_MTK_MTMIPS
>>> +
>>> +config PINCTRL_MT76X8
>>> + bool "MediaTek MT76X8 pin control"
>>> + depends on SOC_MT7620 || COMPILE_TEST
>>> + depends on RALINK
>>> + default SOC_MT7620
>>> + select PINCTRL_MTK_MTMIPS
>>> +
>>> +config PINCTRL_RT2880
>>> + bool "Ralink RT2880 pin control"
>>> + depends on SOC_RT288X || COMPILE_TEST
>>> + depends on RALINK
>>> + default SOC_RT288X
>>> + select PINCTRL_MTK_MTMIPS
>>> +
>>> +config PINCTRL_RT305X
>>> + bool "Ralink RT305X pin control"
>>> + depends on SOC_RT305X || COMPILE_TEST
>>> + depends on RALINK
>>> + default SOC_RT305X
>>> + select PINCTRL_MTK_MTMIPS
>>> +
>>> +config PINCTRL_RT3883
>>> + bool "Ralink RT3883 pin control"
>>> + depends on SOC_RT3883 || COMPILE_TEST
>>> + depends on RALINK
>>> + default SOC_RT3883
>>> + select PINCTRL_MTK_MTMIPS
>>> +
>>
>> I am not a Kconfig expert at all but...
>>
>> Should not all of these be depends on SOC_XXX || (COMPILE_TEST &&
>> RALINK) and avoid the " depends on RALINK" next line in all of them?
This seems to do the same thing but I'm following the "either change
them all or fit into the crowd" ideology.
>>
>> Just asking since we have yet arch read and write register operations
>> in pinctrl common ralink code. Having in this way, when we address
>> this arch thing in the next series just removing the "&& RALINK" part
>> makes the review pretty obvious.
You'd have to change RALINK with OF since we're still depending on that.
RALINK selects OF by default so it's currently a hidden dependency.
>>
>> Other than that, changes look good to me.
>
> I think "depends on SOC_XXX || (COMPILE_TEST && MIPS)" would work also
> and might be more accurate for compile testing targets.
This is not OK in both cases. If the driver is dependent on Ralink
architecture code, choosing any other MIPS platform will make the driver
available to compile, which will fail.
If the driver is independent of Ralink architecture code, you're
limiting the driver to be compiled only when a MIPS platform is selected.
Arınç
Hi Arınç,
On Fri, Mar 3, 2023 at 9:16 AM Arınç ÜNAL <[email protected]> wrote:
>
> Hey Sergio,
>
> On 3.03.2023 09:34, Sergio Paracuellos wrote:
> > On Fri, Mar 3, 2023 at 7:17 AM Sergio Paracuellos
> > <[email protected]> wrote:
> >>
> >> Hi Arınç,
> >>
> >> On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
> >>>
> >>> From: Arınç ÜNAL <[email protected]>
> >>>
> >>> This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
> >>> introduced new SoCs which utilise this platform. Move the driver to
> >>> mediatek pinctrl directory. Rename the ralink core driver to mtmips.
> >>>
> >>> Signed-off-by: Arınç ÜNAL <[email protected]>
> >>> ---
> >>> drivers/pinctrl/Kconfig | 1 -
> >>> drivers/pinctrl/Makefile | 1 -
> >>> drivers/pinctrl/mediatek/Kconfig | 51 ++++++++++-
> >>> drivers/pinctrl/mediatek/Makefile | 63 +++++++------
> >>> .../{ralink => mediatek}/pinctrl-mt7620.c | 34 +++----
> >>> .../{ralink => mediatek}/pinctrl-mt7621.c | 30 +++----
> >>> .../{ralink => mediatek}/pinctrl-mt76x8.c | 60 ++++++-------
> >>> .../pinctrl-mtmips.c} | 90 +++++++++----------
> >>> .../pinctrl-mtmips.h} | 16 ++--
> >>> .../{ralink => mediatek}/pinctrl-rt2880.c | 20 ++---
> >>> .../{ralink => mediatek}/pinctrl-rt305x.c | 44 ++++-----
> >>> .../{ralink => mediatek}/pinctrl-rt3883.c | 28 +++---
> >>> drivers/pinctrl/ralink/Kconfig | 40 ---------
> >>> drivers/pinctrl/ralink/Makefile | 9 --
> >>> 14 files changed, 246 insertions(+), 241 deletions(-)
> >>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7620.c (81%)
> >>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7621.c (80%)
> >>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt76x8.c (81%)
> >>> rename drivers/pinctrl/{ralink/pinctrl-ralink.c => mediatek/pinctrl-mtmips.c} (74%)
> >>> rename drivers/pinctrl/{ralink/pinctrl-ralink.h => mediatek/pinctrl-mtmips.h} (75%)
> >>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt2880.c (71%)
> >>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt305x.c (75%)
> >>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt3883.c (80%)
> >>> delete mode 100644 drivers/pinctrl/ralink/Kconfig
> >>> delete mode 100644 drivers/pinctrl/ralink/Makefile
> >>>
> >>> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> >>> index dcb53c4a9584..8a6012770640 100644
> >>> --- a/drivers/pinctrl/Kconfig
> >>> +++ b/drivers/pinctrl/Kconfig
> >>> @@ -537,7 +537,6 @@ source "drivers/pinctrl/nomadik/Kconfig"
> >>> source "drivers/pinctrl/nuvoton/Kconfig"
> >>> source "drivers/pinctrl/pxa/Kconfig"
> >>> source "drivers/pinctrl/qcom/Kconfig"
> >>> -source "drivers/pinctrl/ralink/Kconfig"
> >>> source "drivers/pinctrl/renesas/Kconfig"
> >>> source "drivers/pinctrl/samsung/Kconfig"
> >>> source "drivers/pinctrl/spear/Kconfig"
> >>> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
> >>> index d5939840bb2a..ada6ed1d4e91 100644
> >>> --- a/drivers/pinctrl/Makefile
> >>> +++ b/drivers/pinctrl/Makefile
> >>> @@ -66,7 +66,6 @@ obj-y += nomadik/
> >>> obj-y += nuvoton/
> >>> obj-$(CONFIG_PINCTRL_PXA) += pxa/
> >>> obj-$(CONFIG_ARCH_QCOM) += qcom/
> >>> -obj-$(CONFIG_PINCTRL_RALINK) += ralink/
> >>> obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
> >>> obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
> >>> obj-$(CONFIG_PINCTRL_SPEAR) += spear/
> >>> diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
> >>> index a71874fed3d6..2eeb55010563 100644
> >>> --- a/drivers/pinctrl/mediatek/Kconfig
> >>> +++ b/drivers/pinctrl/mediatek/Kconfig
> >>> @@ -1,6 +1,6 @@
> >>> # SPDX-License-Identifier: GPL-2.0-only
> >>> menu "MediaTek pinctrl drivers"
> >>> - depends on ARCH_MEDIATEK || COMPILE_TEST
> >>> + depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST
> >>>
> >>> config EINT_MTK
> >>> tristate "MediaTek External Interrupt Support"
> >>> @@ -22,6 +22,12 @@ config PINCTRL_MTK
> >>> config PINCTRL_MTK_V2
> >>> tristate
> >>>
> >>> +config PINCTRL_MTK_MTMIPS
> >>> + bool
> >>> + depends on RALINK
> >>> + select PINMUX
> >>> + select GENERIC_PINCONF
> >>> +
> >>> config PINCTRL_MTK_MOORE
> >>> bool
> >>> depends on OF
> >>> @@ -43,6 +49,49 @@ config PINCTRL_MTK_PARIS
> >>> select OF_GPIO
> >>> select PINCTRL_MTK_V2
> >>>
> >>> +# For MIPS SoCs
> >>> +config PINCTRL_MT7620
> >>> + bool "MediaTek MT7620 pin control"
> >>> + depends on SOC_MT7620 || COMPILE_TEST
> >>> + depends on RALINK
> >>> + default SOC_MT7620
> >>> + select PINCTRL_MTK_MTMIPS
> >>> +
> >>> +config PINCTRL_MT7621
> >>> + bool "MediaTek MT7621 pin control"
> >>> + depends on SOC_MT7621 || COMPILE_TEST
> >>> + depends on RALINK
> >>> + default SOC_MT7621
> >>> + select PINCTRL_MTK_MTMIPS
> >>> +
> >>> +config PINCTRL_MT76X8
> >>> + bool "MediaTek MT76X8 pin control"
> >>> + depends on SOC_MT7620 || COMPILE_TEST
> >>> + depends on RALINK
> >>> + default SOC_MT7620
> >>> + select PINCTRL_MTK_MTMIPS
> >>> +
> >>> +config PINCTRL_RT2880
> >>> + bool "Ralink RT2880 pin control"
> >>> + depends on SOC_RT288X || COMPILE_TEST
> >>> + depends on RALINK
> >>> + default SOC_RT288X
> >>> + select PINCTRL_MTK_MTMIPS
> >>> +
> >>> +config PINCTRL_RT305X
> >>> + bool "Ralink RT305X pin control"
> >>> + depends on SOC_RT305X || COMPILE_TEST
> >>> + depends on RALINK
> >>> + default SOC_RT305X
> >>> + select PINCTRL_MTK_MTMIPS
> >>> +
> >>> +config PINCTRL_RT3883
> >>> + bool "Ralink RT3883 pin control"
> >>> + depends on SOC_RT3883 || COMPILE_TEST
> >>> + depends on RALINK
> >>> + default SOC_RT3883
> >>> + select PINCTRL_MTK_MTMIPS
> >>> +
> >>
> >> I am not a Kconfig expert at all but...
> >>
> >> Should not all of these be depends on SOC_XXX || (COMPILE_TEST &&
> >> RALINK) and avoid the " depends on RALINK" next line in all of them?
>
> This seems to do the same thing but I'm following the "either change
> them all or fit into the crowd" ideology.
>
> >>
> >> Just asking since we have yet arch read and write register operations
> >> in pinctrl common ralink code. Having in this way, when we address
> >> this arch thing in the next series just removing the "&& RALINK" part
> >> makes the review pretty obvious.
>
> You'd have to change RALINK with OF since we're still depending on that.
> RALINK selects OF by default so it's currently a hidden dependency.
>
> >>
> >> Other than that, changes look good to me.
> >
> > I think "depends on SOC_XXX || (COMPILE_TEST && MIPS)" would work also
> > and might be more accurate for compile testing targets.
Are you sure? SOC_XXX here is already being enabled only if RALINK is
already enabled, right? [0]
>
> This is not OK in both cases. If the driver is dependent on Ralink
> architecture code, choosing any other MIPS platform will make the driver
> available to compile, which will fail.
SOC_XXX is already dependent on RALINK for real uses but the driver is
going to be selected for other MIPS platforms only for COMPILE_TEST
targets. Ideally drivers should be arch agnostic so can be selected
for any single arch build. Now we have arch dependent read and write
calls in the code, so you need the right headers to be properly found
to be able to compile testing. I think MIPS is enough dependency here
to properly find them. But if not, this should be (COMPILE_TEST &&
RALINK)
>
> If the driver is independent of Ralink architecture code, you're
> limiting the driver to be compiled only when a MIPS platform is selected.
So... how are you planning to allow compile testing of the driver in
any single arch when we get rid of all the arch dependent code? If you
make everything dependent on RALINK you cannot.
Maybe I am missing something obvious :)
Thanks,
Sergio Paracuellos
[0]: https://elixir.bootlin.com/linux/v6.2.1/source/arch/mips/ralink/Kconfig
>
> Arınç
Heyo,
On 3.03.2023 13:57, Sergio Paracuellos wrote:
> Hi Arınç,
>
> On Fri, Mar 3, 2023 at 9:16 AM Arınç ÜNAL <[email protected]> wrote:
>>
>> Hey Sergio,
>>
>> On 3.03.2023 09:34, Sergio Paracuellos wrote:
>>> On Fri, Mar 3, 2023 at 7:17 AM Sergio Paracuellos
>>> <[email protected]> wrote:
>>>>
>>>> Hi Arınç,
>>>>
>>>> On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
>>>>>
>>>>> From: Arınç ÜNAL <[email protected]>
>>>>>
>>>>> This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
>>>>> introduced new SoCs which utilise this platform. Move the driver to
>>>>> mediatek pinctrl directory. Rename the ralink core driver to mtmips.
>>>>>
>>>>> Signed-off-by: Arınç ÜNAL <[email protected]>
>>>>> ---
>>>>> drivers/pinctrl/Kconfig | 1 -
>>>>> drivers/pinctrl/Makefile | 1 -
>>>>> drivers/pinctrl/mediatek/Kconfig | 51 ++++++++++-
>>>>> drivers/pinctrl/mediatek/Makefile | 63 +++++++------
>>>>> .../{ralink => mediatek}/pinctrl-mt7620.c | 34 +++----
>>>>> .../{ralink => mediatek}/pinctrl-mt7621.c | 30 +++----
>>>>> .../{ralink => mediatek}/pinctrl-mt76x8.c | 60 ++++++-------
>>>>> .../pinctrl-mtmips.c} | 90 +++++++++----------
>>>>> .../pinctrl-mtmips.h} | 16 ++--
>>>>> .../{ralink => mediatek}/pinctrl-rt2880.c | 20 ++---
>>>>> .../{ralink => mediatek}/pinctrl-rt305x.c | 44 ++++-----
>>>>> .../{ralink => mediatek}/pinctrl-rt3883.c | 28 +++---
>>>>> drivers/pinctrl/ralink/Kconfig | 40 ---------
>>>>> drivers/pinctrl/ralink/Makefile | 9 --
>>>>> 14 files changed, 246 insertions(+), 241 deletions(-)
>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7620.c (81%)
>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7621.c (80%)
>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt76x8.c (81%)
>>>>> rename drivers/pinctrl/{ralink/pinctrl-ralink.c => mediatek/pinctrl-mtmips.c} (74%)
>>>>> rename drivers/pinctrl/{ralink/pinctrl-ralink.h => mediatek/pinctrl-mtmips.h} (75%)
>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt2880.c (71%)
>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt305x.c (75%)
>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt3883.c (80%)
>>>>> delete mode 100644 drivers/pinctrl/ralink/Kconfig
>>>>> delete mode 100644 drivers/pinctrl/ralink/Makefile
>>>>>
>>>>> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
>>>>> index dcb53c4a9584..8a6012770640 100644
>>>>> --- a/drivers/pinctrl/Kconfig
>>>>> +++ b/drivers/pinctrl/Kconfig
>>>>> @@ -537,7 +537,6 @@ source "drivers/pinctrl/nomadik/Kconfig"
>>>>> source "drivers/pinctrl/nuvoton/Kconfig"
>>>>> source "drivers/pinctrl/pxa/Kconfig"
>>>>> source "drivers/pinctrl/qcom/Kconfig"
>>>>> -source "drivers/pinctrl/ralink/Kconfig"
>>>>> source "drivers/pinctrl/renesas/Kconfig"
>>>>> source "drivers/pinctrl/samsung/Kconfig"
>>>>> source "drivers/pinctrl/spear/Kconfig"
>>>>> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
>>>>> index d5939840bb2a..ada6ed1d4e91 100644
>>>>> --- a/drivers/pinctrl/Makefile
>>>>> +++ b/drivers/pinctrl/Makefile
>>>>> @@ -66,7 +66,6 @@ obj-y += nomadik/
>>>>> obj-y += nuvoton/
>>>>> obj-$(CONFIG_PINCTRL_PXA) += pxa/
>>>>> obj-$(CONFIG_ARCH_QCOM) += qcom/
>>>>> -obj-$(CONFIG_PINCTRL_RALINK) += ralink/
>>>>> obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
>>>>> obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
>>>>> obj-$(CONFIG_PINCTRL_SPEAR) += spear/
>>>>> diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
>>>>> index a71874fed3d6..2eeb55010563 100644
>>>>> --- a/drivers/pinctrl/mediatek/Kconfig
>>>>> +++ b/drivers/pinctrl/mediatek/Kconfig
>>>>> @@ -1,6 +1,6 @@
>>>>> # SPDX-License-Identifier: GPL-2.0-only
>>>>> menu "MediaTek pinctrl drivers"
>>>>> - depends on ARCH_MEDIATEK || COMPILE_TEST
>>>>> + depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST
>>>>>
>>>>> config EINT_MTK
>>>>> tristate "MediaTek External Interrupt Support"
>>>>> @@ -22,6 +22,12 @@ config PINCTRL_MTK
>>>>> config PINCTRL_MTK_V2
>>>>> tristate
>>>>>
>>>>> +config PINCTRL_MTK_MTMIPS
>>>>> + bool
>>>>> + depends on RALINK
>>>>> + select PINMUX
>>>>> + select GENERIC_PINCONF
>>>>> +
>>>>> config PINCTRL_MTK_MOORE
>>>>> bool
>>>>> depends on OF
>>>>> @@ -43,6 +49,49 @@ config PINCTRL_MTK_PARIS
>>>>> select OF_GPIO
>>>>> select PINCTRL_MTK_V2
>>>>>
>>>>> +# For MIPS SoCs
>>>>> +config PINCTRL_MT7620
>>>>> + bool "MediaTek MT7620 pin control"
>>>>> + depends on SOC_MT7620 || COMPILE_TEST
>>>>> + depends on RALINK
>>>>> + default SOC_MT7620
>>>>> + select PINCTRL_MTK_MTMIPS
>>>>> +
>>>>> +config PINCTRL_MT7621
>>>>> + bool "MediaTek MT7621 pin control"
>>>>> + depends on SOC_MT7621 || COMPILE_TEST
>>>>> + depends on RALINK
>>>>> + default SOC_MT7621
>>>>> + select PINCTRL_MTK_MTMIPS
>>>>> +
>>>>> +config PINCTRL_MT76X8
>>>>> + bool "MediaTek MT76X8 pin control"
>>>>> + depends on SOC_MT7620 || COMPILE_TEST
>>>>> + depends on RALINK
>>>>> + default SOC_MT7620
>>>>> + select PINCTRL_MTK_MTMIPS
>>>>> +
>>>>> +config PINCTRL_RT2880
>>>>> + bool "Ralink RT2880 pin control"
>>>>> + depends on SOC_RT288X || COMPILE_TEST
>>>>> + depends on RALINK
>>>>> + default SOC_RT288X
>>>>> + select PINCTRL_MTK_MTMIPS
>>>>> +
>>>>> +config PINCTRL_RT305X
>>>>> + bool "Ralink RT305X pin control"
>>>>> + depends on SOC_RT305X || COMPILE_TEST
>>>>> + depends on RALINK
>>>>> + default SOC_RT305X
>>>>> + select PINCTRL_MTK_MTMIPS
>>>>> +
>>>>> +config PINCTRL_RT3883
>>>>> + bool "Ralink RT3883 pin control"
>>>>> + depends on SOC_RT3883 || COMPILE_TEST
>>>>> + depends on RALINK
>>>>> + default SOC_RT3883
>>>>> + select PINCTRL_MTK_MTMIPS
>>>>> +
>>>>
>>>> I am not a Kconfig expert at all but...
>>>>
>>>> Should not all of these be depends on SOC_XXX || (COMPILE_TEST &&
>>>> RALINK) and avoid the " depends on RALINK" next line in all of them?
>>
>> This seems to do the same thing but I'm following the "either change
>> them all or fit into the crowd" ideology.
>>
>>>>
>>>> Just asking since we have yet arch read and write register operations
>>>> in pinctrl common ralink code. Having in this way, when we address
>>>> this arch thing in the next series just removing the "&& RALINK" part
>>>> makes the review pretty obvious.
>>
>> You'd have to change RALINK with OF since we're still depending on that.
>> RALINK selects OF by default so it's currently a hidden dependency.
>>
>>>>
>>>> Other than that, changes look good to me.
>>>
>>> I think "depends on SOC_XXX || (COMPILE_TEST && MIPS)" would work also
>>> and might be more accurate for compile testing targets.
>
> Are you sure? SOC_XXX here is already being enabled only if RALINK is
> already enabled, right? [0]
I'm not sure who's your reply to, or what it's about here.
>
>>
>> This is not OK in both cases. If the driver is dependent on Ralink
>> architecture code, choosing any other MIPS platform will make the driver
>> available to compile, which will fail.
>
> SOC_XXX is already dependent on RALINK for real uses but the driver is
> going to be selected for other MIPS platforms only for COMPILE_TEST
> targets. Ideally drivers should be arch agnostic so can be selected
> for any single arch build. Now we have arch dependent read and write
> calls in the code, so you need the right headers to be properly found
> to be able to compile testing. I think MIPS is enough dependency here
> to properly find them. But if not, this should be (COMPILE_TEST &&
> RALINK)
I expect below to work without requiring the MIPS option.
ifeq ($(CONFIG_COMPILE_TEST),y)
CFLAGS_pinctrl-mtmips.o += -I$(srctree)/arch/mips/include
endif
>
>>
>> If the driver is independent of Ralink architecture code, you're
>> limiting the driver to be compiled only when a MIPS platform is selected.
>
> So... how are you planning to allow compile testing of the driver in
> any single arch when we get rid of all the arch dependent code? If you
> make everything dependent on RALINK you cannot.
I intend to make it dependent on OF, not RALINK.
Arınç
On Fri, Mar 3, 2023 at 1:29 AM <[email protected]> wrote:
> [PATCH 00/20] pinctrl: ralink: fix ABI, improve driver, move to mediatek, improve dt-bindings
>
> This is an ambitious effort I've been wanting to do for months.
Good with ambitions :)
As long as Sergio is on board and can test the changes and as long
as the DT maintainers do not explicitly disapprove, I'm game to merge
this.
I guess you will respin on top of v6.3-rc1 when the first round of
non-RFC feedback is collected.
Yours,
Linus Walleij
On Fri, Mar 3, 2023 at 3:18 PM Arınç ÜNAL <[email protected]> wrote:
>
> Heyo,
>
> On 3.03.2023 13:57, Sergio Paracuellos wrote:
> > Hi Arınç,
> >
> > On Fri, Mar 3, 2023 at 9:16 AM Arınç ÜNAL <[email protected]> wrote:
> >>
> >> Hey Sergio,
> >>
> >> On 3.03.2023 09:34, Sergio Paracuellos wrote:
> >>> On Fri, Mar 3, 2023 at 7:17 AM Sergio Paracuellos
> >>> <[email protected]> wrote:
> >>>>
> >>>> Hi Arınç,
> >>>>
> >>>> On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
> >>>>>
> >>>>> From: Arınç ÜNAL <[email protected]>
> >>>>>
> >>>>> This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
> >>>>> introduced new SoCs which utilise this platform. Move the driver to
> >>>>> mediatek pinctrl directory. Rename the ralink core driver to mtmips.
> >>>>>
> >>>>> Signed-off-by: Arınç ÜNAL <[email protected]>
> >>>>> ---
> >>>>> drivers/pinctrl/Kconfig | 1 -
> >>>>> drivers/pinctrl/Makefile | 1 -
> >>>>> drivers/pinctrl/mediatek/Kconfig | 51 ++++++++++-
> >>>>> drivers/pinctrl/mediatek/Makefile | 63 +++++++------
> >>>>> .../{ralink => mediatek}/pinctrl-mt7620.c | 34 +++----
> >>>>> .../{ralink => mediatek}/pinctrl-mt7621.c | 30 +++----
> >>>>> .../{ralink => mediatek}/pinctrl-mt76x8.c | 60 ++++++-------
> >>>>> .../pinctrl-mtmips.c} | 90 +++++++++----------
> >>>>> .../pinctrl-mtmips.h} | 16 ++--
> >>>>> .../{ralink => mediatek}/pinctrl-rt2880.c | 20 ++---
> >>>>> .../{ralink => mediatek}/pinctrl-rt305x.c | 44 ++++-----
> >>>>> .../{ralink => mediatek}/pinctrl-rt3883.c | 28 +++---
> >>>>> drivers/pinctrl/ralink/Kconfig | 40 ---------
> >>>>> drivers/pinctrl/ralink/Makefile | 9 --
> >>>>> 14 files changed, 246 insertions(+), 241 deletions(-)
> >>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7620.c (81%)
> >>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7621.c (80%)
> >>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt76x8.c (81%)
> >>>>> rename drivers/pinctrl/{ralink/pinctrl-ralink.c => mediatek/pinctrl-mtmips.c} (74%)
> >>>>> rename drivers/pinctrl/{ralink/pinctrl-ralink.h => mediatek/pinctrl-mtmips.h} (75%)
> >>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt2880.c (71%)
> >>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt305x.c (75%)
> >>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt3883.c (80%)
> >>>>> delete mode 100644 drivers/pinctrl/ralink/Kconfig
> >>>>> delete mode 100644 drivers/pinctrl/ralink/Makefile
> >>>>>
> >>>>> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> >>>>> index dcb53c4a9584..8a6012770640 100644
> >>>>> --- a/drivers/pinctrl/Kconfig
> >>>>> +++ b/drivers/pinctrl/Kconfig
> >>>>> @@ -537,7 +537,6 @@ source "drivers/pinctrl/nomadik/Kconfig"
> >>>>> source "drivers/pinctrl/nuvoton/Kconfig"
> >>>>> source "drivers/pinctrl/pxa/Kconfig"
> >>>>> source "drivers/pinctrl/qcom/Kconfig"
> >>>>> -source "drivers/pinctrl/ralink/Kconfig"
> >>>>> source "drivers/pinctrl/renesas/Kconfig"
> >>>>> source "drivers/pinctrl/samsung/Kconfig"
> >>>>> source "drivers/pinctrl/spear/Kconfig"
> >>>>> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
> >>>>> index d5939840bb2a..ada6ed1d4e91 100644
> >>>>> --- a/drivers/pinctrl/Makefile
> >>>>> +++ b/drivers/pinctrl/Makefile
> >>>>> @@ -66,7 +66,6 @@ obj-y += nomadik/
> >>>>> obj-y += nuvoton/
> >>>>> obj-$(CONFIG_PINCTRL_PXA) += pxa/
> >>>>> obj-$(CONFIG_ARCH_QCOM) += qcom/
> >>>>> -obj-$(CONFIG_PINCTRL_RALINK) += ralink/
> >>>>> obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
> >>>>> obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
> >>>>> obj-$(CONFIG_PINCTRL_SPEAR) += spear/
> >>>>> diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
> >>>>> index a71874fed3d6..2eeb55010563 100644
> >>>>> --- a/drivers/pinctrl/mediatek/Kconfig
> >>>>> +++ b/drivers/pinctrl/mediatek/Kconfig
> >>>>> @@ -1,6 +1,6 @@
> >>>>> # SPDX-License-Identifier: GPL-2.0-only
> >>>>> menu "MediaTek pinctrl drivers"
> >>>>> - depends on ARCH_MEDIATEK || COMPILE_TEST
> >>>>> + depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST
> >>>>>
> >>>>> config EINT_MTK
> >>>>> tristate "MediaTek External Interrupt Support"
> >>>>> @@ -22,6 +22,12 @@ config PINCTRL_MTK
> >>>>> config PINCTRL_MTK_V2
> >>>>> tristate
> >>>>>
> >>>>> +config PINCTRL_MTK_MTMIPS
> >>>>> + bool
> >>>>> + depends on RALINK
> >>>>> + select PINMUX
> >>>>> + select GENERIC_PINCONF
> >>>>> +
> >>>>> config PINCTRL_MTK_MOORE
> >>>>> bool
> >>>>> depends on OF
> >>>>> @@ -43,6 +49,49 @@ config PINCTRL_MTK_PARIS
> >>>>> select OF_GPIO
> >>>>> select PINCTRL_MTK_V2
> >>>>>
> >>>>> +# For MIPS SoCs
> >>>>> +config PINCTRL_MT7620
> >>>>> + bool "MediaTek MT7620 pin control"
> >>>>> + depends on SOC_MT7620 || COMPILE_TEST
> >>>>> + depends on RALINK
> >>>>> + default SOC_MT7620
> >>>>> + select PINCTRL_MTK_MTMIPS
> >>>>> +
> >>>>> +config PINCTRL_MT7621
> >>>>> + bool "MediaTek MT7621 pin control"
> >>>>> + depends on SOC_MT7621 || COMPILE_TEST
> >>>>> + depends on RALINK
> >>>>> + default SOC_MT7621
> >>>>> + select PINCTRL_MTK_MTMIPS
> >>>>> +
> >>>>> +config PINCTRL_MT76X8
> >>>>> + bool "MediaTek MT76X8 pin control"
> >>>>> + depends on SOC_MT7620 || COMPILE_TEST
> >>>>> + depends on RALINK
> >>>>> + default SOC_MT7620
> >>>>> + select PINCTRL_MTK_MTMIPS
> >>>>> +
> >>>>> +config PINCTRL_RT2880
> >>>>> + bool "Ralink RT2880 pin control"
> >>>>> + depends on SOC_RT288X || COMPILE_TEST
> >>>>> + depends on RALINK
> >>>>> + default SOC_RT288X
> >>>>> + select PINCTRL_MTK_MTMIPS
> >>>>> +
> >>>>> +config PINCTRL_RT305X
> >>>>> + bool "Ralink RT305X pin control"
> >>>>> + depends on SOC_RT305X || COMPILE_TEST
> >>>>> + depends on RALINK
> >>>>> + default SOC_RT305X
> >>>>> + select PINCTRL_MTK_MTMIPS
> >>>>> +
> >>>>> +config PINCTRL_RT3883
> >>>>> + bool "Ralink RT3883 pin control"
> >>>>> + depends on SOC_RT3883 || COMPILE_TEST
> >>>>> + depends on RALINK
> >>>>> + default SOC_RT3883
> >>>>> + select PINCTRL_MTK_MTMIPS
> >>>>> +
> >>>>
> >>>> I am not a Kconfig expert at all but...
> >>>>
> >>>> Should not all of these be depends on SOC_XXX || (COMPILE_TEST &&
> >>>> RALINK) and avoid the " depends on RALINK" next line in all of them?
> >>
> >> This seems to do the same thing but I'm following the "either change
> >> them all or fit into the crowd" ideology.
> >>
> >>>>
> >>>> Just asking since we have yet arch read and write register operations
> >>>> in pinctrl common ralink code. Having in this way, when we address
> >>>> this arch thing in the next series just removing the "&& RALINK" part
> >>>> makes the review pretty obvious.
> >>
> >> You'd have to change RALINK with OF since we're still depending on that.
> >> RALINK selects OF by default so it's currently a hidden dependency.
> >>
> >>>>
> >>>> Other than that, changes look good to me.
> >>>
> >>> I think "depends on SOC_XXX || (COMPILE_TEST && MIPS)" would work also
> >>> and might be more accurate for compile testing targets.
> >
> > Are you sure? SOC_XXX here is already being enabled only if RALINK is
> > already enabled, right? [0]
>
> I'm not sure who's your reply to, or what it's about here.
Bad insertion between lines, sorry :). I was just trying to explain to
you that SOC_RTXX ralink stuff is only available when RALINK is
already selected.
>
> >
> >>
> >> This is not OK in both cases. If the driver is dependent on Ralink
> >> architecture code, choosing any other MIPS platform will make the driver
> >> available to compile, which will fail.
> >
> > SOC_XXX is already dependent on RALINK for real uses but the driver is
> > going to be selected for other MIPS platforms only for COMPILE_TEST
> > targets. Ideally drivers should be arch agnostic so can be selected
> > for any single arch build. Now we have arch dependent read and write
> > calls in the code, so you need the right headers to be properly found
> > to be able to compile testing. I think MIPS is enough dependency here
> > to properly find them. But if not, this should be (COMPILE_TEST &&
> > RALINK)
>
> I expect below to work without requiring the MIPS option.
>
> ifeq ($(CONFIG_COMPILE_TEST),y)
> CFLAGS_pinctrl-mtmips.o += -I$(srctree)/arch/mips/include
> endif
Yes, this will work but won't be necessary at all when we get rid of
ralink arch dependent code in the next series.
>
> >
> >>
> >> If the driver is independent of Ralink architecture code, you're
> >> limiting the driver to be compiled only when a MIPS platform is selected.
> >
> > So... how are you planning to allow compile testing of the driver in
> > any single arch when we get rid of all the arch dependent code? If you
> > make everything dependent on RALINK you cannot.
>
> I intend to make it dependent on OF, not RALINK.
Ok, I see, thanks for clarification.
>
> Arınç
Best regards,
Sergio Paracuellos
On Mon, Mar 6, 2023 at 2:50 PM Linus Walleij <[email protected]> wrote:
>
> On Fri, Mar 3, 2023 at 1:29 AM <[email protected]> wrote:
>
> > [PATCH 00/20] pinctrl: ralink: fix ABI, improve driver, move to mediatek, improve dt-bindings
> >
> > This is an ambitious effort I've been wanting to do for months.
>
> Good with ambitions :)
>
> As long as Sergio is on board and can test the changes and as long
> as the DT maintainers do not explicitly disapprove, I'm game to merge
> this.
For sure I am :-). Changes in code are pretty straightforward. The
real big change is just a split of mt7620 and mt76x8 in two different
files. But the split looks good to me. The other bulk of changes is
just moving files around. If DT maintainers are finally ok with the
changes I will try to make time to test this series in a rt5350 SoC
based board I think I have somewhere and on mt7621 SoC based one. Most
of my ralink boards are based on mt7621 so I don't have more platforms
to test this pinctrl changes :(.
>
> I guess you will respin on top of v6.3-rc1 when the first round of
> non-RFC feedback is collected.
>
> Yours,
> Linus Walleij
Thanks,
Sergio Paracuellos
On 6.03.2023 16:50, Linus Walleij wrote:
> On Fri, Mar 3, 2023 at 1:29 AM <[email protected]> wrote:
>
>> [PATCH 00/20] pinctrl: ralink: fix ABI, improve driver, move to mediatek, improve dt-bindings
>>
>> This is an ambitious effort I've been wanting to do for months.
>
> Good with ambitions :)
>
> As long as Sergio is on board and can test the changes and as long
> as the DT maintainers do not explicitly disapprove, I'm game to merge
> this.
Cheers.
>
> I guess you will respin on top of v6.3-rc1 when the first round of
> non-RFC feedback is collected.
Sure, if it's necessary. Once I get feedback, I'll rebase it to your
linusw/linux-pinctrl.git for-next tree, see if it needs manual changes.
I'll let you know.
Arınç
On 6.03.2023 17:07, Sergio Paracuellos wrote:
> On Fri, Mar 3, 2023 at 3:18 PM Arınç ÜNAL <[email protected]> wrote:
>>
>> Heyo,
>>
>> On 3.03.2023 13:57, Sergio Paracuellos wrote:
>>> Hi Arınç,
>>>
>>> On Fri, Mar 3, 2023 at 9:16 AM Arınç ÜNAL <[email protected]> wrote:
>>>>
>>>> Hey Sergio,
>>>>
>>>> On 3.03.2023 09:34, Sergio Paracuellos wrote:
>>>>> On Fri, Mar 3, 2023 at 7:17 AM Sergio Paracuellos
>>>>> <[email protected]> wrote:
>>>>>>
>>>>>> Hi Arınç,
>>>>>>
>>>>>> On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
>>>>>>>
>>>>>>> From: Arınç ÜNAL <[email protected]>
>>>>>>>
>>>>>>> This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
>>>>>>> introduced new SoCs which utilise this platform. Move the driver to
>>>>>>> mediatek pinctrl directory. Rename the ralink core driver to mtmips.
>>>>>>>
>>>>>>> Signed-off-by: Arınç ÜNAL <[email protected]>
>>>>>>> ---
>>>>>>> drivers/pinctrl/Kconfig | 1 -
>>>>>>> drivers/pinctrl/Makefile | 1 -
>>>>>>> drivers/pinctrl/mediatek/Kconfig | 51 ++++++++++-
>>>>>>> drivers/pinctrl/mediatek/Makefile | 63 +++++++------
>>>>>>> .../{ralink => mediatek}/pinctrl-mt7620.c | 34 +++----
>>>>>>> .../{ralink => mediatek}/pinctrl-mt7621.c | 30 +++----
>>>>>>> .../{ralink => mediatek}/pinctrl-mt76x8.c | 60 ++++++-------
>>>>>>> .../pinctrl-mtmips.c} | 90 +++++++++----------
>>>>>>> .../pinctrl-mtmips.h} | 16 ++--
>>>>>>> .../{ralink => mediatek}/pinctrl-rt2880.c | 20 ++---
>>>>>>> .../{ralink => mediatek}/pinctrl-rt305x.c | 44 ++++-----
>>>>>>> .../{ralink => mediatek}/pinctrl-rt3883.c | 28 +++---
>>>>>>> drivers/pinctrl/ralink/Kconfig | 40 ---------
>>>>>>> drivers/pinctrl/ralink/Makefile | 9 --
>>>>>>> 14 files changed, 246 insertions(+), 241 deletions(-)
>>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7620.c (81%)
>>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7621.c (80%)
>>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt76x8.c (81%)
>>>>>>> rename drivers/pinctrl/{ralink/pinctrl-ralink.c => mediatek/pinctrl-mtmips.c} (74%)
>>>>>>> rename drivers/pinctrl/{ralink/pinctrl-ralink.h => mediatek/pinctrl-mtmips.h} (75%)
>>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt2880.c (71%)
>>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt305x.c (75%)
>>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt3883.c (80%)
>>>>>>> delete mode 100644 drivers/pinctrl/ralink/Kconfig
>>>>>>> delete mode 100644 drivers/pinctrl/ralink/Makefile
>>>>>>>
>>>>>>> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
>>>>>>> index dcb53c4a9584..8a6012770640 100644
>>>>>>> --- a/drivers/pinctrl/Kconfig
>>>>>>> +++ b/drivers/pinctrl/Kconfig
>>>>>>> @@ -537,7 +537,6 @@ source "drivers/pinctrl/nomadik/Kconfig"
>>>>>>> source "drivers/pinctrl/nuvoton/Kconfig"
>>>>>>> source "drivers/pinctrl/pxa/Kconfig"
>>>>>>> source "drivers/pinctrl/qcom/Kconfig"
>>>>>>> -source "drivers/pinctrl/ralink/Kconfig"
>>>>>>> source "drivers/pinctrl/renesas/Kconfig"
>>>>>>> source "drivers/pinctrl/samsung/Kconfig"
>>>>>>> source "drivers/pinctrl/spear/Kconfig"
>>>>>>> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
>>>>>>> index d5939840bb2a..ada6ed1d4e91 100644
>>>>>>> --- a/drivers/pinctrl/Makefile
>>>>>>> +++ b/drivers/pinctrl/Makefile
>>>>>>> @@ -66,7 +66,6 @@ obj-y += nomadik/
>>>>>>> obj-y += nuvoton/
>>>>>>> obj-$(CONFIG_PINCTRL_PXA) += pxa/
>>>>>>> obj-$(CONFIG_ARCH_QCOM) += qcom/
>>>>>>> -obj-$(CONFIG_PINCTRL_RALINK) += ralink/
>>>>>>> obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
>>>>>>> obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
>>>>>>> obj-$(CONFIG_PINCTRL_SPEAR) += spear/
>>>>>>> diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
>>>>>>> index a71874fed3d6..2eeb55010563 100644
>>>>>>> --- a/drivers/pinctrl/mediatek/Kconfig
>>>>>>> +++ b/drivers/pinctrl/mediatek/Kconfig
>>>>>>> @@ -1,6 +1,6 @@
>>>>>>> # SPDX-License-Identifier: GPL-2.0-only
>>>>>>> menu "MediaTek pinctrl drivers"
>>>>>>> - depends on ARCH_MEDIATEK || COMPILE_TEST
>>>>>>> + depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST
>>>>>>>
>>>>>>> config EINT_MTK
>>>>>>> tristate "MediaTek External Interrupt Support"
>>>>>>> @@ -22,6 +22,12 @@ config PINCTRL_MTK
>>>>>>> config PINCTRL_MTK_V2
>>>>>>> tristate
>>>>>>>
>>>>>>> +config PINCTRL_MTK_MTMIPS
>>>>>>> + bool
>>>>>>> + depends on RALINK
>>>>>>> + select PINMUX
>>>>>>> + select GENERIC_PINCONF
>>>>>>> +
>>>>>>> config PINCTRL_MTK_MOORE
>>>>>>> bool
>>>>>>> depends on OF
>>>>>>> @@ -43,6 +49,49 @@ config PINCTRL_MTK_PARIS
>>>>>>> select OF_GPIO
>>>>>>> select PINCTRL_MTK_V2
>>>>>>>
>>>>>>> +# For MIPS SoCs
>>>>>>> +config PINCTRL_MT7620
>>>>>>> + bool "MediaTek MT7620 pin control"
>>>>>>> + depends on SOC_MT7620 || COMPILE_TEST
>>>>>>> + depends on RALINK
>>>>>>> + default SOC_MT7620
>>>>>>> + select PINCTRL_MTK_MTMIPS
>>>>>>> +
>>>>>>> +config PINCTRL_MT7621
>>>>>>> + bool "MediaTek MT7621 pin control"
>>>>>>> + depends on SOC_MT7621 || COMPILE_TEST
>>>>>>> + depends on RALINK
>>>>>>> + default SOC_MT7621
>>>>>>> + select PINCTRL_MTK_MTMIPS
>>>>>>> +
>>>>>>> +config PINCTRL_MT76X8
>>>>>>> + bool "MediaTek MT76X8 pin control"
>>>>>>> + depends on SOC_MT7620 || COMPILE_TEST
>>>>>>> + depends on RALINK
>>>>>>> + default SOC_MT7620
>>>>>>> + select PINCTRL_MTK_MTMIPS
>>>>>>> +
>>>>>>> +config PINCTRL_RT2880
>>>>>>> + bool "Ralink RT2880 pin control"
>>>>>>> + depends on SOC_RT288X || COMPILE_TEST
>>>>>>> + depends on RALINK
>>>>>>> + default SOC_RT288X
>>>>>>> + select PINCTRL_MTK_MTMIPS
>>>>>>> +
>>>>>>> +config PINCTRL_RT305X
>>>>>>> + bool "Ralink RT305X pin control"
>>>>>>> + depends on SOC_RT305X || COMPILE_TEST
>>>>>>> + depends on RALINK
>>>>>>> + default SOC_RT305X
>>>>>>> + select PINCTRL_MTK_MTMIPS
>>>>>>> +
>>>>>>> +config PINCTRL_RT3883
>>>>>>> + bool "Ralink RT3883 pin control"
>>>>>>> + depends on SOC_RT3883 || COMPILE_TEST
>>>>>>> + depends on RALINK
>>>>>>> + default SOC_RT3883
>>>>>>> + select PINCTRL_MTK_MTMIPS
>>>>>>> +
>>>>>>
>>>>>> I am not a Kconfig expert at all but...
>>>>>>
>>>>>> Should not all of these be depends on SOC_XXX || (COMPILE_TEST &&
>>>>>> RALINK) and avoid the " depends on RALINK" next line in all of them?
>>>>
>>>> This seems to do the same thing but I'm following the "either change
>>>> them all or fit into the crowd" ideology.
>>>>
>>>>>>
>>>>>> Just asking since we have yet arch read and write register operations
>>>>>> in pinctrl common ralink code. Having in this way, when we address
>>>>>> this arch thing in the next series just removing the "&& RALINK" part
>>>>>> makes the review pretty obvious.
>>>>
>>>> You'd have to change RALINK with OF since we're still depending on that.
>>>> RALINK selects OF by default so it's currently a hidden dependency.
>>>>
>>>>>>
>>>>>> Other than that, changes look good to me.
>>>>>
>>>>> I think "depends on SOC_XXX || (COMPILE_TEST && MIPS)" would work also
>>>>> and might be more accurate for compile testing targets.
>>>
>>> Are you sure? SOC_XXX here is already being enabled only if RALINK is
>>> already enabled, right? [0]
>>
>> I'm not sure who's your reply to, or what it's about here.
>
> Bad insertion between lines, sorry :). I was just trying to explain to
> you that SOC_RTXX ralink stuff is only available when RALINK is
> already selected.
Makes sense. However, I believe what I said below is still true. This
option will be available to compile if a Ralink SoC (and therefore
RALINK) is enabled, OR, COMPILE_TEST and MIPS is enabled. The latter
will fail to compile if the enabled MIPS platform is not RALINK.
>
>>
>>>
>>>>
>>>> This is not OK in both cases. If the driver is dependent on Ralink
>>>> architecture code, choosing any other MIPS platform will make the driver
>>>> available to compile, which will fail.
>>>
>>> SOC_XXX is already dependent on RALINK for real uses but the driver is
>>> going to be selected for other MIPS platforms only for COMPILE_TEST
>>> targets. Ideally drivers should be arch agnostic so can be selected
>>> for any single arch build. Now we have arch dependent read and write
>>> calls in the code, so you need the right headers to be properly found
>>> to be able to compile testing. I think MIPS is enough dependency here
>>> to properly find them. But if not, this should be (COMPILE_TEST &&
>>> RALINK)
>>
>> I expect below to work without requiring the MIPS option.
>>
>> ifeq ($(CONFIG_COMPILE_TEST),y)
>> CFLAGS_pinctrl-mtmips.o += -I$(srctree)/arch/mips/include
>> endif
>
> Yes, this will work but won't be necessary at all when we get rid of
> ralink arch dependent code in the next series.
Oh, you plan to completely get rid of it, including headers. That's better!
However, rt305x_pinctrl_probe() on pinctrl-rt305x.c needs them to find
out the SoC to match the pinmux data. Sure, splitting the driver further
will work but I'm wondering if you've got something else in mind to
address this.
Arınç
On Mon, Mar 6, 2023 at 4:06 PM Arınç ÜNAL <[email protected]> wrote:
>
> On 6.03.2023 17:07, Sergio Paracuellos wrote:
> > On Fri, Mar 3, 2023 at 3:18 PM Arınç ÜNAL <[email protected]> wrote:
> >>
> >> Heyo,
> >>
> >> On 3.03.2023 13:57, Sergio Paracuellos wrote:
> >>> Hi Arınç,
> >>>
> >>> On Fri, Mar 3, 2023 at 9:16 AM Arınç ÜNAL <[email protected]> wrote:
> >>>>
> >>>> Hey Sergio,
> >>>>
> >>>> On 3.03.2023 09:34, Sergio Paracuellos wrote:
> >>>>> On Fri, Mar 3, 2023 at 7:17 AM Sergio Paracuellos
> >>>>> <[email protected]> wrote:
> >>>>>>
> >>>>>> Hi Arınç,
> >>>>>>
> >>>>>> On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
> >>>>>>>
> >>>>>>> From: Arınç ÜNAL <[email protected]>
> >>>>>>>
> >>>>>>> This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
> >>>>>>> introduced new SoCs which utilise this platform. Move the driver to
> >>>>>>> mediatek pinctrl directory. Rename the ralink core driver to mtmips.
> >>>>>>>
> >>>>>>> Signed-off-by: Arınç ÜNAL <[email protected]>
> >>>>>>> ---
> >>>>>>> drivers/pinctrl/Kconfig | 1 -
> >>>>>>> drivers/pinctrl/Makefile | 1 -
> >>>>>>> drivers/pinctrl/mediatek/Kconfig | 51 ++++++++++-
> >>>>>>> drivers/pinctrl/mediatek/Makefile | 63 +++++++------
> >>>>>>> .../{ralink => mediatek}/pinctrl-mt7620.c | 34 +++----
> >>>>>>> .../{ralink => mediatek}/pinctrl-mt7621.c | 30 +++----
> >>>>>>> .../{ralink => mediatek}/pinctrl-mt76x8.c | 60 ++++++-------
> >>>>>>> .../pinctrl-mtmips.c} | 90 +++++++++----------
> >>>>>>> .../pinctrl-mtmips.h} | 16 ++--
> >>>>>>> .../{ralink => mediatek}/pinctrl-rt2880.c | 20 ++---
> >>>>>>> .../{ralink => mediatek}/pinctrl-rt305x.c | 44 ++++-----
> >>>>>>> .../{ralink => mediatek}/pinctrl-rt3883.c | 28 +++---
> >>>>>>> drivers/pinctrl/ralink/Kconfig | 40 ---------
> >>>>>>> drivers/pinctrl/ralink/Makefile | 9 --
> >>>>>>> 14 files changed, 246 insertions(+), 241 deletions(-)
> >>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7620.c (81%)
> >>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7621.c (80%)
> >>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt76x8.c (81%)
> >>>>>>> rename drivers/pinctrl/{ralink/pinctrl-ralink.c => mediatek/pinctrl-mtmips.c} (74%)
> >>>>>>> rename drivers/pinctrl/{ralink/pinctrl-ralink.h => mediatek/pinctrl-mtmips.h} (75%)
> >>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt2880.c (71%)
> >>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt305x.c (75%)
> >>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt3883.c (80%)
> >>>>>>> delete mode 100644 drivers/pinctrl/ralink/Kconfig
> >>>>>>> delete mode 100644 drivers/pinctrl/ralink/Makefile
> >>>>>>>
> >>>>>>> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> >>>>>>> index dcb53c4a9584..8a6012770640 100644
> >>>>>>> --- a/drivers/pinctrl/Kconfig
> >>>>>>> +++ b/drivers/pinctrl/Kconfig
> >>>>>>> @@ -537,7 +537,6 @@ source "drivers/pinctrl/nomadik/Kconfig"
> >>>>>>> source "drivers/pinctrl/nuvoton/Kconfig"
> >>>>>>> source "drivers/pinctrl/pxa/Kconfig"
> >>>>>>> source "drivers/pinctrl/qcom/Kconfig"
> >>>>>>> -source "drivers/pinctrl/ralink/Kconfig"
> >>>>>>> source "drivers/pinctrl/renesas/Kconfig"
> >>>>>>> source "drivers/pinctrl/samsung/Kconfig"
> >>>>>>> source "drivers/pinctrl/spear/Kconfig"
> >>>>>>> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
> >>>>>>> index d5939840bb2a..ada6ed1d4e91 100644
> >>>>>>> --- a/drivers/pinctrl/Makefile
> >>>>>>> +++ b/drivers/pinctrl/Makefile
> >>>>>>> @@ -66,7 +66,6 @@ obj-y += nomadik/
> >>>>>>> obj-y += nuvoton/
> >>>>>>> obj-$(CONFIG_PINCTRL_PXA) += pxa/
> >>>>>>> obj-$(CONFIG_ARCH_QCOM) += qcom/
> >>>>>>> -obj-$(CONFIG_PINCTRL_RALINK) += ralink/
> >>>>>>> obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
> >>>>>>> obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
> >>>>>>> obj-$(CONFIG_PINCTRL_SPEAR) += spear/
> >>>>>>> diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
> >>>>>>> index a71874fed3d6..2eeb55010563 100644
> >>>>>>> --- a/drivers/pinctrl/mediatek/Kconfig
> >>>>>>> +++ b/drivers/pinctrl/mediatek/Kconfig
> >>>>>>> @@ -1,6 +1,6 @@
> >>>>>>> # SPDX-License-Identifier: GPL-2.0-only
> >>>>>>> menu "MediaTek pinctrl drivers"
> >>>>>>> - depends on ARCH_MEDIATEK || COMPILE_TEST
> >>>>>>> + depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST
> >>>>>>>
> >>>>>>> config EINT_MTK
> >>>>>>> tristate "MediaTek External Interrupt Support"
> >>>>>>> @@ -22,6 +22,12 @@ config PINCTRL_MTK
> >>>>>>> config PINCTRL_MTK_V2
> >>>>>>> tristate
> >>>>>>>
> >>>>>>> +config PINCTRL_MTK_MTMIPS
> >>>>>>> + bool
> >>>>>>> + depends on RALINK
> >>>>>>> + select PINMUX
> >>>>>>> + select GENERIC_PINCONF
> >>>>>>> +
> >>>>>>> config PINCTRL_MTK_MOORE
> >>>>>>> bool
> >>>>>>> depends on OF
> >>>>>>> @@ -43,6 +49,49 @@ config PINCTRL_MTK_PARIS
> >>>>>>> select OF_GPIO
> >>>>>>> select PINCTRL_MTK_V2
> >>>>>>>
> >>>>>>> +# For MIPS SoCs
> >>>>>>> +config PINCTRL_MT7620
> >>>>>>> + bool "MediaTek MT7620 pin control"
> >>>>>>> + depends on SOC_MT7620 || COMPILE_TEST
> >>>>>>> + depends on RALINK
> >>>>>>> + default SOC_MT7620
> >>>>>>> + select PINCTRL_MTK_MTMIPS
> >>>>>>> +
> >>>>>>> +config PINCTRL_MT7621
> >>>>>>> + bool "MediaTek MT7621 pin control"
> >>>>>>> + depends on SOC_MT7621 || COMPILE_TEST
> >>>>>>> + depends on RALINK
> >>>>>>> + default SOC_MT7621
> >>>>>>> + select PINCTRL_MTK_MTMIPS
> >>>>>>> +
> >>>>>>> +config PINCTRL_MT76X8
> >>>>>>> + bool "MediaTek MT76X8 pin control"
> >>>>>>> + depends on SOC_MT7620 || COMPILE_TEST
> >>>>>>> + depends on RALINK
> >>>>>>> + default SOC_MT7620
> >>>>>>> + select PINCTRL_MTK_MTMIPS
> >>>>>>> +
> >>>>>>> +config PINCTRL_RT2880
> >>>>>>> + bool "Ralink RT2880 pin control"
> >>>>>>> + depends on SOC_RT288X || COMPILE_TEST
> >>>>>>> + depends on RALINK
> >>>>>>> + default SOC_RT288X
> >>>>>>> + select PINCTRL_MTK_MTMIPS
> >>>>>>> +
> >>>>>>> +config PINCTRL_RT305X
> >>>>>>> + bool "Ralink RT305X pin control"
> >>>>>>> + depends on SOC_RT305X || COMPILE_TEST
> >>>>>>> + depends on RALINK
> >>>>>>> + default SOC_RT305X
> >>>>>>> + select PINCTRL_MTK_MTMIPS
> >>>>>>> +
> >>>>>>> +config PINCTRL_RT3883
> >>>>>>> + bool "Ralink RT3883 pin control"
> >>>>>>> + depends on SOC_RT3883 || COMPILE_TEST
> >>>>>>> + depends on RALINK
> >>>>>>> + default SOC_RT3883
> >>>>>>> + select PINCTRL_MTK_MTMIPS
> >>>>>>> +
> >>>>>>
> >>>>>> I am not a Kconfig expert at all but...
> >>>>>>
> >>>>>> Should not all of these be depends on SOC_XXX || (COMPILE_TEST &&
> >>>>>> RALINK) and avoid the " depends on RALINK" next line in all of them?
> >>>>
> >>>> This seems to do the same thing but I'm following the "either change
> >>>> them all or fit into the crowd" ideology.
> >>>>
> >>>>>>
> >>>>>> Just asking since we have yet arch read and write register operations
> >>>>>> in pinctrl common ralink code. Having in this way, when we address
> >>>>>> this arch thing in the next series just removing the "&& RALINK" part
> >>>>>> makes the review pretty obvious.
> >>>>
> >>>> You'd have to change RALINK with OF since we're still depending on that.
> >>>> RALINK selects OF by default so it's currently a hidden dependency.
> >>>>
> >>>>>>
> >>>>>> Other than that, changes look good to me.
> >>>>>
> >>>>> I think "depends on SOC_XXX || (COMPILE_TEST && MIPS)" would work also
> >>>>> and might be more accurate for compile testing targets.
> >>>
> >>> Are you sure? SOC_XXX here is already being enabled only if RALINK is
> >>> already enabled, right? [0]
> >>
> >> I'm not sure who's your reply to, or what it's about here.
> >
> > Bad insertion between lines, sorry :). I was just trying to explain to
> > you that SOC_RTXX ralink stuff is only available when RALINK is
> > already selected.
>
> Makes sense. However, I believe what I said below is still true. This
> option will be available to compile if a Ralink SoC (and therefore
> RALINK) is enabled, OR, COMPILE_TEST and MIPS is enabled. The latter
> will fail to compile if the enabled MIPS platform is not RALINK.
>
> >
> >>
> >>>
> >>>>
> >>>> This is not OK in both cases. If the driver is dependent on Ralink
> >>>> architecture code, choosing any other MIPS platform will make the driver
> >>>> available to compile, which will fail.
> >>>
> >>> SOC_XXX is already dependent on RALINK for real uses but the driver is
> >>> going to be selected for other MIPS platforms only for COMPILE_TEST
> >>> targets. Ideally drivers should be arch agnostic so can be selected
> >>> for any single arch build. Now we have arch dependent read and write
> >>> calls in the code, so you need the right headers to be properly found
> >>> to be able to compile testing. I think MIPS is enough dependency here
> >>> to properly find them. But if not, this should be (COMPILE_TEST &&
> >>> RALINK)
> >>
> >> I expect below to work without requiring the MIPS option.
> >>
> >> ifeq ($(CONFIG_COMPILE_TEST),y)
> >> CFLAGS_pinctrl-mtmips.o += -I$(srctree)/arch/mips/include
> >> endif
> >
> > Yes, this will work but won't be necessary at all when we get rid of
> > ralink arch dependent code in the next series.
>
> Oh, you plan to completely get rid of it, including headers. That's better!
I'd really love to get rid of all of that, yes.
>
> However, rt305x_pinctrl_probe() on pinctrl-rt305x.c needs them to find
> out the SoC to match the pinmux data. Sure, splitting the driver further
> will work but I'm wondering if you've got something else in mind to
> address this.
I know. Sharing the same compatible string makes really hard to do
this easily. One of my thoughts was to split also that in the driver
as you are pointing out here. I have also submitted this series [0] to
be able to make use of soc_match stuff instead of relying on
compatible strings for these kinds of situations. However I am not
also sure that would be a valid approach. Let's see. At the end we can
end up splitting the driver if nothing seems to work.
Thanks,
Sergio Paracuellos
[0]: https://lore.kernel.org/linux-mips/[email protected]/T/#t
>
> Arınç
On 6.03.2023 19:15, Sergio Paracuellos wrote:
> On Mon, Mar 6, 2023 at 4:06 PM Arınç ÜNAL <[email protected]> wrote:
>>
>> On 6.03.2023 17:07, Sergio Paracuellos wrote:
>>> On Fri, Mar 3, 2023 at 3:18 PM Arınç ÜNAL <[email protected]> wrote:
>>>>
>>>> Heyo,
>>>>
>>>> On 3.03.2023 13:57, Sergio Paracuellos wrote:
>>>>> Hi Arınç,
>>>>>
>>>>> On Fri, Mar 3, 2023 at 9:16 AM Arınç ÜNAL <[email protected]> wrote:
>>>>>>
>>>>>> Hey Sergio,
>>>>>>
>>>>>> On 3.03.2023 09:34, Sergio Paracuellos wrote:
>>>>>>> On Fri, Mar 3, 2023 at 7:17 AM Sergio Paracuellos
>>>>>>> <[email protected]> wrote:
>>>>>>>>
>>>>>>>> Hi Arınç,
>>>>>>>>
>>>>>>>> On Fri, Mar 3, 2023 at 1:30 AM <[email protected]> wrote:
>>>>>>>>>
>>>>>>>>> From: Arınç ÜNAL <[email protected]>
>>>>>>>>>
>>>>>>>>> This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
>>>>>>>>> introduced new SoCs which utilise this platform. Move the driver to
>>>>>>>>> mediatek pinctrl directory. Rename the ralink core driver to mtmips.
>>>>>>>>>
>>>>>>>>> Signed-off-by: Arınç ÜNAL <[email protected]>
>>>>>>>>> ---
>>>>>>>>> drivers/pinctrl/Kconfig | 1 -
>>>>>>>>> drivers/pinctrl/Makefile | 1 -
>>>>>>>>> drivers/pinctrl/mediatek/Kconfig | 51 ++++++++++-
>>>>>>>>> drivers/pinctrl/mediatek/Makefile | 63 +++++++------
>>>>>>>>> .../{ralink => mediatek}/pinctrl-mt7620.c | 34 +++----
>>>>>>>>> .../{ralink => mediatek}/pinctrl-mt7621.c | 30 +++----
>>>>>>>>> .../{ralink => mediatek}/pinctrl-mt76x8.c | 60 ++++++-------
>>>>>>>>> .../pinctrl-mtmips.c} | 90 +++++++++----------
>>>>>>>>> .../pinctrl-mtmips.h} | 16 ++--
>>>>>>>>> .../{ralink => mediatek}/pinctrl-rt2880.c | 20 ++---
>>>>>>>>> .../{ralink => mediatek}/pinctrl-rt305x.c | 44 ++++-----
>>>>>>>>> .../{ralink => mediatek}/pinctrl-rt3883.c | 28 +++---
>>>>>>>>> drivers/pinctrl/ralink/Kconfig | 40 ---------
>>>>>>>>> drivers/pinctrl/ralink/Makefile | 9 --
>>>>>>>>> 14 files changed, 246 insertions(+), 241 deletions(-)
>>>>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7620.c (81%)
>>>>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt7621.c (80%)
>>>>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-mt76x8.c (81%)
>>>>>>>>> rename drivers/pinctrl/{ralink/pinctrl-ralink.c => mediatek/pinctrl-mtmips.c} (74%)
>>>>>>>>> rename drivers/pinctrl/{ralink/pinctrl-ralink.h => mediatek/pinctrl-mtmips.h} (75%)
>>>>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt2880.c (71%)
>>>>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt305x.c (75%)
>>>>>>>>> rename drivers/pinctrl/{ralink => mediatek}/pinctrl-rt3883.c (80%)
>>>>>>>>> delete mode 100644 drivers/pinctrl/ralink/Kconfig
>>>>>>>>> delete mode 100644 drivers/pinctrl/ralink/Makefile
>>>>>>>>>
>>>>>>>>> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
>>>>>>>>> index dcb53c4a9584..8a6012770640 100644
>>>>>>>>> --- a/drivers/pinctrl/Kconfig
>>>>>>>>> +++ b/drivers/pinctrl/Kconfig
>>>>>>>>> @@ -537,7 +537,6 @@ source "drivers/pinctrl/nomadik/Kconfig"
>>>>>>>>> source "drivers/pinctrl/nuvoton/Kconfig"
>>>>>>>>> source "drivers/pinctrl/pxa/Kconfig"
>>>>>>>>> source "drivers/pinctrl/qcom/Kconfig"
>>>>>>>>> -source "drivers/pinctrl/ralink/Kconfig"
>>>>>>>>> source "drivers/pinctrl/renesas/Kconfig"
>>>>>>>>> source "drivers/pinctrl/samsung/Kconfig"
>>>>>>>>> source "drivers/pinctrl/spear/Kconfig"
>>>>>>>>> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
>>>>>>>>> index d5939840bb2a..ada6ed1d4e91 100644
>>>>>>>>> --- a/drivers/pinctrl/Makefile
>>>>>>>>> +++ b/drivers/pinctrl/Makefile
>>>>>>>>> @@ -66,7 +66,6 @@ obj-y += nomadik/
>>>>>>>>> obj-y += nuvoton/
>>>>>>>>> obj-$(CONFIG_PINCTRL_PXA) += pxa/
>>>>>>>>> obj-$(CONFIG_ARCH_QCOM) += qcom/
>>>>>>>>> -obj-$(CONFIG_PINCTRL_RALINK) += ralink/
>>>>>>>>> obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
>>>>>>>>> obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
>>>>>>>>> obj-$(CONFIG_PINCTRL_SPEAR) += spear/
>>>>>>>>> diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
>>>>>>>>> index a71874fed3d6..2eeb55010563 100644
>>>>>>>>> --- a/drivers/pinctrl/mediatek/Kconfig
>>>>>>>>> +++ b/drivers/pinctrl/mediatek/Kconfig
>>>>>>>>> @@ -1,6 +1,6 @@
>>>>>>>>> # SPDX-License-Identifier: GPL-2.0-only
>>>>>>>>> menu "MediaTek pinctrl drivers"
>>>>>>>>> - depends on ARCH_MEDIATEK || COMPILE_TEST
>>>>>>>>> + depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST
>>>>>>>>>
>>>>>>>>> config EINT_MTK
>>>>>>>>> tristate "MediaTek External Interrupt Support"
>>>>>>>>> @@ -22,6 +22,12 @@ config PINCTRL_MTK
>>>>>>>>> config PINCTRL_MTK_V2
>>>>>>>>> tristate
>>>>>>>>>
>>>>>>>>> +config PINCTRL_MTK_MTMIPS
>>>>>>>>> + bool
>>>>>>>>> + depends on RALINK
>>>>>>>>> + select PINMUX
>>>>>>>>> + select GENERIC_PINCONF
>>>>>>>>> +
>>>>>>>>> config PINCTRL_MTK_MOORE
>>>>>>>>> bool
>>>>>>>>> depends on OF
>>>>>>>>> @@ -43,6 +49,49 @@ config PINCTRL_MTK_PARIS
>>>>>>>>> select OF_GPIO
>>>>>>>>> select PINCTRL_MTK_V2
>>>>>>>>>
>>>>>>>>> +# For MIPS SoCs
>>>>>>>>> +config PINCTRL_MT7620
>>>>>>>>> + bool "MediaTek MT7620 pin control"
>>>>>>>>> + depends on SOC_MT7620 || COMPILE_TEST
>>>>>>>>> + depends on RALINK
>>>>>>>>> + default SOC_MT7620
>>>>>>>>> + select PINCTRL_MTK_MTMIPS
>>>>>>>>> +
>>>>>>>>> +config PINCTRL_MT7621
>>>>>>>>> + bool "MediaTek MT7621 pin control"
>>>>>>>>> + depends on SOC_MT7621 || COMPILE_TEST
>>>>>>>>> + depends on RALINK
>>>>>>>>> + default SOC_MT7621
>>>>>>>>> + select PINCTRL_MTK_MTMIPS
>>>>>>>>> +
>>>>>>>>> +config PINCTRL_MT76X8
>>>>>>>>> + bool "MediaTek MT76X8 pin control"
>>>>>>>>> + depends on SOC_MT7620 || COMPILE_TEST
>>>>>>>>> + depends on RALINK
>>>>>>>>> + default SOC_MT7620
>>>>>>>>> + select PINCTRL_MTK_MTMIPS
>>>>>>>>> +
>>>>>>>>> +config PINCTRL_RT2880
>>>>>>>>> + bool "Ralink RT2880 pin control"
>>>>>>>>> + depends on SOC_RT288X || COMPILE_TEST
>>>>>>>>> + depends on RALINK
>>>>>>>>> + default SOC_RT288X
>>>>>>>>> + select PINCTRL_MTK_MTMIPS
>>>>>>>>> +
>>>>>>>>> +config PINCTRL_RT305X
>>>>>>>>> + bool "Ralink RT305X pin control"
>>>>>>>>> + depends on SOC_RT305X || COMPILE_TEST
>>>>>>>>> + depends on RALINK
>>>>>>>>> + default SOC_RT305X
>>>>>>>>> + select PINCTRL_MTK_MTMIPS
>>>>>>>>> +
>>>>>>>>> +config PINCTRL_RT3883
>>>>>>>>> + bool "Ralink RT3883 pin control"
>>>>>>>>> + depends on SOC_RT3883 || COMPILE_TEST
>>>>>>>>> + depends on RALINK
>>>>>>>>> + default SOC_RT3883
>>>>>>>>> + select PINCTRL_MTK_MTMIPS
>>>>>>>>> +
>>>>>>>>
>>>>>>>> I am not a Kconfig expert at all but...
>>>>>>>>
>>>>>>>> Should not all of these be depends on SOC_XXX || (COMPILE_TEST &&
>>>>>>>> RALINK) and avoid the " depends on RALINK" next line in all of them?
>>>>>>
>>>>>> This seems to do the same thing but I'm following the "either change
>>>>>> them all or fit into the crowd" ideology.
>>>>>>
>>>>>>>>
>>>>>>>> Just asking since we have yet arch read and write register operations
>>>>>>>> in pinctrl common ralink code. Having in this way, when we address
>>>>>>>> this arch thing in the next series just removing the "&& RALINK" part
>>>>>>>> makes the review pretty obvious.
>>>>>>
>>>>>> You'd have to change RALINK with OF since we're still depending on that.
>>>>>> RALINK selects OF by default so it's currently a hidden dependency.
>>>>>>
>>>>>>>>
>>>>>>>> Other than that, changes look good to me.
>>>>>>>
>>>>>>> I think "depends on SOC_XXX || (COMPILE_TEST && MIPS)" would work also
>>>>>>> and might be more accurate for compile testing targets.
>>>>>
>>>>> Are you sure? SOC_XXX here is already being enabled only if RALINK is
>>>>> already enabled, right? [0]
>>>>
>>>> I'm not sure who's your reply to, or what it's about here.
>>>
>>> Bad insertion between lines, sorry :). I was just trying to explain to
>>> you that SOC_RTXX ralink stuff is only available when RALINK is
>>> already selected.
>>
>> Makes sense. However, I believe what I said below is still true. This
>> option will be available to compile if a Ralink SoC (and therefore
>> RALINK) is enabled, OR, COMPILE_TEST and MIPS is enabled. The latter
>> will fail to compile if the enabled MIPS platform is not RALINK.
>>
>>>
>>>>
>>>>>
>>>>>>
>>>>>> This is not OK in both cases. If the driver is dependent on Ralink
>>>>>> architecture code, choosing any other MIPS platform will make the driver
>>>>>> available to compile, which will fail.
>>>>>
>>>>> SOC_XXX is already dependent on RALINK for real uses but the driver is
>>>>> going to be selected for other MIPS platforms only for COMPILE_TEST
>>>>> targets. Ideally drivers should be arch agnostic so can be selected
>>>>> for any single arch build. Now we have arch dependent read and write
>>>>> calls in the code, so you need the right headers to be properly found
>>>>> to be able to compile testing. I think MIPS is enough dependency here
>>>>> to properly find them. But if not, this should be (COMPILE_TEST &&
>>>>> RALINK)
>>>>
>>>> I expect below to work without requiring the MIPS option.
>>>>
>>>> ifeq ($(CONFIG_COMPILE_TEST),y)
>>>> CFLAGS_pinctrl-mtmips.o += -I$(srctree)/arch/mips/include
>>>> endif
>>>
>>> Yes, this will work but won't be necessary at all when we get rid of
>>> ralink arch dependent code in the next series.
>>
>> Oh, you plan to completely get rid of it, including headers. That's better!
>
> I'd really love to get rid of all of that, yes.
>
>>
>> However, rt305x_pinctrl_probe() on pinctrl-rt305x.c needs them to find
>> out the SoC to match the pinmux data. Sure, splitting the driver further
>> will work but I'm wondering if you've got something else in mind to
>> address this.
>
> I know. Sharing the same compatible string makes really hard to do
> this easily. One of my thoughts was to split also that in the driver
> as you are pointing out here. I have also submitted this series [0] to
> be able to make use of soc_match stuff instead of relying on
> compatible strings for these kinds of situations. However I am not
> also sure that would be a valid approach. Let's see. At the end we can
> end up splitting the driver if nothing seems to work.
Sounds good, I appreciate your efforts.
Arınç
On Mon, Mar 6, 2023 at 3:56 PM Arınç ÜNAL <[email protected]> wrote:
> Sure, if it's necessary. Once I get feedback, I'll rebase it to your
> linusw/linux-pinctrl.git for-next tree, see if it needs manual changes.
> I'll let you know.
Hm my for-next branch is a mixdown for linux-next so use the branch
named "devel" instead.
Thanks!
Linus Walleij
On Fri, Mar 03, 2023 at 03:28:36AM +0300, [email protected] wrote:
> From: Arınç ÜNAL <[email protected]>
>
> Move additionalProperties to the top. It's easier to read than after a long
> indented section.
>
> Drop the quotes from the referred schemas.
Not the greatest subject as every change improves something and bindings
is stated twice. Hard to come up with something better since you've
combined 2 different kinds of changes which you shouldn't do either. So
I'd split this patch into 2.
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> .../bindings/pinctrl/ralink,mt7620-pinctrl.yaml | 9 ++++-----
> .../bindings/pinctrl/ralink,mt7621-pinctrl.yaml | 9 ++++-----
> .../bindings/pinctrl/ralink,rt2880-pinctrl.yaml | 9 ++++-----
> .../bindings/pinctrl/ralink,rt305x-pinctrl.yaml | 9 ++++-----
> .../bindings/pinctrl/ralink,rt3883-pinctrl.yaml | 9 ++++-----
> 5 files changed, 20 insertions(+), 25 deletions(-)
On Fri, Mar 03, 2023 at 03:28:37AM +0300, [email protected] wrote:
> From: Arınç ÜNAL <[email protected]>
>
> Add the new mediatek compatible strings. Change the compatible string on
> the examples with the mediatek compatible strings.
>
> Add the new compatible strings for mt7620, mt76x8, and rt305x to be able to
> properly document the pin muxing information of each SoC, or SoCs that use
> the same pinmux data.
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml | 7 +++++--
> .../devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml | 6 ++++--
> .../devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml | 5 ++++-
> 3 files changed, 13 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
> index cde6de77e228..a94d2e7a5f37 100644
> --- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
> @@ -17,7 +17,10 @@ description:
>
> properties:
> compatible:
> - const: ralink,mt7620-pinctrl
> + enum:
> + - mediatek,mt7620-pinctrl
> + - mediatek,mt76x8-pinctrl
> + - ralink,mt7620-pinctrl
To repeat the options from last time:
>Carrying both strings is a NAK. Either you (and everyone using
>these platforms) care about the ABI and are stuck with the "wrong"
>string. In the end, they are just unique identifiers. Or you don't care
>and break the ABI and rename everything. If you do that, do just that
>in your patches and make it crystal clear in the commit msg that is
>your intention and why that is okay.
Marketing/acquistion renames was just an example and common reason. That
doesn't make other reasons okay. I don't see any reason given here.
If you want to break the ABI (do you??, because the commit message
still doesn't say), then you don't need "ralink,mt7620-pinctrl".
Rob
On Fri, Mar 03, 2023 at 03:28:38AM +0300, [email protected] wrote:
> From: Arınç ÜNAL <[email protected]>
>
> This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
> introduced these SoCs which utilise this platform. Rename the schemas to
> mediatek to address the incorrect naming.
I said we don't do renames due to acquistions, you said that wasn't the
reason, but then that's your reasoning here.
To give you another example, *new* i.MX things are still called
'fsl,imx...' and it has been how many years since merging with NXP?
Rob
On Fri, 03 Mar 2023 03:28:43 +0300, [email protected] wrote:
> From: Arınç ÜNAL <[email protected]>
>
> Some schemas include "MediaTek", some "Mediatek". Rename all to "MediaTek"
> to address the naming inconsistency.
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml | 4 ++--
> .../devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml | 2 +-
> .../devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml | 4 ++--
> .../devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml | 2 +-
> .../devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml | 2 +-
> .../devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml | 2 +-
> .../devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml | 2 +-
> .../devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml | 4 ++--
> .../devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml | 4 ++--
> .../devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml | 4 ++--
> .../devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml | 2 +-
> 11 files changed, 16 insertions(+), 16 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Fri, Mar 03, 2023 at 03:28:44AM +0300, [email protected] wrote:
> From: Arınç ÜNAL <[email protected]>
>
> Change the style of description properties to plain style where there's no
> need to preserve the line endings, and vice versa.
>
> Fit the schemas to 80 columns for each line.
I would just leave the enum cases alone and make this patch just about
reformatting 'description' entries. Either way:
Reviewed-by: Rob Herring <[email protected]>
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> .../pinctrl/mediatek,mt65xx-pinctrl.yaml | 20 ++---
> .../pinctrl/mediatek,mt6779-pinctrl.yaml | 31 ++++----
> .../pinctrl/mediatek,mt6795-pinctrl.yaml | 29 ++++----
> .../pinctrl/mediatek,mt7620-pinctrl.yaml | 2 +-
> .../pinctrl/mediatek,mt7621-pinctrl.yaml | 2 +-
> .../pinctrl/mediatek,mt7622-pinctrl.yaml | 24 +++---
> .../pinctrl/mediatek,mt7981-pinctrl.yaml | 33 +++++----
> .../pinctrl/mediatek,mt7986-pinctrl.yaml | 60 +++++++--------
> .../pinctrl/mediatek,mt8183-pinctrl.yaml | 24 +++---
> .../pinctrl/mediatek,mt8186-pinctrl.yaml | 43 ++++++-----
> .../pinctrl/mediatek,mt8188-pinctrl.yaml | 74 ++++++++++---------
> .../pinctrl/mediatek,mt8192-pinctrl.yaml | 43 +++++------
> .../pinctrl/mediatek,mt8195-pinctrl.yaml | 34 ++++-----
> .../pinctrl/mediatek,mt8365-pinctrl.yaml | 26 ++++---
> .../pinctrl/ralink,rt2880-pinctrl.yaml | 2 +-
> .../pinctrl/ralink,rt305x-pinctrl.yaml | 2 +-
> .../pinctrl/ralink,rt3883-pinctrl.yaml | 2 +-
> 17 files changed, 236 insertions(+), 215 deletions(-)
On Fri, Mar 03, 2023 at 03:28:46AM +0300, [email protected] wrote:
> From: Arınç ÜNAL <[email protected]>
>
> Set second level patternProperties to '^.*mux.*$' and '^.*conf.*$' on
> mediatek,mt7986-pinctrl.yaml.
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
> index 46b7228920ed..e937881210c5 100644
> --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
> @@ -72,7 +72,7 @@ patternProperties:
> additionalProperties: false
>
> patternProperties:
> - '.*mux.*':
> + '^.*mux.*$':
These are equivalent (so is just 'mux', but that's ambiguous). Why are
we changing them? Ideally, we'd only have a wildcard on one end.
> type: object
> additionalProperties: false
> description: |
> @@ -256,7 +256,7 @@ patternProperties:
> items:
> enum: [wf_2g, wf_5g, wf_dbdc]
> maxItems: 3
> - '.*conf.*':
> + '^.*conf.*$':
> type: object
> additionalProperties: false
> description:
> --
> 2.37.2
>
On Fri, 03 Mar 2023 03:28:47 +0300, [email protected] wrote:
> From: Arınç ÜNAL <[email protected]>
>
> The RT3352 and RT5350 SoCs each contain different pin muxing information,
> therefore, should be split. This can be done now that there are compatible
> strings to distinguish them from other SoCs.
>
> Split the schema out to ralink,rt3352-pinctrl.yaml and
> ralink,rt5350-pinctrl.yaml.
>
> Remove ralink,rt3352-pinctrl and ralink,rt5350-pinctrl from rt305x.
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> .../pinctrl/ralink,rt305x-pinctrl.yaml | 83 +-----
> .../pinctrl/ralink,rt3352-pinctrl.yaml | 243 ++++++++++++++++++
> .../pinctrl/ralink,rt5350-pinctrl.yaml | 206 +++++++++++++++
> 3 files changed, 455 insertions(+), 77 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml
> create mode 100644 Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml
>
Reviewed-by: Rob Herring <[email protected]>
On 9.03.2023 00:05, Rob Herring wrote:
> On Fri, Mar 03, 2023 at 03:28:38AM +0300, [email protected] wrote:
>> From: Arınç ÜNAL <[email protected]>
>>
>> This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
>> introduced these SoCs which utilise this platform. Rename the schemas to
>> mediatek to address the incorrect naming.
>
> I said we don't do renames due to acquistions, you said that wasn't the
> reason, but then that's your reasoning here.
It's not a marketing/acquistion rename as the name of these SoCs were
wrong from the get go. The information on the first sentence is to give
the idea of why these SoCs were wrongfully named as the base platform
that these new MediaTek SoCs share code with was called Ralink.
>
> To give you another example, *new* i.MX things are still called
> 'fsl,imx...' and it has been how many years since merging with NXP?
Ok this is a point I see now. Though, I fail to see how this is called
renaming when there's only new SoCs (from NXP in this case) to be added.
Arınç
On 9.03.2023 00:00, Rob Herring wrote:
> On Fri, Mar 03, 2023 at 03:28:37AM +0300, [email protected] wrote:
>> From: Arınç ÜNAL <[email protected]>
>>
>> Add the new mediatek compatible strings. Change the compatible string on
>> the examples with the mediatek compatible strings.
>>
>> Add the new compatible strings for mt7620, mt76x8, and rt305x to be able to
>> properly document the pin muxing information of each SoC, or SoCs that use
>> the same pinmux data.
>>
>> Signed-off-by: Arınç ÜNAL <[email protected]>
>> ---
>> .../devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml | 7 +++++--
>> .../devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml | 6 ++++--
>> .../devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml | 5 ++++-
>> 3 files changed, 13 insertions(+), 5 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
>> index cde6de77e228..a94d2e7a5f37 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
>> +++ b/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
>> @@ -17,7 +17,10 @@ description:
>>
>> properties:
>> compatible:
>> - const: ralink,mt7620-pinctrl
>> + enum:
>> + - mediatek,mt7620-pinctrl
>> + - mediatek,mt76x8-pinctrl
>> + - ralink,mt7620-pinctrl
>
> To repeat the options from last time:
>
>> Carrying both strings is a NAK. Either you (and everyone using
>> these platforms) care about the ABI and are stuck with the "wrong"
>> string. In the end, they are just unique identifiers. Or you don't care
>> and break the ABI and rename everything. If you do that, do just that
>> in your patches and make it crystal clear in the commit msg that is
>> your intention and why that is okay.
>
> Marketing/acquistion renames was just an example and common reason. That
> doesn't make other reasons okay. I don't see any reason given here.
I did give the reason on patch 2 and 9 but I should've put it on this
patch as well.
> This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
> introduced these SoCs which utilise this platform. Add new compatible
> strings to address the incorrect naming.
I'm continuing the conversation regarding this under patch 9.
>
> If you want to break the ABI (do you??, because the commit message
> still doesn't say), then you don't need "ralink,mt7620-pinctrl".
I don't want to break the ABI. But I deprecate ralink,mt7620-pinctrl on
later patches. The driver still has it though, so old DTs will keep
working. That keeps the ABI intact regardless of deprecating strings on
the dt-binding schema, right?
Arınç
On Fri, Mar 03, 2023 at 03:28:48AM +0300, [email protected] wrote:
> From: Arınç ÜNAL <[email protected]>
>
> The MT7628 and MT7688 SoCs contain different pin muxing information,
> therefore, should be split. This can be done now that there are compatible
> strings to distinguish them from other SoCs.
>
> Split the schema out to mediatek,mt76x8-pinctrl.yaml.
>
> Remove mediatek,mt76x8-pinctrl from mt7620.
>
> Deprecate ralink,mt7620-pinctrl. The reason is, the DTs for mt76x8 which
> use this string will incorrectly match the pin muxing information for
> mt7620. There's a new string, mediatek,mt7620-pinctrl, which makes the
> deprecation possible.
This should be 2 patches.
You aren't deprecating either. That means still documented and labeled
with 'deprecated: true'. But again, just 'fixing' the vendor is not a
reason to deprecate and for us to have to carry the old compatible. We
deprecate when there is some advantage to it such as using common
properties instead of vendor specific ones.
Rob
On 9.03.2023 00:15, Rob Herring wrote:
> On Fri, Mar 03, 2023 at 03:28:46AM +0300, [email protected] wrote:
>> From: Arınç ÜNAL <[email protected]>
>>
>> Set second level patternProperties to '^.*mux.*$' and '^.*conf.*$' on
>> mediatek,mt7986-pinctrl.yaml.
>>
>> Signed-off-by: Arınç ÜNAL <[email protected]>
>> ---
>> .../devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
>> index 46b7228920ed..e937881210c5 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
>> +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
>> @@ -72,7 +72,7 @@ patternProperties:
>> additionalProperties: false
>>
>> patternProperties:
>> - '.*mux.*':
>> + '^.*mux.*$':
>
> These are equivalent (so is just 'mux', but that's ambiguous). Why are
> we changing them? Ideally, we'd only have a wildcard on one end.
I've seen your review on Daniel's patch for adding mt7981 pinctrl schema
so I wanted other schemas to be on par with your review.
https://lore.kernel.org/linux-mediatek/[email protected]/
Arınç
On 9.03.2023 00:11, Rob Herring wrote:
> On Fri, Mar 03, 2023 at 03:28:44AM +0300, [email protected] wrote:
>> From: Arınç ÜNAL <[email protected]>
>>
>> Change the style of description properties to plain style where there's no
>> need to preserve the line endings, and vice versa.
>>
>> Fit the schemas to 80 columns for each line.
>
> I would just leave the enum cases alone and make this patch just about
> reformatting 'description' entries. Either way:
>
> Reviewed-by: Rob Herring <[email protected]>
I guess I've got a bit of OCD so it would really annoy me knowing that
I've kept some lines exceeding 80 columns. It seems OK with you either
way so I'm going to keep it. ;)
Arınç
On 9.03.2023 00:19, Arınç ÜNAL wrote:
> On 9.03.2023 00:05, Rob Herring wrote:
>> On Fri, Mar 03, 2023 at 03:28:38AM +0300, [email protected] wrote:
>>> From: Arınç ÜNAL <[email protected]>
>>>
>>> This platform from Ralink was acquired by MediaTek in 2011. Then,
>>> MediaTek
>>> introduced these SoCs which utilise this platform. Rename the schemas to
>>> mediatek to address the incorrect naming.
>>
>> I said we don't do renames due to acquistions, you said that wasn't the
>> reason, but then that's your reasoning here.
>
> It's not a marketing/acquistion rename as the name of these SoCs were
> wrong from the get go. The information on the first sentence is to give
> the idea of why these SoCs were wrongfully named as the base platform
> that these new MediaTek SoCs share code with was called Ralink.
>
>>
>> To give you another example, *new* i.MX things are still called
>> 'fsl,imx...' and it has been how many years since merging with NXP?
>
> Ok this is a point I see now. Though, I fail to see how this is called
> renaming when there's only new SoCs (from NXP in this case) to be added.
If I understand correctly, i.MX is a family from Freescale so the name
was kept the same on new SoC releases from NXP. I believe it's different
in this case here. There's no family name. The closest thing on the name
of the SoC model is, it's RT for Ralink, MT for MediaTek.
On top of that, mediatek strings already exist for MT SoCs already, at
least for MT7621.
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/tree/Documentation/devicetree/bindings/mips/ralink.yaml?id=dd3cb467ebb5659d6552999d6f16a616653f9933#n83
Arınç
On 08/03/2023 22:19, Arınç ÜNAL wrote:
>
>>
>> If you want to break the ABI (do you??, because the commit message
>> still doesn't say), then you don't need "ralink,mt7620-pinctrl".
>
> I don't want to break the ABI. But I deprecate ralink,mt7620-pinctrl on
> later patches.
Deprecation should happen here. Otherwise you have now two valid
compatibles which contradicts previous Rob's comments.
> The driver still has it though, so old DTs will keep
> working. That keeps the ABI intact regardless of deprecating strings on
> the dt-binding schema, right?
Yes, but deprecation is missing.
Best regards,
Krzysztof
On 09/03/2023 08:53, Arınç ÜNAL wrote:
> On 9.03.2023 00:19, Arınç ÜNAL wrote:
>> On 9.03.2023 00:05, Rob Herring wrote:
>>> On Fri, Mar 03, 2023 at 03:28:38AM +0300, [email protected] wrote:
>>>> From: Arınç ÜNAL <[email protected]>
>>>>
>>>> This platform from Ralink was acquired by MediaTek in 2011. Then,
>>>> MediaTek
>>>> introduced these SoCs which utilise this platform. Rename the schemas to
>>>> mediatek to address the incorrect naming.
>>>
>>> I said we don't do renames due to acquistions, you said that wasn't the
>>> reason, but then that's your reasoning here.
>>
>> It's not a marketing/acquistion rename as the name of these SoCs were
>> wrong from the get go. The information on the first sentence is to give
>> the idea of why these SoCs were wrongfully named as the base platform
>> that these new MediaTek SoCs share code with was called Ralink.
>>
>>>
>>> To give you another example, *new* i.MX things are still called
>>> 'fsl,imx...' and it has been how many years since merging with NXP?
>>
>> Ok this is a point I see now. Though, I fail to see how this is called
>> renaming when there's only new SoCs (from NXP in this case) to be added.
>
> If I understand correctly, i.MX is a family from Freescale so the name
It's the same "family" as your platform, because as you said:
"introduced these SoCs which utilise this platform"
> was kept the same on new SoC releases from NXP. I believe it's different
> in this case here. There's no family name. The closest thing on the name
> of the SoC model is, it's RT for Ralink, MT for MediaTek.
It's not about the name. NXP took Freescale platform and since many
years makes entirely new products, currently far, far away from original
platform.
That's the same case you have here - Mediatek took existing platform and
started making new products with it.
>
> On top of that, mediatek strings already exist for MT SoCs already, at
> least for MT7621.
>
> https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/tree/Documentation/devicetree/bindings/mips/ralink.yaml?id=dd3cb467ebb5659d6552999d6f16a616653f9933#n83
NXP also has compatibles with nxp, thus still not that good reason.
Best regards,
Krzysztof
On 03/03/2023 01:28, [email protected] wrote:
> From: Arınç ÜNAL <[email protected]>
>
> The MT7628 and MT7688 SoCs contain different pin muxing information,
> therefore, should be split. This can be done now that there are compatible
> strings to distinguish them from other SoCs.
>
> Split the schema out to mediatek,mt76x8-pinctrl.yaml.
>
> Remove mediatek,mt76x8-pinctrl from mt7620.
>
> Deprecate ralink,mt7620-pinctrl. The reason is, the DTs for mt76x8 which
> use this string will incorrectly match the pin muxing information for
> mt7620. There's a new string, mediatek,mt7620-pinctrl, which makes the
> deprecation possible.
>
> Signed-off-by: Arınç ÜNAL <[email protected]>
> ---
> .../pinctrl/mediatek,mt7620-pinctrl.yaml | 380 +--------------
> .../pinctrl/mediatek,mt76x8-pinctrl.yaml | 450 ++++++++++++++++++
> 2 files changed, 459 insertions(+), 371 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
> index 11530b29d52b..38b71c74b9a0 100644
> --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
> @@ -11,16 +11,13 @@ maintainers:
> - Sergio Paracuellos <[email protected]>
>
> description: |
> - MediaTek MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs.
> + MediaTek MT7620 pin controller for MT7620 SoC.
> The pin controller can only set the muxing of pin groups. Muxing individual
> pins is not supported. There is no pinconf support.
>
> properties:
> compatible:
> - enum:
> - - mediatek,mt7620-pinctrl
> - - mediatek,mt76x8-pinctrl
> - - ralink,mt7620-pinctrl
I see removal, not deprecation.
Best regards,
Krzysztof
On 9.03.2023 12:52, Krzysztof Kozlowski wrote:
> On 09/03/2023 08:53, Arınç ÜNAL wrote:
>> On 9.03.2023 00:19, Arınç ÜNAL wrote:
>>> On 9.03.2023 00:05, Rob Herring wrote:
>>>> On Fri, Mar 03, 2023 at 03:28:38AM +0300, [email protected] wrote:
>>>>> From: Arınç ÜNAL <[email protected]>
>>>>>
>>>>> This platform from Ralink was acquired by MediaTek in 2011. Then,
>>>>> MediaTek
>>>>> introduced these SoCs which utilise this platform. Rename the schemas to
>>>>> mediatek to address the incorrect naming.
>>>>
>>>> I said we don't do renames due to acquistions, you said that wasn't the
>>>> reason, but then that's your reasoning here.
>>>
>>> It's not a marketing/acquistion rename as the name of these SoCs were
>>> wrong from the get go. The information on the first sentence is to give
>>> the idea of why these SoCs were wrongfully named as the base platform
>>> that these new MediaTek SoCs share code with was called Ralink.
>>>
>>>>
>>>> To give you another example, *new* i.MX things are still called
>>>> 'fsl,imx...' and it has been how many years since merging with NXP?
>>>
>>> Ok this is a point I see now. Though, I fail to see how this is called
>>> renaming when there's only new SoCs (from NXP in this case) to be added.
>>
>> If I understand correctly, i.MX is a family from Freescale so the name
>
> It's the same "family" as your platform, because as you said:
> "introduced these SoCs which utilise this platform"
>
>> was kept the same on new SoC releases from NXP. I believe it's different
>> in this case here. There's no family name. The closest thing on the name
>> of the SoC model is, it's RT for Ralink, MT for MediaTek.
>
> It's not about the name. NXP took Freescale platform and since many
> years makes entirely new products, currently far, far away from original
> platform.
>
> That's the same case you have here - Mediatek took existing platform and
> started making new products with it.
>
>>
>> On top of that, mediatek strings already exist for MT SoCs already, at
>> least for MT7621.
>>
>> https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/tree/Documentation/devicetree/bindings/mips/ralink.yaml?id=dd3cb467ebb5659d6552999d6f16a616653f9933#n83
>
> NXP also has compatibles with nxp, thus still not that good reason.
Ok, makes sense. Am I free to call the SoCs MediaTek, change the schema
name from ralink,mtXXXX-pinctrl.yaml to mediatek,mtXXXX-pinctrl.yaml
whilst keeping the compatible string ralink?
I plan to do some cleanup on ralink.yaml as well. From what I
understand, I should change the mediatek,mt7621-soc compatible string to
ralink,mt7621-soc?
Arınç
On Thu, Mar 9, 2023 at 11:34 AM Arınç ÜNAL <[email protected]> wrote:
>
> On 9.03.2023 12:52, Krzysztof Kozlowski wrote:
> > On 09/03/2023 08:53, Arınç ÜNAL wrote:
> >> On 9.03.2023 00:19, Arınç ÜNAL wrote:
> >>> On 9.03.2023 00:05, Rob Herring wrote:
> >>>> On Fri, Mar 03, 2023 at 03:28:38AM +0300, [email protected] wrote:
> >>>>> From: Arınç ÜNAL <[email protected]>
> >>>>>
> >>>>> This platform from Ralink was acquired by MediaTek in 2011. Then,
> >>>>> MediaTek
> >>>>> introduced these SoCs which utilise this platform. Rename the schemas to
> >>>>> mediatek to address the incorrect naming.
> >>>>
> >>>> I said we don't do renames due to acquistions, you said that wasn't the
> >>>> reason, but then that's your reasoning here.
> >>>
> >>> It's not a marketing/acquistion rename as the name of these SoCs were
> >>> wrong from the get go. The information on the first sentence is to give
> >>> the idea of why these SoCs were wrongfully named as the base platform
> >>> that these new MediaTek SoCs share code with was called Ralink.
> >>>
> >>>>
> >>>> To give you another example, *new* i.MX things are still called
> >>>> 'fsl,imx...' and it has been how many years since merging with NXP?
> >>>
> >>> Ok this is a point I see now. Though, I fail to see how this is called
> >>> renaming when there's only new SoCs (from NXP in this case) to be added.
> >>
> >> If I understand correctly, i.MX is a family from Freescale so the name
> >
> > It's the same "family" as your platform, because as you said:
> > "introduced these SoCs which utilise this platform"
> >
> >> was kept the same on new SoC releases from NXP. I believe it's different
> >> in this case here. There's no family name. The closest thing on the name
> >> of the SoC model is, it's RT for Ralink, MT for MediaTek.
> >
> > It's not about the name. NXP took Freescale platform and since many
> > years makes entirely new products, currently far, far away from original
> > platform.
> >
> > That's the same case you have here - Mediatek took existing platform and
> > started making new products with it.
> >
> >>
> >> On top of that, mediatek strings already exist for MT SoCs already, at
> >> least for MT7621.
> >>
> >> https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/tree/Documentation/devicetree/bindings/mips/ralink.yaml?id=dd3cb467ebb5659d6552999d6f16a616653f9933#n83
> >
> > NXP also has compatibles with nxp, thus still not that good reason.
>
> Ok, makes sense. Am I free to call the SoCs MediaTek, change the schema
> name from ralink,mtXXXX-pinctrl.yaml to mediatek,mtXXXX-pinctrl.yaml
> whilst keeping the compatible string ralink?
>
> I plan to do some cleanup on ralink.yaml as well. From what I
> understand, I should change the mediatek,mt7621-soc compatible string to
> ralink,mt7621-soc?
You have to take care of these SoC strings since they are used in the
very beginning of the ralink startup platforms for any single ralink
SoC. See for example [0] and [1] (but they are in all soc init code).
I think it is better to maintain the ralink.yaml file as it is.
Best regards,
Sergio Paracuellos
[0]: https://elixir.bootlin.com/linux/v6.2.1/source/arch/mips/ralink/mt7621.c#L200
[1] https://elixir.bootlin.com/linux/v6.2.1/source/arch/mips/ralink/rt305x.c#L161
>
> Arınç
On 9.03.2023 12:54, Krzysztof Kozlowski wrote:
> On 03/03/2023 01:28, [email protected] wrote:
>> From: Arınç ÜNAL <[email protected]>
>>
>> The MT7628 and MT7688 SoCs contain different pin muxing information,
>> therefore, should be split. This can be done now that there are compatible
>> strings to distinguish them from other SoCs.
>>
>> Split the schema out to mediatek,mt76x8-pinctrl.yaml.
>>
>> Remove mediatek,mt76x8-pinctrl from mt7620.
>>
>> Deprecate ralink,mt7620-pinctrl. The reason is, the DTs for mt76x8 which
>> use this string will incorrectly match the pin muxing information for
>> mt7620. There's a new string, mediatek,mt7620-pinctrl, which makes the
>> deprecation possible.
>>
>> Signed-off-by: Arınç ÜNAL <[email protected]>
>> ---
>> .../pinctrl/mediatek,mt7620-pinctrl.yaml | 380 +--------------
>> .../pinctrl/mediatek,mt76x8-pinctrl.yaml | 450 ++++++++++++++++++
>> 2 files changed, 459 insertions(+), 371 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
>> index 11530b29d52b..38b71c74b9a0 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
>> +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
>> @@ -11,16 +11,13 @@ maintainers:
>> - Sergio Paracuellos <[email protected]>
>>
>> description: |
>> - MediaTek MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs.
>> + MediaTek MT7620 pin controller for MT7620 SoC.
>> The pin controller can only set the muxing of pin groups. Muxing individual
>> pins is not supported. There is no pinconf support.
>>
>> properties:
>> compatible:
>> - enum:
>> - - mediatek,mt7620-pinctrl
>> - - mediatek,mt76x8-pinctrl
>> - - ralink,mt7620-pinctrl
>
> I see removal, not deprecation.
I thought deprecation meant removing a string with explanation on the
patch log, as I remember from my conversation with you and Rob on this
patch series.
https://lore.kernel.org/linux-devicetree/[email protected]/
I won't have to deprecate this now that we straightened things out but
I'd like to know the proper way to deprecate compatible strings regardless.
Arınç
On 9.03.2023 14:33, Sergio Paracuellos wrote:
> On Thu, Mar 9, 2023 at 11:34 AM Arınç ÜNAL <[email protected]> wrote:
>>
>> On 9.03.2023 12:52, Krzysztof Kozlowski wrote:
>>> On 09/03/2023 08:53, Arınç ÜNAL wrote:
>>>> On 9.03.2023 00:19, Arınç ÜNAL wrote:
>>>>> On 9.03.2023 00:05, Rob Herring wrote:
>>>>>> On Fri, Mar 03, 2023 at 03:28:38AM +0300, [email protected] wrote:
>>>>>>> From: Arınç ÜNAL <[email protected]>
>>>>>>>
>>>>>>> This platform from Ralink was acquired by MediaTek in 2011. Then,
>>>>>>> MediaTek
>>>>>>> introduced these SoCs which utilise this platform. Rename the schemas to
>>>>>>> mediatek to address the incorrect naming.
>>>>>>
>>>>>> I said we don't do renames due to acquistions, you said that wasn't the
>>>>>> reason, but then that's your reasoning here.
>>>>>
>>>>> It's not a marketing/acquistion rename as the name of these SoCs were
>>>>> wrong from the get go. The information on the first sentence is to give
>>>>> the idea of why these SoCs were wrongfully named as the base platform
>>>>> that these new MediaTek SoCs share code with was called Ralink.
>>>>>
>>>>>>
>>>>>> To give you another example, *new* i.MX things are still called
>>>>>> 'fsl,imx...' and it has been how many years since merging with NXP?
>>>>>
>>>>> Ok this is a point I see now. Though, I fail to see how this is called
>>>>> renaming when there's only new SoCs (from NXP in this case) to be added.
>>>>
>>>> If I understand correctly, i.MX is a family from Freescale so the name
>>>
>>> It's the same "family" as your platform, because as you said:
>>> "introduced these SoCs which utilise this platform"
>>>
>>>> was kept the same on new SoC releases from NXP. I believe it's different
>>>> in this case here. There's no family name. The closest thing on the name
>>>> of the SoC model is, it's RT for Ralink, MT for MediaTek.
>>>
>>> It's not about the name. NXP took Freescale platform and since many
>>> years makes entirely new products, currently far, far away from original
>>> platform.
>>>
>>> That's the same case you have here - Mediatek took existing platform and
>>> started making new products with it.
>>>
>>>>
>>>> On top of that, mediatek strings already exist for MT SoCs already, at
>>>> least for MT7621.
>>>>
>>>> https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/tree/Documentation/devicetree/bindings/mips/ralink.yaml?id=dd3cb467ebb5659d6552999d6f16a616653f9933#n83
>>>
>>> NXP also has compatibles with nxp, thus still not that good reason.
>>
>> Ok, makes sense. Am I free to call the SoCs MediaTek, change the schema
>> name from ralink,mtXXXX-pinctrl.yaml to mediatek,mtXXXX-pinctrl.yaml
>> whilst keeping the compatible string ralink?
>>
>> I plan to do some cleanup on ralink.yaml as well. From what I
>> understand, I should change the mediatek,mt7621-soc compatible string to
>> ralink,mt7621-soc?
>
> You have to take care of these SoC strings since they are used in the
> very beginning of the ralink startup platforms for any single ralink
> SoC. See for example [0] and [1] (but they are in all soc init code).
> I think it is better to maintain the ralink.yaml file as it is.
I'd really rather address this inconsistency everywhere possible. The
code you pointed out looks different than what I did on the pinctrl
driver but, surely it's possible on the code to introduce ralink and
keep the mediatek string for the sake of old DTs, no?
Arınç
On Thu, Mar 9, 2023 at 10:09 PM Arınç ÜNAL <[email protected]> wrote:
>
> On 9.03.2023 14:33, Sergio Paracuellos wrote:
> > On Thu, Mar 9, 2023 at 11:34 AM Arınç ÜNAL <[email protected]> wrote:
> >>
> >> On 9.03.2023 12:52, Krzysztof Kozlowski wrote:
> >>> On 09/03/2023 08:53, Arınç ÜNAL wrote:
> >>>> On 9.03.2023 00:19, Arınç ÜNAL wrote:
> >>>>> On 9.03.2023 00:05, Rob Herring wrote:
> >>>>>> On Fri, Mar 03, 2023 at 03:28:38AM +0300, [email protected] wrote:
> >>>>>>> From: Arınç ÜNAL <[email protected]>
> >>>>>>>
> >>>>>>> This platform from Ralink was acquired by MediaTek in 2011. Then,
> >>>>>>> MediaTek
> >>>>>>> introduced these SoCs which utilise this platform. Rename the schemas to
> >>>>>>> mediatek to address the incorrect naming.
> >>>>>>
> >>>>>> I said we don't do renames due to acquistions, you said that wasn't the
> >>>>>> reason, but then that's your reasoning here.
> >>>>>
> >>>>> It's not a marketing/acquistion rename as the name of these SoCs were
> >>>>> wrong from the get go. The information on the first sentence is to give
> >>>>> the idea of why these SoCs were wrongfully named as the base platform
> >>>>> that these new MediaTek SoCs share code with was called Ralink.
> >>>>>
> >>>>>>
> >>>>>> To give you another example, *new* i.MX things are still called
> >>>>>> 'fsl,imx...' and it has been how many years since merging with NXP?
> >>>>>
> >>>>> Ok this is a point I see now. Though, I fail to see how this is called
> >>>>> renaming when there's only new SoCs (from NXP in this case) to be added.
> >>>>
> >>>> If I understand correctly, i.MX is a family from Freescale so the name
> >>>
> >>> It's the same "family" as your platform, because as you said:
> >>> "introduced these SoCs which utilise this platform"
> >>>
> >>>> was kept the same on new SoC releases from NXP. I believe it's different
> >>>> in this case here. There's no family name. The closest thing on the name
> >>>> of the SoC model is, it's RT for Ralink, MT for MediaTek.
> >>>
> >>> It's not about the name. NXP took Freescale platform and since many
> >>> years makes entirely new products, currently far, far away from original
> >>> platform.
> >>>
> >>> That's the same case you have here - Mediatek took existing platform and
> >>> started making new products with it.
> >>>
> >>>>
> >>>> On top of that, mediatek strings already exist for MT SoCs already, at
> >>>> least for MT7621.
> >>>>
> >>>> https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/tree/Documentation/devicetree/bindings/mips/ralink.yaml?id=dd3cb467ebb5659d6552999d6f16a616653f9933#n83
> >>>
> >>> NXP also has compatibles with nxp, thus still not that good reason.
> >>
> >> Ok, makes sense. Am I free to call the SoCs MediaTek, change the schema
> >> name from ralink,mtXXXX-pinctrl.yaml to mediatek,mtXXXX-pinctrl.yaml
> >> whilst keeping the compatible string ralink?
> >>
> >> I plan to do some cleanup on ralink.yaml as well. From what I
> >> understand, I should change the mediatek,mt7621-soc compatible string to
> >> ralink,mt7621-soc?
> >
> > You have to take care of these SoC strings since they are used in the
> > very beginning of the ralink startup platforms for any single ralink
> > SoC. See for example [0] and [1] (but they are in all soc init code).
> > I think it is better to maintain the ralink.yaml file as it is.
>
> I'd really rather address this inconsistency everywhere possible. The
> code you pointed out looks different than what I did on the pinctrl
> driver but, surely it's possible on the code to introduce ralink and
> keep the mediatek string for the sake of old DTs, no?
In any case, the changes you might have in mind for this should be a
different patch series.
Best regards,
Sergio Paracuellos
>
> Arınç
On 10.03.2023 10:05, Sergio Paracuellos wrote:
> On Thu, Mar 9, 2023 at 10:09 PM Arınç ÜNAL <[email protected]> wrote:
>>
>> On 9.03.2023 14:33, Sergio Paracuellos wrote:
>>> On Thu, Mar 9, 2023 at 11:34 AM Arınç ÜNAL <[email protected]> wrote:
>>>>
>>>> On 9.03.2023 12:52, Krzysztof Kozlowski wrote:
>>>>> On 09/03/2023 08:53, Arınç ÜNAL wrote:
>>>>>> On 9.03.2023 00:19, Arınç ÜNAL wrote:
>>>>>>> On 9.03.2023 00:05, Rob Herring wrote:
>>>>>>>> On Fri, Mar 03, 2023 at 03:28:38AM +0300, [email protected] wrote:
>>>>>>>>> From: Arınç ÜNAL <[email protected]>
>>>>>>>>>
>>>>>>>>> This platform from Ralink was acquired by MediaTek in 2011. Then,
>>>>>>>>> MediaTek
>>>>>>>>> introduced these SoCs which utilise this platform. Rename the schemas to
>>>>>>>>> mediatek to address the incorrect naming.
>>>>>>>>
>>>>>>>> I said we don't do renames due to acquistions, you said that wasn't the
>>>>>>>> reason, but then that's your reasoning here.
>>>>>>>
>>>>>>> It's not a marketing/acquistion rename as the name of these SoCs were
>>>>>>> wrong from the get go. The information on the first sentence is to give
>>>>>>> the idea of why these SoCs were wrongfully named as the base platform
>>>>>>> that these new MediaTek SoCs share code with was called Ralink.
>>>>>>>
>>>>>>>>
>>>>>>>> To give you another example, *new* i.MX things are still called
>>>>>>>> 'fsl,imx...' and it has been how many years since merging with NXP?
>>>>>>>
>>>>>>> Ok this is a point I see now. Though, I fail to see how this is called
>>>>>>> renaming when there's only new SoCs (from NXP in this case) to be added.
>>>>>>
>>>>>> If I understand correctly, i.MX is a family from Freescale so the name
>>>>>
>>>>> It's the same "family" as your platform, because as you said:
>>>>> "introduced these SoCs which utilise this platform"
>>>>>
>>>>>> was kept the same on new SoC releases from NXP. I believe it's different
>>>>>> in this case here. There's no family name. The closest thing on the name
>>>>>> of the SoC model is, it's RT for Ralink, MT for MediaTek.
>>>>>
>>>>> It's not about the name. NXP took Freescale platform and since many
>>>>> years makes entirely new products, currently far, far away from original
>>>>> platform.
>>>>>
>>>>> That's the same case you have here - Mediatek took existing platform and
>>>>> started making new products with it.
>>>>>
>>>>>>
>>>>>> On top of that, mediatek strings already exist for MT SoCs already, at
>>>>>> least for MT7621.
>>>>>>
>>>>>> https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/tree/Documentation/devicetree/bindings/mips/ralink.yaml?id=dd3cb467ebb5659d6552999d6f16a616653f9933#n83
>>>>>
>>>>> NXP also has compatibles with nxp, thus still not that good reason.
>>>>
>>>> Ok, makes sense. Am I free to call the SoCs MediaTek, change the schema
>>>> name from ralink,mtXXXX-pinctrl.yaml to mediatek,mtXXXX-pinctrl.yaml
>>>> whilst keeping the compatible string ralink?
>>>>
>>>> I plan to do some cleanup on ralink.yaml as well. From what I
>>>> understand, I should change the mediatek,mt7621-soc compatible string to
>>>> ralink,mt7621-soc?
>>>
>>> You have to take care of these SoC strings since they are used in the
>>> very beginning of the ralink startup platforms for any single ralink
>>> SoC. See for example [0] and [1] (but they are in all soc init code).
>>> I think it is better to maintain the ralink.yaml file as it is.
>>
>> I'd really rather address this inconsistency everywhere possible. The
>> code you pointed out looks different than what I did on the pinctrl
>> driver but, surely it's possible on the code to introduce ralink and
>> keep the mediatek string for the sake of old DTs, no?
>
> In any case, the changes you might have in mind for this should be a
> different patch series.
Agreed.
Arınç