2023-07-29 11:37:33

by Rafał Miłecki

[permalink] [raw]
Subject: [PATCH] mips: dts: ralink: reorder MT7621 clocks in Ethernet block

From: Rafał Miłecki <[email protected]>

Use order as specified in the binding (first "ethif" then "fe").

This fixes:
arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dtb: ethernet@1e100000: clock-names:0: 'ethif' was expected
From schema: Documentation/devicetree/bindings/net/mediatek,net.yaml
arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dtb: ethernet@1e100000: clock-names:1: 'fe' was expected
From schema: Documentation/devicetree/bindings/net/mediatek,net.yaml

Fixes: 7a6ee0bbab25 ("mips: dts: ralink: add MT7621 SoC")
Signed-off-by: Rafał Miłecki <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 7caed0d14f11..73035d4f4cc1 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -300,9 +300,9 @@ ethernet: ethernet@1e100000 {
compatible = "mediatek,mt7621-eth";
reg = <0x1e100000 0x10000>;

- clocks = <&sysc MT7621_CLK_FE>,
- <&sysc MT7621_CLK_ETH>;
- clock-names = "fe", "ethif";
+ clocks = <&sysc MT7621_CLK_ETH>,
+ <&sysc MT7621_CLK_FE>;
+ clock-names = "ethif", "fe";

#address-cells = <1>;
#size-cells = <0>;
--
2.35.3



2023-07-29 15:18:08

by Arınç ÜNAL

[permalink] [raw]
Subject: Re: [PATCH] mips: dts: ralink: reorder MT7621 clocks in Ethernet block

On 29.07.2023 14:04, Rafał Miłecki wrote:
> From: Rafał Miłecki <[email protected]>
>
> Use order as specified in the binding (first "ethif" then "fe").
>
> This fixes:
> arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dtb: ethernet@1e100000: clock-names:0: 'ethif' was expected
> From schema: Documentation/devicetree/bindings/net/mediatek,net.yaml
> arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dtb: ethernet@1e100000: clock-names:1: 'fe' was expected
> From schema: Documentation/devicetree/bindings/net/mediatek,net.yaml
>
> Fixes: 7a6ee0bbab25 ("mips: dts: ralink: add MT7621 SoC")
> Signed-off-by: Rafał Miłecki <[email protected]>

I'm not sure if I should agree with this patch. The relevant parts of
the schema for mediatek,mt7621-eth were added way later than the
existing bindings on mt7621.dtsi. Why don't we address this on the
schema along with a bunch of other issues the patch for
mediatek,mt7621-eth brought?

Arınç

Subject: Re: [PATCH] mips: dts: ralink: reorder MT7621 clocks in Ethernet block

Il 29/07/23 13:04, Rafał Miłecki ha scritto:
> From: Rafał Miłecki <[email protected]>
>
> Use order as specified in the binding (first "ethif" then "fe").
>
> This fixes:
> arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dtb: ethernet@1e100000: clock-names:0: 'ethif' was expected
> From schema: Documentation/devicetree/bindings/net/mediatek,net.yaml
> arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dtb: ethernet@1e100000: clock-names:1: 'fe' was expected
> From schema: Documentation/devicetree/bindings/net/mediatek,net.yaml
>
> Fixes: 7a6ee0bbab25 ("mips: dts: ralink: add MT7621 SoC")
> Signed-off-by: Rafał Miłecki <[email protected]>

Reviewed-by: AngeloGioacchino Del Regno <[email protected]>



2023-08-01 07:08:36

by Sergio Paracuellos

[permalink] [raw]
Subject: Re: [PATCH] mips: dts: ralink: reorder MT7621 clocks in Ethernet block

On Sat, Jul 29, 2023 at 1:04 PM Rafał Miłecki <[email protected]> wrote:
>
> From: Rafał Miłecki <[email protected]>
>
> Use order as specified in the binding (first "ethif" then "fe").
>
> This fixes:
> arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dtb: ethernet@1e100000: clock-names:0: 'ethif' was expected
> From schema: Documentation/devicetree/bindings/net/mediatek,net.yaml
> arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dtb: ethernet@1e100000: clock-names:1: 'fe' was expected
> From schema: Documentation/devicetree/bindings/net/mediatek,net.yaml
>
> Fixes: 7a6ee0bbab25 ("mips: dts: ralink: add MT7621 SoC")
> Signed-off-by: Rafał Miłecki <[email protected]>
> ---
> arch/mips/boot/dts/ralink/mt7621.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>

Acked-by: Sergio Paracuellos <[email protected]>

Thanks,
Sergio Paracuellos

2023-08-01 07:24:26

by Arınç ÜNAL

[permalink] [raw]
Subject: Re: [PATCH] mips: dts: ralink: reorder MT7621 clocks in Ethernet block

I haven't received anything arguing with this so my answer is still no.

Also, this patch changes the lines introduced with b2f471a26721
("staging: mt7621-dts: make use of new 'mt7621-clk'").

Arınç

On 29.07.2023 17:08, Arınç ÜNAL wrote:
> On 29.07.2023 14:04, Rafał Miłecki wrote:
>> From: Rafał Miłecki <[email protected]>
>>
>> Use order as specified in the binding (first "ethif" then "fe").
>>
>> This fixes:
>> arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dtb:
>> ethernet@1e100000: clock-names:0: 'ethif' was expected
>>          From schema:
>> Documentation/devicetree/bindings/net/mediatek,net.yaml
>> arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dtb:
>> ethernet@1e100000: clock-names:1: 'fe' was expected
>>          From schema:
>> Documentation/devicetree/bindings/net/mediatek,net.yaml
>>
>> Fixes: 7a6ee0bbab25 ("mips: dts: ralink: add MT7621 SoC")
>> Signed-off-by: Rafał Miłecki <[email protected]>
>
> I'm not sure if I should agree with this patch. The relevant parts of
> the schema for mediatek,mt7621-eth were added way later than the
> existing bindings on mt7621.dtsi. Why don't we address this on the
> schema along with a bunch of other issues the patch for
> mediatek,mt7621-eth brought?
>
> Arınç