2024-03-20 08:29:36

by Paul Barker

Subject: [PATCH 1/2] clk: renesas: r9a07g043: Mark mod_clks and resets arrays as const

The r9a07g043_mod_clks and r9a07g043_resets arrays describe the module
clocks and reset signals (respectively) in this SoC and do not change at
runtime.

Signed-off-by: Paul Barker <[email protected]>
---
drivers/clk/renesas/r9a07g043-cpg.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/renesas/r9a07g043-cpg.c b/drivers/clk/renesas/r9a07g043-cpg.c
index 33532673d25d..e36d2ec2c0f5 100644
--- a/drivers/clk/renesas/r9a07g043-cpg.c
+++ b/drivers/clk/renesas/r9a07g043-cpg.c
@@ -149,7 +149,7 @@ static const struct cpg_core_clk r9a07g043_core_clks[] __initconst = {
#endif
};

-static struct rzg2l_mod_clk r9a07g043_mod_clks[] = {
+static const struct rzg2l_mod_clk r9a07g043_mod_clks[] = {
#ifdef CONFIG_ARM64
DEF_MOD("gic", R9A07G043_GIC600_GICCLK, R9A07G043_CLK_P1,
0x514, 0),
@@ -282,7 +282,7 @@ static struct rzg2l_mod_clk r9a07g043_mod_clks[] = {
0x5ac, 0),
};

-static struct rzg2l_reset r9a07g043_resets[] = {
+static const struct rzg2l_reset r9a07g043_resets[] = {
#ifdef CONFIG_ARM64
DEF_RST(R9A07G043_GIC600_GICRESET_N, 0x814, 0),
DEF_RST(R9A07G043_GIC600_DBG_GICRESET_N, 0x814, 1),
--
2.44.0

2024-03-20 11:33:35

by Geert Uytterhoeven

Subject: Re: [PATCH 1/2] clk: renesas: r9a07g043: Mark mod_clks and resets arrays as const

On Wed, Mar 20, 2024 at 9:28 AM Paul Barker
<[email protected]> wrote:
> The r9a07g043_mod_clks and r9a07g043_resets arrays describe the module
> clocks and reset signals (respectively) in this SoC and do not change at
> runtime.
>
> Signed-off-by: Paul Barker <[email protected]>

Reviewed-by: Geert Uytterhoeven <[email protected]>
i.e. will queue in renesas-clk for v6.10.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

2024-03-20 08:30:02

by Paul Barker

Subject: [PATCH 2/2] clk: renesas: r9a07g044: Mark resets array as const

The r9a07g044_resets array describes the reset signals in this SoC and
does not change at runtime.

Signed-off-by: Paul Barker <[email protected]>
---
drivers/clk/renesas/r9a07g044-cpg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c
index 48404cafea3f..f6df3f7a31b5 100644
--- a/drivers/clk/renesas/r9a07g044-cpg.c
+++ b/drivers/clk/renesas/r9a07g044-cpg.c
@@ -368,7 +368,7 @@ static const struct {
#endif
};

-static struct rzg2l_reset r9a07g044_resets[] = {
+static const struct rzg2l_reset r9a07g044_resets[] = {
DEF_RST(R9A07G044_GIC600_GICRESET_N, 0x814, 0),
DEF_RST(R9A07G044_GIC600_DBG_GICRESET_N, 0x814, 1),
DEF_RST(R9A07G044_IA55_RESETN, 0x818, 0),
--
2.44.0