Hi All,
This patch series enables RSPI support to RZ/G2L SMARC EVK.
Note: Patches are dependent on series [1].
[1] https://patchwork.kernel.org/project/linux-renesas-soc/cover/
[email protected]/
Cheers,
Prabhakar
Lad Prabhakar (2):
arm64: dts: renesas: r9a07g044: Add RSPI{0,1,2} nodes
arm64: dts: renesas: rzg2l-smarc: Enable RSPI1 on carrier board
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 48 ++++++++++++++++++++
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 15 ++++++
2 files changed, 63 insertions(+)
--
2.17.1
Add RSPI{0,1,2} nodes to R9A07G044 (RZ/G2L) SoC DTSI.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Biju Das <[email protected]>
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 48 ++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index f3f1b76a780e..3b69d0c302e6 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -207,6 +207,54 @@
status = "disabled";
};
+ spi0: spi@1004ac00 {
+ compatible = "renesas,r9a07g044-rspi", "renesas,rspi-rz";
+ reg = <0 0x1004ac00 0 0x400>;
+ interrupts = <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ clocks = <&cpg CPG_MOD R9A07G044_RSPI0_CLKB>;
+ resets = <&cpg R9A07G044_RSPI0_RST>;
+ power-domains = <&cpg>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi1: spi@1004b000 {
+ compatible = "renesas,r9a07g044-rspi", "renesas,rspi-rz";
+ reg = <0 0x1004b000 0 0x400>;
+ interrupts = <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ clocks = <&cpg CPG_MOD R9A07G044_RSPI1_CLKB>;
+ resets = <&cpg R9A07G044_RSPI1_RST>;
+ power-domains = <&cpg>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi2: spi@1004b400 {
+ compatible = "renesas,r9a07g044-rspi", "renesas,rspi-rz";
+ reg = <0 0x1004b400 0 0x400>;
+ interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ clocks = <&cpg CPG_MOD R9A07G044_RSPI2_CLKB>;
+ resets = <&cpg R9A07G044_RSPI2_RST>;
+ power-domains = <&cpg>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
scif0: serial@1004b800 {
compatible = "renesas,scif-r9a07g044";
reg = <0 0x1004b800 0 0x400>;
--
2.17.1
RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on carrier
board, This patch adds pinmux and spi1 node to carrier board dtsi file.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Biju Das <[email protected]>
---
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index 4c32f068a1f0..f9460ec5c8fa 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -31,6 +31,7 @@
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c3 = &i2c3;
+ spi1 = &spi1;
};
chosen {
@@ -263,6 +264,13 @@
input-enable;
};
+ spi1_pins: spi1 {
+ pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */
+ <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */
+ <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */
+ <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */
+ };
+
ssi0_pins: ssi0 {
pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
<RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
@@ -318,6 +326,13 @@
status = "okay";
};
+&spi1 {
+ pinctrl-0 = <&spi1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
&ssi0 {
pinctrl-0 = <&ssi0_pins>;
pinctrl-names = "default";
--
2.17.1
On Wed, Nov 17, 2021 at 2:13 AM Lad Prabhakar
<[email protected]> wrote:
> Add RSPI{0,1,2} nodes to R9A07G044 (RZ/G2L) SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> Reviewed-by: Biju Das <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
i.e. will queue in renesas-devel for v5.17.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Prabhakar,
On Wed, Nov 17, 2021 at 2:12 AM Lad Prabhakar
<[email protected]> wrote:
> RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on carrier
> board, This patch adds pinmux and spi1 node to carrier board dtsi file.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> Reviewed-by: Biju Das <[email protected]>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> @@ -31,6 +31,7 @@
> i2c0 = &i2c0;
> i2c1 = &i2c1;
> i2c3 = &i2c3;
> + spi1 = &spi1;
Do you mind if I drop this while applying?
> };
>
> chosen {
Reviewed-by: Geert Uytterhoeven <[email protected]>
i.e. will queue in renesas-devel for v5.17.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Geert,
Thank you for the review.
On Wed, Nov 17, 2021 at 10:10 AM Geert Uytterhoeven
<[email protected]> wrote:
>
> Hi Prabhakar,
>
> On Wed, Nov 17, 2021 at 2:12 AM Lad Prabhakar
> <[email protected]> wrote:
> > RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on carrier
> > board, This patch adds pinmux and spi1 node to carrier board dtsi file.
> >
> > Signed-off-by: Lad Prabhakar <[email protected]>
> > Reviewed-by: Biju Das <[email protected]>
>
> Thanks for your patch!
>
> > --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> > @@ -31,6 +31,7 @@
> > i2c0 = &i2c0;
> > i2c1 = &i2c1;
> > i2c3 = &i2c3;
> > + spi1 = &spi1;
>
> Do you mind if I drop this while applying?
>
Fine by me. Any reason to do so? (I ask because in future I can take
care of it prior to posting)
Cheers,
Prabhakar
> > };
> >
> > chosen {
>
> Reviewed-by: Geert Uytterhoeven <[email protected]>
> i.e. will queue in renesas-devel for v5.17.
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
Hi Prabhakar,
On Wed, Nov 17, 2021 at 11:16 AM Lad, Prabhakar
<[email protected]> wrote:
> On Wed, Nov 17, 2021 at 10:10 AM Geert Uytterhoeven
> <[email protected]> wrote:
> > On Wed, Nov 17, 2021 at 2:12 AM Lad Prabhakar
> > <[email protected]> wrote:
> > > RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on carrier
> > > board, This patch adds pinmux and spi1 node to carrier board dtsi file.
> > >
> > > Signed-off-by: Lad Prabhakar <[email protected]>
> > > Reviewed-by: Biju Das <[email protected]>
> >
> > Thanks for your patch!
> >
> > > --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> > > @@ -31,6 +31,7 @@
> > > i2c0 = &i2c0;
> > > i2c1 = &i2c1;
> > > i2c3 = &i2c3;
> > > + spi1 = &spi1;
> >
> > Do you mind if I drop this while applying?
> >
> Fine by me. Any reason to do so? (I ask because in future I can take
> care of it prior to posting)
Aliases are used to match physical connectors with a device, so they
make sense for serial and network ports.
We don't have them for SPI on any Renesas arm64 boards.
We do have them for I2C, but I2C differs from SPI, as on I2C you can
instantiate new devices from sysfs.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Geert,
On Wed, Nov 17, 2021 at 10:25 AM Geert Uytterhoeven
<[email protected]> wrote:
>
> Hi Prabhakar,
>
> On Wed, Nov 17, 2021 at 11:16 AM Lad, Prabhakar
> <[email protected]> wrote:
> > On Wed, Nov 17, 2021 at 10:10 AM Geert Uytterhoeven
> > <[email protected]> wrote:
> > > On Wed, Nov 17, 2021 at 2:12 AM Lad Prabhakar
> > > <[email protected]> wrote:
> > > > RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on carrier
> > > > board, This patch adds pinmux and spi1 node to carrier board dtsi file.
> > > >
> > > > Signed-off-by: Lad Prabhakar <[email protected]>
> > > > Reviewed-by: Biju Das <[email protected]>
> > >
> > > Thanks for your patch!
> > >
> > > > --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> > > > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> > > > @@ -31,6 +31,7 @@
> > > > i2c0 = &i2c0;
> > > > i2c1 = &i2c1;
> > > > i2c3 = &i2c3;
> > > > + spi1 = &spi1;
> > >
> > > Do you mind if I drop this while applying?
> > >
> > Fine by me. Any reason to do so? (I ask because in future I can take
> > care of it prior to posting)
>
> Aliases are used to match physical connectors with a device, so they
> make sense for serial and network ports.
> We don't have them for SPI on any Renesas arm64 boards.
> We do have them for I2C, but I2C differs from SPI, as on I2C you can
> instantiate new devices from sysfs.
>
Agreed makes sense now. Thank you for the clarification.
Cheers,
Prabhakar
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds