Hi All,
This patch series adds IPMMU support to R8A7742 (RZ/G1H)
SoC dtsi.
Cheers,
Prabhakar
Lad Prabhakar (2):
dt-bindings: iommu: renesas,ipmmu-vmsa: Add r8a7742 support
ARM: dts: r8a7742: Add IPMMU DT nodes
.../bindings/iommu/renesas,ipmmu-vmsa.yaml | 1 +
arch/arm/boot/dts/r8a7742.dtsi | 48 +++++++++++++++++++
2 files changed, 49 insertions(+)
--
2.17.1
Add the five IPMMU instances found in the r8a7742 to DT with a disabled
status.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Chris Paterson <[email protected]>
---
arch/arm/boot/dts/r8a7742.dtsi | 48 ++++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 0fc52b27ae64..c62e26876f95 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -412,6 +412,54 @@
#thermal-sensor-cells = <0>;
};
+ ipmmu_sy0: iommu@e6280000 {
+ compatible = "renesas,ipmmu-r8a7742",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6280000 0 0x1000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_sy1: iommu@e6290000 {
+ compatible = "renesas,ipmmu-r8a7742",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6290000 0 0x1000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_ds: iommu@e6740000 {
+ compatible = "renesas,ipmmu-r8a7742",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xe6740000 0 0x1000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mp: iommu@ec680000 {
+ compatible = "renesas,ipmmu-r8a7742",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xec680000 0 0x1000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mx: iommu@fe951000 {
+ compatible = "renesas,ipmmu-r8a7742",
+ "renesas,ipmmu-vmsa";
+ reg = <0 0xfe951000 0 0x1000>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
--
2.17.1
On Tue, Aug 25, 2020 at 4:19 PM Lad Prabhakar
<[email protected]> wrote:
> Add the five IPMMU instances found in the r8a7742 to DT with a disabled
> status.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> Reviewed-by: Chris Paterson <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
i.e. will queue in renesas-devel for v5.10.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
On Tue, Aug 25, 2020 at 03:18:03PM +0100, Lad Prabhakar wrote:
> Hi All,
>
> This patch series adds IPMMU support to R8A7742 (RZ/G1H)
> SoC dtsi.
>
> Cheers,
> Prabhakar
>
> Lad Prabhakar (2):
> dt-bindings: iommu: renesas,ipmmu-vmsa: Add r8a7742 support
> ARM: dts: r8a7742: Add IPMMU DT nodes
Applied, thanks.