On Thu, Feb 22, 2024 at 9:40 AM Yu Chien Peter Lin
<[email protected]> wrote:
> The Andes hart-level interrupt controller (Andes INTC) allows AX45MP
> cores to handle custom local interrupts, such as the performance
> counter overflow interrupt.
>
> Signed-off-by: Yu Chien Peter Lin <[email protected]>
> Reviewed-by: Geert Uytterhoeven <[email protected]>
> Reviewed-by: Lad Prabhakar <[email protected]>
> Tested-by: Lad Prabhakar <[email protected]>
> ---
> Changes v1 -> v2:
> - New patch
> Changes v2 -> v3:
> - Fixed possible compatibles for Andes INTC
> Changes v3 -> v4:
> - No change
> Changes v4 -> v5:
> - Include Geert's Reviewed-by
> - Include Prabhakar's Reviewed/Tested-by
> Changes v5 -> v6:
> - No change
> Changes v6 -> v7:
> - No change
> Changes v7 -> v8:
> - No change
> Changes v8 -> v9:
> - No change
Acked-by: Geert Uytterhoeven <[email protected]>
so Palmer can pick it up with the rest of the series
(the Renesas tree imerge window for v6.9 has closed)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds