Add vin[1,2] data8 and vin1_clk_b pins used by iwg21d-q7-dbcm-ca board
which is based on R8A7742 SoC.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Biju Das <[email protected]>
---
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 38 +++++++++++++++++++++++++++-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index 60f973c5dffe..66697ea15a57 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -3866,6 +3866,18 @@ static const unsigned int vin1_data18_mux[] = {
VI1_R4_MARK, VI1_R5_MARK,
VI1_R6_MARK, VI1_R7_MARK,
};
+static const unsigned int vin1_data8_b_pins[] = {
+ RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1),
+ RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
+ RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
+ RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
+};
+static const unsigned int vin1_data8_b_mux[] = {
+ VI1_DATA0_VI1_B0_B_MARK, VI1_DATA1_VI1_B1_B_MARK,
+ VI1_DATA2_VI1_B2_B_MARK, VI1_DATA3_VI1_B3_B_MARK,
+ VI1_DATA4_VI1_B4_B_MARK, VI1_DATA5_VI1_B5_B_MARK,
+ VI1_DATA6_VI1_B6_B_MARK, VI1_DATA7_VI1_B7_B_MARK,
+};
static const unsigned int vin1_sync_pins[] = {
RCAR_GP_PIN(1, 24), /* HSYNC */
RCAR_GP_PIN(1, 25), /* VSYNC */
@@ -3886,6 +3898,12 @@ static const unsigned int vin1_clkenb_pins[] = {
static const unsigned int vin1_clkenb_mux[] = {
VI1_CLKENB_MARK,
};
+static const unsigned int vin1_clk_b_pins[] = {
+ RCAR_GP_PIN(3, 15),
+};
+static const unsigned int vin1_clk_b_mux[] = {
+ VI1_CLK_B_MARK,
+};
static const unsigned int vin1_clk_pins[] = {
RCAR_GP_PIN(2, 9),
};
@@ -3959,6 +3977,18 @@ static const unsigned int vin2_data18_mux[] = {
VI2_R4_MARK, VI2_R5_MARK,
VI2_R6_MARK, VI2_R7_MARK,
};
+static const unsigned int vin2_data8_g_pins[] = {
+ RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28),
+ RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 10),
+ RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
+ RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+};
+static const unsigned int vin2_data8_g_mux[] = {
+ VI2_G0_MARK, VI2_G1_MARK,
+ VI2_G2_MARK, VI2_G3_MARK,
+ VI2_G4_MARK, VI2_G5_MARK,
+ VI2_G6_MARK, VI2_G7_MARK,
+};
static const unsigned int vin2_sync_pins[] = {
RCAR_GP_PIN(1, 16), /* HSYNC */
RCAR_GP_PIN(1, 21), /* VSYNC */
@@ -4026,7 +4056,7 @@ static const unsigned int vin3_clk_mux[] = {
};
static const struct {
- struct sh_pfc_pin_group common[298];
+ struct sh_pfc_pin_group common[301];
struct sh_pfc_pin_group automotive[1];
} pinmux_groups = {
.common = {
@@ -4310,15 +4340,18 @@ static const struct {
VIN_DATA_PIN_GROUP(vin1_data, 10),
VIN_DATA_PIN_GROUP(vin1_data, 8),
VIN_DATA_PIN_GROUP(vin1_data, 4),
+ SH_PFC_PIN_GROUP(vin1_data8_b),
SH_PFC_PIN_GROUP(vin1_sync),
SH_PFC_PIN_GROUP(vin1_field),
SH_PFC_PIN_GROUP(vin1_clkenb),
+ SH_PFC_PIN_GROUP(vin1_clk_b),
SH_PFC_PIN_GROUP(vin1_clk),
VIN_DATA_PIN_GROUP(vin2_data, 24),
SH_PFC_PIN_GROUP(vin2_data18),
VIN_DATA_PIN_GROUP(vin2_data, 16),
VIN_DATA_PIN_GROUP(vin2_data, 8),
VIN_DATA_PIN_GROUP(vin2_data, 4),
+ SH_PFC_PIN_GROUP(vin2_data8_g),
SH_PFC_PIN_GROUP(vin2_sync),
SH_PFC_PIN_GROUP(vin2_field),
SH_PFC_PIN_GROUP(vin2_clkenb),
@@ -4784,9 +4817,11 @@ static const char * const vin1_groups[] = {
"vin1_data10",
"vin1_data8",
"vin1_data4",
+ "vin1_data8_b",
"vin1_sync",
"vin1_field",
"vin1_clkenb",
+ "vin1_clk_b",
"vin1_clk",
};
@@ -4796,6 +4831,7 @@ static const char * const vin2_groups[] = {
"vin2_data16",
"vin2_data8",
"vin2_data4",
+ "vin2_data8_g",
"vin2_sync",
"vin2_field",
"vin2_clkenb",
--
2.17.1
Hi Prabhakar,
On Mon, Sep 7, 2020 at 4:55 PM Lad Prabhakar
<[email protected]> wrote:
> Add vin[1,2] data8 and vin1_clk_b pins used by iwg21d-q7-dbcm-ca board
> which is based on R8A7742 SoC.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> Reviewed-by: Biju Das <[email protected]>
Thanks for your patch!
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
> @@ -3866,6 +3866,18 @@ static const unsigned int vin1_data18_mux[] = {
> VI1_R4_MARK, VI1_R5_MARK,
> VI1_R6_MARK, VI1_R7_MARK,
> };
> +static const unsigned int vin1_data8_b_pins[] = {
> + RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1),
> + RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
> + RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
> + RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
> +};
> +static const unsigned int vin1_data8_b_mux[] = {
> + VI1_DATA0_VI1_B0_B_MARK, VI1_DATA1_VI1_B1_B_MARK,
> + VI1_DATA2_VI1_B2_B_MARK, VI1_DATA3_VI1_B3_B_MARK,
> + VI1_DATA4_VI1_B4_B_MARK, VI1_DATA5_VI1_B5_B_MARK,
> + VI1_DATA6_VI1_B6_B_MARK, VI1_DATA7_VI1_B7_B_MARK,
> +};
I don't think "vin1_data8_b" is a good name for this subset, as it would
conflict with the name for the first 8 pins of the full 24-bit VIN1 "B"
pin set, to be declared with
static const union vin_data vin1_data_b_pins[] = { ... };
and VIN_DATA_PIN_GROUP(vin1_data, 8, _b) macro.
This would be easier to see if you would add the complete VIN1 "B" pin
set (which I prefer), and not just the parts you need for your camera
board.
> static const unsigned int vin1_sync_pins[] = {
> RCAR_GP_PIN(1, 24), /* HSYNC */
> RCAR_GP_PIN(1, 25), /* VSYNC */
> @@ -3886,6 +3898,12 @@ static const unsigned int vin1_clkenb_pins[] = {
> static const unsigned int vin1_clkenb_mux[] = {
> VI1_CLKENB_MARK,
> };
Please add vin1_sync_b and vin1_field_b while at it.
> +static const unsigned int vin1_clk_b_pins[] = {
> + RCAR_GP_PIN(3, 15),
> +};
> +static const unsigned int vin1_clk_b_mux[] = {
> + VI1_CLK_B_MARK,
> +};
Please insert "vin1_clk_b" below "vin1_clk".
> static const unsigned int vin1_clk_pins[] = {
> RCAR_GP_PIN(2, 9),
> };
> @@ -3959,6 +3977,18 @@ static const unsigned int vin2_data18_mux[] = {
> VI2_R4_MARK, VI2_R5_MARK,
> VI2_R6_MARK, VI2_R7_MARK,
> };
> +static const unsigned int vin2_data8_g_pins[] = {
> + RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28),
> + RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 10),
> + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
> + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
> +};
> +static const unsigned int vin2_data8_g_mux[] = {
> + VI2_G0_MARK, VI2_G1_MARK,
> + VI2_G2_MARK, VI2_G3_MARK,
> + VI2_G4_MARK, VI2_G5_MARK,
> + VI2_G6_MARK, VI2_G7_MARK,
> +};
I think "vin2_data8_g" is also a bad name, as the "g" suffix means the
green subchannel of the "vin2_data" pin group, while the "b" suffix in
"vin1_data8_b" means the "b" alternative pin group.
Perhaps "vin2_data8g"?
Niklas, Laurent: do you have any comments?
> static const unsigned int vin2_sync_pins[] = {
> RCAR_GP_PIN(1, 16), /* HSYNC */
> RCAR_GP_PIN(1, 21), /* VSYNC */
> @@ -4026,7 +4056,7 @@ static const unsigned int vin3_clk_mux[] = {
> };
>
> static const struct {
> - struct sh_pfc_pin_group common[298];
> + struct sh_pfc_pin_group common[301];
> struct sh_pfc_pin_group automotive[1];
> } pinmux_groups = {
> .common = {
> @@ -4310,15 +4340,18 @@ static const struct {
> VIN_DATA_PIN_GROUP(vin1_data, 10),
> VIN_DATA_PIN_GROUP(vin1_data, 8),
> VIN_DATA_PIN_GROUP(vin1_data, 4),
> + SH_PFC_PIN_GROUP(vin1_data8_b),
> SH_PFC_PIN_GROUP(vin1_sync),
> SH_PFC_PIN_GROUP(vin1_field),
> SH_PFC_PIN_GROUP(vin1_clkenb),
> + SH_PFC_PIN_GROUP(vin1_clk_b),
Please insert "vin1_clk_b" below "vin1_clk".
> SH_PFC_PIN_GROUP(vin1_clk),
> VIN_DATA_PIN_GROUP(vin2_data, 24),
> SH_PFC_PIN_GROUP(vin2_data18),
> VIN_DATA_PIN_GROUP(vin2_data, 16),
> VIN_DATA_PIN_GROUP(vin2_data, 8),
> VIN_DATA_PIN_GROUP(vin2_data, 4),
> + SH_PFC_PIN_GROUP(vin2_data8_g),
> SH_PFC_PIN_GROUP(vin2_sync),
> SH_PFC_PIN_GROUP(vin2_field),
> SH_PFC_PIN_GROUP(vin2_clkenb),
> @@ -4784,9 +4817,11 @@ static const char * const vin1_groups[] = {
> "vin1_data10",
> "vin1_data8",
> "vin1_data4",
> + "vin1_data8_b",
> "vin1_sync",
> "vin1_field",
> "vin1_clkenb",
> + "vin1_clk_b",
Please insert "vin1_clk_b" below "vin1_clk".
> "vin1_clk",
> };
>
> @@ -4796,6 +4831,7 @@ static const char * const vin2_groups[] = {
> "vin2_data16",
> "vin2_data8",
> "vin2_data4",
> + "vin2_data8_g",
> "vin2_sync",
> "vin2_field",
> "vin2_clkenb",
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds