2022-03-29 20:57:10

by Anup Patel

Subject: [PATCH 0/3] Unexpected guest trap handling for KVM RISC-V selftests

Getting unexpected guest traps while running KVM RISC-V selftests should
cause the test to fail appropriately with VCPU register dump. This series
improves handling of unexpected traps along these lines.

These patches can also be found in riscv_kvm_selftests_unexp_trap_v1 branch
at: https://github.com/avpatel/linux.git

Anup Patel (3):
KVM: selftests: riscv: Set PTE A and D bits in VS-stage page table
KVM: selftests: riscv: Fix alignment of the guest_hang() function
KVM: selftests: riscv: Improve unexpected guest trap handling

.../selftests/kvm/include/riscv/processor.h | 12 ++++---
.../selftests/kvm/lib/riscv/processor.c | 9 +++---
tools/testing/selftests/kvm/lib/riscv/ucall.c | 31 +++++++++++++------
3 files changed, 34 insertions(+), 18 deletions(-)

--
2.25.1

2022-03-29 22:06:43

by Anup Patel

Subject: [PATCH 2/3] KVM: selftests: riscv: Fix alignment of the guest_hang() function

The guest_hang() function is used as the default exception handler
for various KVM selftests applications by setting it's address in
the vstvec CSR. The vstvec CSR requires exception handler base address
to be at least 4-byte aligned so this patch fixes alignment of the
guest_hang() function.

Fixes: 3e06cdf10520 ("KVM: selftests: Add initial support for RISC-V
64-bit")
Signed-off-by: Anup Patel <[email protected]>
---
tools/testing/selftests/kvm/lib/riscv/processor.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/kvm/lib/riscv/processor.c b/tools/testing/selftests/kvm/lib/riscv/processor.c
index d377f2603d98..3961487a4870 100644
--- a/tools/testing/selftests/kvm/lib/riscv/processor.c
+++ b/tools/testing/selftests/kvm/lib/riscv/processor.c
@@ -268,7 +268,7 @@ void vcpu_dump(FILE *stream, struct kvm_vm *vm, uint32_t vcpuid, uint8_t indent)
core.regs.t3, core.regs.t4, core.regs.t5, core.regs.t6);
}

-static void guest_hang(void)
+static void __aligned(16) guest_hang(void)
{
while (1)
;
--
2.25.1

2022-04-05 02:33:11

by Mayuresh Chitale

Subject: Re: [PATCH 0/3] Unexpected guest trap handling for KVM RISC-V selftests

On Tue, Mar 29, 2022 at 1:00 PM Anup Patel <[email protected]> wrote:
>
> Getting unexpected guest traps while running KVM RISC-V selftests should
> cause the test to fail appropriately with VCPU register dump. This series
> improves handling of unexpected traps along these lines.
>
> These patches can also be found in riscv_kvm_selftests_unexp_trap_v1 branch
> at: https://github.com/avpatel/linux.git
>
> Anup Patel (3):
> KVM: selftests: riscv: Set PTE A and D bits in VS-stage page table
> KVM: selftests: riscv: Fix alignment of the guest_hang() function
> KVM: selftests: riscv: Improve unexpected guest trap handling
>
> .../selftests/kvm/include/riscv/processor.h | 12 ++++---
> .../selftests/kvm/lib/riscv/processor.c | 9 +++---
> tools/testing/selftests/kvm/lib/riscv/ucall.c | 31 +++++++++++++------
> 3 files changed, 34 insertions(+), 18 deletions(-)
>
> --
> 2.25.1
>
>
> _______________________________________________
> linux-riscv mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-riscv

I have tested the series on Qemu.

Tested-by: Mayuresh Chitale <[email protected]>

2022-04-05 20:50:45

by Anup Patel

Subject: Re: [PATCH 2/3] KVM: selftests: riscv: Fix alignment of the guest_hang() function

On Tue, Mar 29, 2022 at 12:59 PM Anup Patel <[email protected]> wrote:
>
> The guest_hang() function is used as the default exception handler
> for various KVM selftests applications by setting it's address in
> the vstvec CSR. The vstvec CSR requires exception handler base address
> to be at least 4-byte aligned so this patch fixes alignment of the
> guest_hang() function.
>
> Fixes: 3e06cdf10520 ("KVM: selftests: Add initial support for RISC-V
> 64-bit")
> Signed-off-by: Anup Patel <[email protected]>

I have queued this patch for RC fixes.

Thanks,
Anup

> ---
> tools/testing/selftests/kvm/lib/riscv/processor.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tools/testing/selftests/kvm/lib/riscv/processor.c b/tools/testing/selftests/kvm/lib/riscv/processor.c
> index d377f2603d98..3961487a4870 100644
> --- a/tools/testing/selftests/kvm/lib/riscv/processor.c
> +++ b/tools/testing/selftests/kvm/lib/riscv/processor.c
> @@ -268,7 +268,7 @@ void vcpu_dump(FILE *stream, struct kvm_vm *vm, uint32_t vcpuid, uint8_t indent)
> core.regs.t3, core.regs.t4, core.regs.t5, core.regs.t6);
> }
>
> -static void guest_hang(void)
> +static void __aligned(16) guest_hang(void)
> {
> while (1)
> ;
> --
> 2.25.1
>