From hardware perspective:
- i.MX8ULP/93 GPIO supports two interrupts, 1st for Trustzone non-secure irq,
2nd for Trustzone secure irq.
- i.MX8ULP/93 only has one register base
The current linux gpio-vf610.c could work with i.MX8ULP/i.MX93, it is
because some trick did in device tree node with offset added to base:
reg = <0x2d010080 0x1000>, <0x2d010040 0x40>;
But actually the register base should be 0x2d010000.
So i.MX8ULP/93 is not HW compatible with i.MX7ULP.
i.MX93 GPIO is directly derived from i.MX8ULP, so make i.MX93 compatible
with i.MX8ULP. i.MX95 GPIO is same as i.MX93, so also compatible with
i.MX8ULP
There maybe dtbs_check failure if only test the 1st patch. After
the patchset applied, no failure.
To make avoid break old bindings from work, update the driver
to support both old/new bindings.
---
Changes in v4:
Change to minItems for allOf: else: interrupts
Update commit log for patch 4/6
Follow Marco's comments for patch 4/6
Add a new patch 5/6 Per Marco's comments.
Changes in v3:
Update patch v2 2/6
Update commit log in patch v2 5/6
Add A-b from DT maintainer for patch v2 1/6, 3/6
- Link to v2: https://lore.kernel.org/r/[email protected]
Changes in v2:
- Update bindings with describe items, add one reg base for i.MX8ULP/93
- Update driver to support one reg base, support both new/old bindings
- Add a new patch 1 to update gpio-ranges found in dtbs_check
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Peng Fan (7):
dt-bindings: gpio: vf610: update gpio-ranges
dt-bindings: gpio: vf610: correct i.MX8ULP and i.MX93
dt-bindings: gpio: vf610: add i.MX95 compatible
gpio: vf610: add i.MX8ULP of_device_id entry
gpio: vf610: simplify code by adding of_device_id data for vf610
arm64: dts: imx8ulp: update gpio node
arm64: dts: imx93: update gpio node
.../devicetree/bindings/gpio/gpio-vf610.yaml | 40 ++++++++++++++---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 21 +++++----
arch/arm64/boot/dts/freescale/imx93.dtsi | 28 +++++++-----
drivers/gpio/gpio-vf610.c | 52 +++++++++++++++++-----
4 files changed, 104 insertions(+), 37 deletions(-)
---
base-commit: e143016b56ecb0fcda5bb6026b0a25fe55274f56
change-id: 20230914-vf610-gpio-46edacd2b513
Best regards,
--
Peng Fan <[email protected]>
From: Peng Fan <[email protected]>
Add of_device_id data for devices compatible with fsl,vf610-gpio,
then no need to check port->sdata is NULL or not. So code simplified
a bit.
Signed-off-by: Peng Fan <[email protected]>
---
drivers/gpio/gpio-vf610.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
index 49867d5db642..c48a3bdfb942 100644
--- a/drivers/gpio/gpio-vf610.c
+++ b/drivers/gpio/gpio-vf610.c
@@ -64,6 +64,10 @@ struct vf610_gpio_port {
#define IMX8ULP_GPIO_BASE_OFF 0x40
#define IMX8ULP_BASE_OFF 0x80
+static const struct fsl_gpio_soc_data vf610_data = {
+ .have_dual_base = true,
+};
+
static const struct fsl_gpio_soc_data imx_data = {
.have_paddr = true,
.have_dual_base = true,
@@ -74,7 +78,7 @@ static const struct fsl_gpio_soc_data imx8ulp_data = {
};
static const struct of_device_id vf610_gpio_dt_ids[] = {
- { .compatible = "fsl,vf610-gpio", .data = NULL, },
+ { .compatible = "fsl,vf610-gpio", .data = &vf610_data },
{ .compatible = "fsl,imx7ulp-gpio", .data = &imx_data, },
{ .compatible = "fsl,imx8ulp-gpio", .data = &imx8ulp_data, },
{ /* sentinel */ }
@@ -96,7 +100,7 @@ static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio)
unsigned long mask = BIT(gpio);
unsigned long offset = GPIO_PDIR;
- if (port->sdata && port->sdata->have_paddr) {
+ if (port->sdata->have_paddr) {
mask &= vf610_gpio_readl(port->gpio_base + GPIO_PDDR);
if (mask)
offset = GPIO_PDOR;
@@ -120,7 +124,7 @@ static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
unsigned long mask = BIT(gpio);
u32 val;
- if (port->sdata && port->sdata->have_paddr) {
+ if (port->sdata->have_paddr) {
val = vf610_gpio_readl(port->gpio_base + GPIO_PDDR);
val &= ~mask;
vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR);
@@ -136,7 +140,7 @@ static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
unsigned long mask = BIT(gpio);
u32 val;
- if (port->sdata && port->sdata->have_paddr) {
+ if (port->sdata->have_paddr) {
val = vf610_gpio_readl(port->gpio_base + GPIO_PDDR);
val |= mask;
vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR);
@@ -287,7 +291,7 @@ static int vf610_gpio_probe(struct platform_device *pdev)
(device_is_compatible(dev, "fsl,imx8ulp-gpio"))))
dual_base = true;
- if ((port->sdata && port->sdata->have_dual_base) || dual_base) {
+ if (port->sdata->have_dual_base || dual_base) {
port->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(port->base))
return PTR_ERR(port->base);
--
2.37.1
From: Peng Fan <[email protected]>
The i.MX8ULP GPIO supports two interrupts and one register base,
the current fsl,imx7ulp-gpio compatible could work for i.MX8ULP in
gpio-vf610.c driver, it is based on the base address are splited
into two with offset added in device tree node. Now following
hardware design, using one register base in device tree node.
This may break users who use compatible fsl,imx7ulp-gpio to enable
i.MX8ULP GPIO.
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 21 ++++++++++++---------
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 8a6596d5a581..3921fdace792 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -484,11 +484,12 @@ fec: ethernet@29950000 {
};
gpioe: gpio@2d000080 {
- compatible = "fsl,imx8ulp-gpio", "fsl,imx7ulp-gpio";
- reg = <0x2d000080 0x1000>, <0x2d000040 0x40>;
+ compatible = "fsl,imx8ulp-gpio";
+ reg = <0x2d000000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pcc4 IMX8ULP_CLK_RGPIOE>,
@@ -498,11 +499,12 @@ gpioe: gpio@2d000080 {
};
gpiof: gpio@2d010080 {
- compatible = "fsl,imx8ulp-gpio", "fsl,imx7ulp-gpio";
- reg = <0x2d010080 0x1000>, <0x2d010040 0x40>;
+ compatible = "fsl,imx8ulp-gpio";
+ reg = <0x2d010000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pcc4 IMX8ULP_CLK_RGPIOF>,
@@ -533,11 +535,12 @@ pcc5: clock-controller@2da70000 {
};
gpiod: gpio@2e200080 {
- compatible = "fsl,imx8ulp-gpio", "fsl,imx7ulp-gpio";
- reg = <0x2e200080 0x1000>, <0x2e200040 0x40>;
+ compatible = "fsl,imx8ulp-gpio";
+ reg = <0x2e200000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pcc5 IMX8ULP_CLK_RGPIOD>,
--
2.37.1
From: Peng Fan <[email protected]>
i.MX93 supports four gpio-ranges at max. To fix below issue:
"gpio@43820080: gpio-ranges: [[30, 0, 84, 8], [30, 8, 66, 18],
[30, 26, 34, 2], [30, 28, 0, 4]] is too long"
Update the gpio-ranges property
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
Documentation/devicetree/bindings/gpio/gpio-vf610.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
index 7c2d152e8617..59427d97adf5 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
@@ -59,7 +59,8 @@ properties:
- const: port
gpio-ranges:
- maxItems: 1
+ minItems: 1
+ maxItems: 4
patternProperties:
"^.+-hog(-[0-9]+)?$":
--
2.37.1
On Tue, Sep 26, 2023 at 12:28 AM Peng Fan (OSS) <[email protected]> wrote:
>
> From: Peng Fan <[email protected]>
>
> i.MX93 supports four gpio-ranges at max. To fix below issue:
> "gpio@43820080: gpio-ranges: [[30, 0, 84, 8], [30, 8, 66, 18],
> [30, 26, 34, 2], [30, 28, 0, 4]] is too long"
>
> Update the gpio-ranges property
>
> Acked-by: Krzysztof Kozlowski <[email protected]>
> Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
On Tue, Sep 26, 2023 at 5:28 AM Peng Fan (OSS) <[email protected]> wrote:
> From: Peng Fan <[email protected]>
>
> i.MX93 supports four gpio-ranges at max. To fix below issue:
> "gpio@43820080: gpio-ranges: [[30, 0, 84, 8], [30, 8, 66, 18],
> [30, 26, 34, 2], [30, 28, 0, 4]] is too long"
>
> Update the gpio-ranges property
>
> Acked-by: Krzysztof Kozlowski <[email protected]>
> Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Yours,
Linus Walleij