This is the initial series to support Engicam i.Core MX8M Mini SOM
and it's associated carrier board dts(i) support.
Add minimal changes to access and boot SD, eMMC, and the rest of
the changes added in the coming days.
i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
i.Core MX8M Mini needs to mount on top of Engicam baseboards for
creating complete platform boards.
Possible baseboards are,
- EDIMM2.2
- C.TOUCH 2.0
- C.TOUCH 2.0 10.1" Open Frame
Engicam i.Core MX8MM has PF8X00 PMIC and which is merged in linux-next,
https://lore.kernel.org/linux-devicetree/[email protected]
Any inputs?
Jagan.
Jagan Teki (10):
arm64: defconfig: Enable REGULATOR_PF8X00
dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
arm64: dts: imx: Add Engicam EDIMM2.2 Starter Kit
arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SOM
arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
arm64: dts: imx: Add Engicam C.TOUCH 2.0
dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini C.TOUCH 2.0 10.1" OF
arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0 10.1" OF
.../devicetree/bindings/arm/fsl.yaml | 4 +
arch/arm64/boot/dts/freescale/Makefile | 3 +
.../dts/freescale/imx8mm-engicam-common.dtsi | 24 ++
.../dts/freescale/imx8mm-engicam-ctouch2.dtsi | 7 +
.../freescale/imx8mm-engicam-edimm2.2.dtsi | 7 +
...mx8mm-engicam-icore-mx8mm-ctouch2-of10.dts | 21 ++
.../imx8mm-engicam-icore-mx8mm-ctouch2.dts | 21 ++
.../imx8mm-engicam-icore-mx8mm-edimm2.2.dts | 21 ++
.../freescale/imx8mm-engicam-icore-mx8mm.dtsi | 209 ++++++++++++++++++
arch/arm64/configs/defconfig | 1 +
10 files changed, 318 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2-of10.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi
--
2.25.1
Enable PF8X00 regulator driver by default as it used in
some of i.MX8MM hardware platforms.
Cc: Catalin Marinas <[email protected]>
Cc: Will Deacon <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 867cc4a5f00f..b070ecf61fdf 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -594,6 +594,7 @@ CONFIG_REGULATOR_HI655X=y
CONFIG_REGULATOR_MAX77620=y
CONFIG_REGULATOR_MAX8973=y
CONFIG_REGULATOR_PCA9450=y
+CONFIG_REGULATOR_PF8X00=y
CONFIG_REGULATOR_PFUZE100=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_QCOM_RPMH=y
--
2.25.1
i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.
i.Core MX8M Mini needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Matteo Lisi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
arch/arm64/boot/dts/freescale/Makefile | 1 +
.../imx8mm-engicam-icore-mx8mm-edimm2.2.dts | 21 +++++++++++++++++++
2 files changed, 22 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 6f0777ee6cd6..4369d783dade 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-edimm2.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts
new file mode 100644
index 000000000000..a8afc0998fcd
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "imx8mm.dtsi"
+#include "imx8mm-engicam-edimm2.2.dtsi"
+#include "imx8mm-engicam-icore-mx8mm.dtsi"
+
+/ {
+ model = "Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit";
+ compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm",
+ "fsl,imx8mm";
+
+ chosen {
+ stdout-path = &uart2;
+ };
+};
--
2.25.1
i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
i.Core MX8M Mini needs to mount on top of this Carrier board for
creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
Add support for it.
Signed-off-by: Matteo Lisi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
arch/arm64/boot/dts/freescale/Makefile | 1 +
.../imx8mm-engicam-icore-mx8mm-ctouch2.dts | 21 +++++++++++++++++++
2 files changed, 22 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 4369d783dade..8191db4c64fa 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-ctouch2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-edimm2.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
new file mode 100644
index 000000000000..aa3c03ad3109
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "imx8mm.dtsi"
+#include "imx8mm-engicam-ctouch2.dtsi"
+#include "imx8mm-engicam-icore-mx8mm.dtsi"
+
+/ {
+ model = "Engicam i.Core MX8M Mini C.TOUCH 2.0";
+ compatible = "engicam,icore-mx8mm-ctouch2", "engicam,icore-mx8mm",
+ "fsl,imx8mm";
+
+ chosen {
+ stdout-path = &uart2;
+ };
+};
--
2.25.1
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose
carrier board with capacitive touch interface.
Genaral features:
- TFT 10.1" industrial, 1280x800 LVDS display
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector
SOM's like i.Core MX8M Mini needs to mount on top of this Carrier
board for creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
Add support for it.
Signed-off-by: Matteo Lisi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
new file mode 100644
index 000000000000..294df07289a2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+#include "imx8mm-engicam-common.dtsi"
--
2.25.1
i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.
i.Core MX8M Mini needs to mount on top of C.TOUCH 2.0 carrier with
pluged 10.1" OF for creating complete i.Core MX8M Mini C.TOUCH 2.0
10.1" Open Frame solution board.
Add bindings for it.
Signed-off-by: Jagan Teki <[email protected]>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 8c8f7728788d..9e275921112d 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -669,6 +669,7 @@ properties:
- beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit
- engicam,icore-mx8mm # i.MX8MM Engicam i.Core MX8M Mini SOM
- engicam,icore-mx8mm-ctouch2 # i.MX8MM Engicam i.Core MX8M Mini C.TOUCH 2.0
+ - engicam,icore-mx8mm-ctouch2-of10 # i.MX8MM Engicam i.Core MX8M Mini C.TOUCH 2.0 10.1" Open Frame
- engicam,icore-mx8mm-edimm2.2 # i.MX8MM Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
- fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board
- fsl,imx8mm-evk # i.MX8MM EVK Board
--
2.25.1
i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
i.Core MX8M Mini needs to mount on top of this Carrier board for
creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
Add bindings for it.
Signed-off-by: Jagan Teki <[email protected]>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 2e520733ce4e..8c8f7728788d 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -668,6 +668,7 @@ properties:
- enum:
- beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit
- engicam,icore-mx8mm # i.MX8MM Engicam i.Core MX8M Mini SOM
+ - engicam,icore-mx8mm-ctouch2 # i.MX8MM Engicam i.Core MX8M Mini C.TOUCH 2.0
- engicam,icore-mx8mm-edimm2.2 # i.MX8MM Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
- fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board
- fsl,imx8mm-evk # i.MX8MM EVK Board
--
2.25.1
i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.
i.Core MX8M Mini needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.
Add bindings for it.
Signed-off-by: Jagan Teki <[email protected]>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 67980dcef66d..2e520733ce4e 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -667,6 +667,8 @@ properties:
items:
- enum:
- beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit
+ - engicam,icore-mx8mm # i.MX8MM Engicam i.Core MX8M Mini SOM
+ - engicam,icore-mx8mm-edimm2.2 # i.MX8MM Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
- fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board
- fsl,imx8mm-evk # i.MX8MM EVK Board
- kontron,imx8mm-n801x-som # i.MX8MM Kontron SL (N801X) SOM
--
2.25.1
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
SOM's like i.Core MX8M Mini needs to mount on top of this Evaluation
board for creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Matteo Lisi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
.../dts/freescale/imx8mm-engicam-common.dtsi | 24 +++++++++++++++++++
.../freescale/imx8mm-engicam-edimm2.2.dtsi | 7 ++++++
2 files changed, 31 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi
new file mode 100644
index 000000000000..67c1a3fe26bc
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+/* SD */
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
+ cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ max-frequency = <50000000>;
+ bus-width = <4>;
+ no-1-8-v;
+ pm-ignore-notify;
+ keep-power-in-suspend;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi
new file mode 100644
index 000000000000..294df07289a2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+#include "imx8mm-engicam-common.dtsi"
--
2.25.1
i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
General features:
- NXP i.MX8MM
- Up to 2GB LDDR4
- 8/16GB eMMC
- Gigabit Ethernet
- USB 2.0 Host/OTG
- PCIe Gen2 interface
- I2S
- MIPI DSI to LVDS
- rest of i.MX8MM features
i.Core MX8M Mini needs to mount on top of Engicam baseboards for
creating complete platform boards.
Possible baseboards are,
- EDIMM2.2
- C.TOUCH 2.0
Add support for it.
Signed-off-by: Matteo Lisi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
.../freescale/imx8mm-engicam-icore-mx8mm.dtsi | 209 ++++++++++++++++++
1 file changed, 209 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi
new file mode 100644
index 000000000000..b87917c40587
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutons(India)
+ */
+
+/ {
+ compatible = "engicam,icore-mx8mm", "fsl,imx8mm";
+};
+
+&A53_0 {
+ cpu-supply = <®_buck4>;
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ pf8100@8 {
+ compatible = "nxp,pf8x00";
+ reg = <0x08>;
+
+ regulators {
+ reg_ldo1: ldo1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <1500000>;
+ };
+
+ reg_ldo2: ldo2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <1500000>;
+ };
+
+ reg_ldo3: ldo3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <1500000>;
+ };
+
+ reg_ldo4: ldo4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <1500000>;
+ };
+
+ reg_buck1: buck1 {
+ fsl,ilim-ma = <4500>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <400000>;
+ };
+
+ reg_buck2: buck2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <400000>;
+ };
+
+ reg_buck3: buck3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <400000>;
+ };
+
+ reg_buck4: buck4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <400000>;
+ fast-slew = <1>;
+ };
+
+ reg_buck5: buck5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <400000>;
+ };
+
+ reg_buck6: buck6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <400000>;
+ };
+
+ reg_buck7: buck7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ };
+
+ reg_vsnvs: vsnvs {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ };
+ };
+ };
+};
+
+&iomuxc {
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
+ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
+ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
+ >;
+ };
+
+ pinctrl_usdhc1_gpio: usdhc1grpgpio {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
+ MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
+ MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
+ MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
+ MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
+ MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
+ >;
+ };
+
+ pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
+ >;
+ };
+
+ pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
+ >;
+ };
+};
+
+/* eMMC */
+&usdhc3 {
+ assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>;
+ assigned-clock-rates = <400000000>;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
--
2.25.1
i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.
i.Core MX8M Mini needs to mount on top of C.TOUCH 2.0 carrier with
pluged 10.1" OF for creating complete i.Core MX8M Mini C.TOUCH 2.0
10.1" Open Frame solution board.
Add support for it.
Signed-off-by: Matteo Lisi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
arch/arm64/boot/dts/freescale/Makefile | 1 +
...mx8mm-engicam-icore-mx8mm-ctouch2-of10.dts | 21 +++++++++++++++++++
2 files changed, 22 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2-of10.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 8191db4c64fa..9725bbc0f268 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -31,6 +31,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-ctouch2.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-ctouch2-of10.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-edimm2.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2-of10.dts b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2-of10.dts
new file mode 100644
index 000000000000..0124ba5ec69c
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2-of10.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "imx8mm.dtsi"
+#include "imx8mm-engicam-ctouch2.dtsi"
+#include "imx8mm-engicam-icore-mx8mm.dtsi"
+
+/ {
+ model = "Engicam i.Core MX8M Mini C.TOUCH 2.0 10.1\" Open Frame";
+ compatible = "engicam,icore-mx8mm-ctouch2-of10", "engicam,icore-mx8mm",
+ "fsl,imx8mm";
+
+ chosen {
+ stdout-path = &uart2;
+ };
+};
--
2.25.1
On Wed, Dec 02, 2020 at 05:42:32PM +0530, Jagan Teki wrote:
> Enable PF8X00 regulator driver by default as it used in
> some of i.MX8MM hardware platforms.
Could you mention names (one is enough) of platforms this could be found
on? This would be more detailed reason why the option should be enabled.
Best regards,
Krzysztof
>
> Cc: Catalin Marinas <[email protected]>
> Cc: Will Deacon <[email protected]>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> arch/arm64/configs/defconfig | 1 +
> 1 file changed, 1 insertion(+)
On Wed, Dec 02, 2020 at 05:42:38PM +0530, Jagan Teki wrote:
> i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
>
> C.TOUCH 2.0 is a general purpose carrier board with capacitive
> touch interface support.
>
> i.Core MX8M Mini needs to mount on top of this Carrier board for
> creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
This should be squashed with previous one. You basically add support for
both similar boards so there is no reason to split the bindings change
into two.
Best regards,
Krzysztof
On Wed, Dec 02, 2020 at 05:42:34PM +0530, Jagan Teki wrote:
> Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
> Evaluation Board.
>
> Genaral features:
> - LCD 7" C.Touch
> - microSD slot
> - Ethernet 1Gb
> - Wifi/BT
> - 2x LVDS Full HD interfaces
> - 3x USB 2.0
> - 1x USB 3.0
> - HDMI Out
> - Mini PCIe
> - MIPI CSI
> - 2x CAN
> - Audio Out
>
> SOM's like i.Core MX8M Mini needs to mount on top of this Evaluation
> board for creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.
>
> Add support for it.
>
> Signed-off-by: Matteo Lisi <[email protected]>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> .../dts/freescale/imx8mm-engicam-common.dtsi | 24 +++++++++++++++++++
> .../freescale/imx8mm-engicam-edimm2.2.dtsi | 7 ++++++
> 2 files changed, 31 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi
> new file mode 100644
> index 000000000000..67c1a3fe26bc
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi
> @@ -0,0 +1,24 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2020 Engicam srl
> + * Copyright (c) 2020 Amarula Solutions(India)
> + */
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + status = "okay";
> +};
> +
> +/* SD */
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
> + cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + max-frequency = <50000000>;
> + bus-width = <4>;
> + no-1-8-v;
> + pm-ignore-notify;
> + keep-power-in-suspend;
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi
> new file mode 100644
> index 000000000000..294df07289a2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi
> @@ -0,0 +1,7 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2020 Engicam srl
> + * Copyright (c) 2020 Amarula Solutions(India)
> + */
> +
> +#include "imx8mm-engicam-common.dtsi"
A DTSI file only with UART and SD. You mentioned several features in the
commit msg but none of them are implemented here. There aren't even
CPUs... Maybe this is only a problem of your patch ordering but as of
now - this looks like bogus/empty DTSI which should not be in its own
commit.
Best regards,
Krzysztof
On Wed, Dec 02, 2020 at 05:42:35PM +0530, Jagan Teki wrote:
> i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
s/SOM/SoM/
>
> General features:
> - NXP i.MX8MM
i.MX 8M Mini
as named by NXP:
https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI
> - Up to 2GB LDDR4
> - 8/16GB eMMC
> - Gigabit Ethernet
> - USB 2.0 Host/OTG
> - PCIe Gen2 interface
> - I2S
> - MIPI DSI to LVDS
> - rest of i.MX8MM features
Ditto
>
> i.Core MX8M Mini needs to mount on top of Engicam baseboards for
> creating complete platform boards.
>
> Possible baseboards are,
> - EDIMM2.2
> - C.TOUCH 2.0
Don't describe baseboards. You add here only SoM.
>
> Add support for it.
>
> Signed-off-by: Matteo Lisi <[email protected]>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> .../freescale/imx8mm-engicam-icore-mx8mm.dtsi | 209 ++++++++++++++++++
> 1 file changed, 209 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi
> new file mode 100644
> index 000000000000..b87917c40587
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi
> @@ -0,0 +1,209 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2018 NXP
> + * Copyright (c) 2019 Engicam srl
> + * Copyright (c) 2020 Amarula Solutons(India)
> + */
> +
> +/ {
Missing "model".
> + compatible = "engicam,icore-mx8mm", "fsl,imx8mm";
> +};
> +
No memory node? Isn't the memory a property of SoM?
> +&A53_0 {
> + cpu-supply = <®_buck4>;
> +};
Supplies for the other cores.
> +
> +&i2c1 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1>;
> + status = "okay";
> +
> + pf8100@8 {
Node name should describe generic class of a device, so probably you
wanted here "pmic".
> + compatible = "nxp,pf8x00";
> + reg = <0x08>;
> +
> + regulators {
> + reg_ldo1: ldo1 {
> + regulator-always-on;
> + regulator-boot-on;
First min/max constraints. Then always-on and boot-on properties.
> + regulator-max-microvolt = <5000000>;
> + regulator-min-microvolt = <1500000>;
> + };
> +
> + reg_ldo2: ldo2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <5000000>;
> + regulator-min-microvolt = <1500000>;
> + };
> +
> + reg_ldo3: ldo3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <5000000>;
> + regulator-min-microvolt = <1500000>;
> + };
> +
> + reg_ldo4: ldo4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <5000000>;
> + regulator-min-microvolt = <1500000>;
> + };
> +
> + reg_buck1: buck1 {
> + fsl,ilim-ma = <4500>;
Where is this property documented?
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <1800000>;
> + regulator-min-microvolt = <400000>;
> + };
> +
> + reg_buck2: buck2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <1800000>;
> + regulator-min-microvolt = <400000>;
> + };
> +
> + reg_buck3: buck3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <1800000>;
> + regulator-min-microvolt = <400000>;
> + };
> +
> + reg_buck4: buck4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <1800000>;
> + regulator-min-microvolt = <400000>;
> + fast-slew = <1>;
Where is this property documented?
> + };
> +
> + reg_buck5: buck5 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <1800000>;
> + regulator-min-microvolt = <400000>;
> + };
> +
> + reg_buck6: buck6 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <1800000>;
> + regulator-min-microvolt = <400000>;
> + };
> +
> + reg_buck7: buck7 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <3300000>;
> + regulator-min-microvolt = <3300000>;
> + };
> +
> + reg_vsnvs: vsnvs {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <3300000>;
> + regulator-min-microvolt = <1800000>;
> + };
> + };
> + };
> +};
> +
> +&iomuxc {
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <
> + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
> + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
Not used.
> + fsl,pins = <
> + MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
> + MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
> + >;
> + };
> +
> + pinctrl_usdhc1_gpio: usdhc1grpgpio {
This should complain on bindings check. Please run dtbs_check. The "grp"
should be a suffix in node name, so "usdhc1gpiogrp".
> + fsl,pins = <
> + MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41
> + >;
> + };
> +
> + pinctrl_usdhc1: usdhc1grp {
Not used.
Best regards,
Krzysztof
On Wed, Dec 02, 2020 at 05:42:36PM +0530, Jagan Teki wrote:
> i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
>
> EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
> Evaluation Board from Engicam.
>
> i.Core MX8M Mini needs to mount on top of this Evaluation board for
> creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.
>
> Add support for it.
>
> Signed-off-by: Matteo Lisi <[email protected]>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/Makefile | 1 +
> .../imx8mm-engicam-icore-mx8mm-edimm2.2.dts | 21 +++++++++++++++++++
> 2 files changed, 22 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts
>
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index 6f0777ee6cd6..4369d783dade 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
>
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
> +dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-edimm2.2.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts
> new file mode 100644
> index 000000000000..a8afc0998fcd
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts
> @@ -0,0 +1,21 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2019 NXP
> + * Copyright (c) 2019 Engicam srl
> + * Copyright (c) 2020 Amarula Solutions(India)
> + */
> +
> +/dts-v1/;
> +#include "imx8mm.dtsi"
imx8mm should be included in the SoM, not here. It's really wrong that
you override some nodes in imx8mm-engicam-icore-mx8mm.dtsi which do not
exist there (not included).
> +#include "imx8mm-engicam-edimm2.2.dtsi"
> +#include "imx8mm-engicam-icore-mx8mm.dtsi"
> +
> +/ {
> + model = "Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit";
> + compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm",
This won't validate against your own bindings. Please fix either the DTS
or the bindings. Then run dtbs_check.
Best regards,
Krzysztof
On Wed, Dec 02, 2020 at 05:42:40PM +0530, Jagan Teki wrote:
> i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
>
> C.TOUCH 2.0 is a general purpose carrier board with capacitive
> touch interface support.
>
> 10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.
>
> i.Core MX8M Mini needs to mount on top of C.TOUCH 2.0 carrier with
> pluged 10.1" OF for creating complete i.Core MX8M Mini C.TOUCH 2.0
> 10.1" Open Frame solution board.
>
> Add bindings for it.
>
> Signed-off-by: Jagan Teki <[email protected]>
Please run the checkpatch - it should complain about order of patches.
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
> index 8c8f7728788d..9e275921112d 100644
> --- a/Documentation/devicetree/bindings/arm/fsl.yaml
> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml
> @@ -669,6 +669,7 @@ properties:
> - beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit
> - engicam,icore-mx8mm # i.MX8MM Engicam i.Core MX8M Mini SOM
> - engicam,icore-mx8mm-ctouch2 # i.MX8MM Engicam i.Core MX8M Mini C.TOUCH 2.0
> + - engicam,icore-mx8mm-ctouch2-of10 # i.MX8MM Engicam i.Core MX8M Mini C.TOUCH 2.0 10.1" Open Frame
Run dtbs_check before posting.
Best regards,
Krzysztof
On Wed, Dec 02, 2020 at 05:42:37PM +0530, Jagan Teki wrote:
> Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose
> carrier board with capacitive touch interface.
>
> Genaral features:
> - TFT 10.1" industrial, 1280x800 LVDS display
> - Ethernet 10/100
> - Wifi/BT
> - USB Type A/OTG
> - Audio Out
> - CAN
> - LVDS panel connector
>
> SOM's like i.Core MX8M Mini needs to mount on top of this Carrier
> board for creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
>
> Add support for it.
>
> Signed-off-by: Matteo Lisi <[email protected]>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
> new file mode 100644
> index 000000000000..294df07289a2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
> @@ -0,0 +1,7 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2020 Engicam srl
> + * Copyright (c) 2020 Amarula Solutions(India)
> + */
> +
> +#include "imx8mm-engicam-common.dtsi"
I don't see any point of this DTS. You have a DTSI to include a DTSI.
Please describe in details your DTS architecture...
Best regards,
Krzysztof
On Wed, Dec 02, 2020 at 05:42:39PM +0530, Jagan Teki wrote:
> i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
>
> C.TOUCH 2.0 is a general purpose carrier board with capacitive
> touch interface support.
>
> i.Core MX8M Mini needs to mount on top of this Carrier board for
> creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
>
> Add support for it.
>
> Signed-off-by: Matteo Lisi <[email protected]>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/Makefile | 1 +
> .../imx8mm-engicam-icore-mx8mm-ctouch2.dts | 21 +++++++++++++++++++
> 2 files changed, 22 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
>
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index 4369d783dade..8191db4c64fa 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
> dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
>
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
> +dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-ctouch2.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-edimm2.2.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
> new file mode 100644
> index 000000000000..aa3c03ad3109
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
> @@ -0,0 +1,21 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2019 NXP
> + * Copyright (c) 2019 Engicam srl
> + * Copyright (c) 2020 Amarula Solutions(India)
> + */
> +
> +/dts-v1/;
> +#include "imx8mm.dtsi"
You have multiple DTSI files to only include one DTSI. I was trying to
follow the logic here but I failed...
This is ctouch, so it should include SoM, which you call icore. But it
also includes ctouch2 which *only* includes common DTSI. It's then
exactly the same as starter kit which includes edimm (which includes
common) and icore.
Best regards,
Krzysztof
> +#include "imx8mm-engicam-ctouch2.dtsi"
> +#include "imx8mm-engicam-icore-mx8mm.dtsi"
> +
> +/ {
On Wed, Dec 02, 2020 at 05:42:41PM +0530, Jagan Teki wrote:
> i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
>
> C.TOUCH 2.0 is a general purpose carrier board with capacitive
> touch interface support.
>
> 10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.
>
> i.Core MX8M Mini needs to mount on top of C.TOUCH 2.0 carrier with
> pluged 10.1" OF for creating complete i.Core MX8M Mini C.TOUCH 2.0
> 10.1" Open Frame solution board.
>
> Add support for it.
>
> Signed-off-by: Matteo Lisi <[email protected]>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/Makefile | 1 +
> ...mx8mm-engicam-icore-mx8mm-ctouch2-of10.dts | 21 +++++++++++++++++++
> 2 files changed, 22 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2-of10.dts
>
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index 8191db4c64fa..9725bbc0f268 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -31,6 +31,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
>
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-ctouch2.dtb
> +dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-ctouch2-of10.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-edimm2.2.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2-of10.dts b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2-of10.dts
> new file mode 100644
> index 000000000000..0124ba5ec69c
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2-of10.dts
> @@ -0,0 +1,21 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2019 NXP
> + * Copyright (c) 2019 Engicam srl
> + * Copyright (c) 2020 Amarula Solutions(India)
> + */
> +
> +/dts-v1/;
> +#include "imx8mm.dtsi"
> +#include "imx8mm-engicam-ctouch2.dtsi"
> +#include "imx8mm-engicam-icore-mx8mm.dtsi"
> +
> +/ {
> + model = "Engicam i.Core MX8M Mini C.TOUCH 2.0 10.1\" Open Frame";
> + compatible = "engicam,icore-mx8mm-ctouch2-of10", "engicam,icore-mx8mm",
> + "fsl,imx8mm";
No. You created 3 DTS and 3 DTSI which are all the same. The output DTB
is probably the same for all three DTS files. Only one DTSI has anything
inside, all others are just copy paste.
Best regards,
Krzysztof
On Wed, Dec 2, 2020 at 2:45 PM Krzysztof Kozlowski <[email protected]> wrote:
> You have multiple DTSI files to only include one DTSI. I was trying to
> follow the logic here but I failed...
Agreed. It is hard to understand the purpose of so many dts files in
this patch series.
Regards,
Fabio Estevam
Hi Krzysztof,
On Wed, Dec 2, 2020 at 11:15 PM Krzysztof Kozlowski <[email protected]> wrote:
>
> On Wed, Dec 02, 2020 at 05:42:39PM +0530, Jagan Teki wrote:
> > i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
> >
> > C.TOUCH 2.0 is a general purpose carrier board with capacitive
> > touch interface support.
> >
> > i.Core MX8M Mini needs to mount on top of this Carrier board for
> > creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
> >
> > Add support for it.
> >
> > Signed-off-by: Matteo Lisi <[email protected]>
> > Signed-off-by: Jagan Teki <[email protected]>
> > ---
> > arch/arm64/boot/dts/freescale/Makefile | 1 +
> > .../imx8mm-engicam-icore-mx8mm-ctouch2.dts | 21 +++++++++++++++++++
> > 2 files changed, 22 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
> >
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> > index 4369d783dade..8191db4c64fa 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
> > dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
> >
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
> > +dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-ctouch2.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-edimm2.2.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
> > new file mode 100644
> > index 000000000000..aa3c03ad3109
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
> > @@ -0,0 +1,21 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (c) 2019 NXP
> > + * Copyright (c) 2019 Engicam srl
> > + * Copyright (c) 2020 Amarula Solutions(India)
> > + */
> > +
> > +/dts-v1/;
> > +#include "imx8mm.dtsi"
>
> You have multiple DTSI files to only include one DTSI. I was trying to
> follow the logic here but I failed...
>
> This is ctouch, so it should include SoM, which you call icore. But it
> also includes ctouch2 which *only* includes common DTSI. It's then
> exactly the same as starter kit which includes edimm (which includes
> common) and icore.
I hope you have checked the cover letter where I have mentioned all
the combinations.
1. SoM, Starter Kit, Carrier Board, Open Frame are three different hardware.
2. i.Core MX8M Mini is SoM
3. EDIMM 2.2 is Starter Kit
4. C.TOUCH 2.0 is Carrier board
5. 10"1 Open Frame board for LVDS
The combination of respective hardware mounting is,
1. SOM+Starter Kitt => i.Core MX8M Mini EDIMM 2.2 Starter Kit
2. SOM+C.TOUCH 2.0 => i.Core MX8M Mini C.TOUCH 2.0 Carrier board
3. SOM+C.TOUCH 2.0+10.1" OF => i.Core MX8M Mini C.TOUCH 2.0 10.1" Open
Frame board
About the bindings, (please check the
arch/arm64/boot/dts/rockchip/px30-engicam-*), It's been discussed
before with Rob for these boards bindings.
To, compare with what we have described with rockchip
SoM binding,
- engicam,icore-mx8mm is binding for i.Core MX8M Mini SoM
- engicam,px30-core is binding for PX30.Core SoM
EDIMM 2.2 is Starter Kit binding,
- engicam,icore-mx8mm-edimm2.2 is binding for EDIMM 2.2 is Starter Kit
in i.MX8MM
- engicam,px30-core-edimm2.2 is binding for EDIMM 2.2 is Starter Kit in PX30
C.TOUCH 2.0 is Carrier board binding,
- engicam,icore-mx8mm-ctouch2 is binding for C.TOUCH 2.0 is Carrier
board in i.MX8MM
- engicam,px30-core-ctouch2 is binding for C.TOUCH 2.0 is Carrier board in PX30
C.TOUCH 2.0 10"1 OF binding,
- engicam,icore-mx8mm-ctouch2-of10 is binding for C.TOUCH 2.0 10"1 in imx8MM
- engicam,px30-core-ctouch2-of10 for C.TOUCH 2.0 10"1 in PX30
So, there are 3 board combinations of which each board has a binding
of SoM and respective carrier binding like i.Core MX8M Mini EDIMM 2.2
Starter Kit has
"engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm"
"engicam,icore-mx8mm-ctouch2", "engicam,icore-mx8mm"
"engicam,icore-mx8mm-ctouch2-of10", "engicam,icore-mx8mm"
Some of the DTS files are using the engicam-common.dtsi nodes and for
ie reason those are empty and some need to have lvds display node
which is still underworking.
Hope this information helpful. Let me know for further inputs.
Jagan.
On Wed, Dec 2, 2020 at 10:52 PM Krzysztof Kozlowski <[email protected]> wrote:
>
> On Wed, Dec 02, 2020 at 05:42:32PM +0530, Jagan Teki wrote:
> > Enable PF8X00 regulator driver by default as it used in
> > some of i.MX8MM hardware platforms.
>
> Could you mention names (one is enough) of platforms this could be found
> on? This would be more detailed reason why the option should be enabled.
Sure, I will update it on the next version commit message.
Jagan.
On Thu, Dec 03, 2020 at 12:50:37AM +0530, Jagan Teki wrote:
> Hi Krzysztof,
>
> On Wed, Dec 2, 2020 at 11:15 PM Krzysztof Kozlowski <[email protected]> wrote:
> >
> > On Wed, Dec 02, 2020 at 05:42:39PM +0530, Jagan Teki wrote:
> > > i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
> > >
> > > C.TOUCH 2.0 is a general purpose carrier board with capacitive
> > > touch interface support.
> > >
> > > i.Core MX8M Mini needs to mount on top of this Carrier board for
> > > creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
> > >
> > > Add support for it.
> > >
> > > Signed-off-by: Matteo Lisi <[email protected]>
> > > Signed-off-by: Jagan Teki <[email protected]>
> > > ---
> > > arch/arm64/boot/dts/freescale/Makefile | 1 +
> > > .../imx8mm-engicam-icore-mx8mm-ctouch2.dts | 21 +++++++++++++++++++
> > > 2 files changed, 22 insertions(+)
> > > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> > > index 4369d783dade..8191db4c64fa 100644
> > > --- a/arch/arm64/boot/dts/freescale/Makefile
> > > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > > @@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
> > > dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
> > >
> > > dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
> > > +dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-ctouch2.dtb
> > > dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-edimm2.2.dtb
> > > dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
> > > dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
> > > new file mode 100644
> > > index 000000000000..aa3c03ad3109
> > > --- /dev/null
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
> > > @@ -0,0 +1,21 @@
> > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > > +/*
> > > + * Copyright (c) 2019 NXP
> > > + * Copyright (c) 2019 Engicam srl
> > > + * Copyright (c) 2020 Amarula Solutions(India)
> > > + */
> > > +
> > > +/dts-v1/;
> > > +#include "imx8mm.dtsi"
> >
> > You have multiple DTSI files to only include one DTSI. I was trying to
> > follow the logic here but I failed...
> >
> > This is ctouch, so it should include SoM, which you call icore. But it
> > also includes ctouch2 which *only* includes common DTSI. It's then
> > exactly the same as starter kit which includes edimm (which includes
> > common) and icore.
>
> I hope you have checked the cover letter where I have mentioned all
> the combinations.
>
> 1. SoM, Starter Kit, Carrier Board, Open Frame are three different hardware.
>
> 2. i.Core MX8M Mini is SoM
>
> 3. EDIMM 2.2 is Starter Kit
>
> 4. C.TOUCH 2.0 is Carrier board
>
> 5. 10"1 Open Frame board for LVDS
>
> The combination of respective hardware mounting is,
>
> 1. SOM+Starter Kitt => i.Core MX8M Mini EDIMM 2.2 Starter Kit
>
> 2. SOM+C.TOUCH 2.0 => i.Core MX8M Mini C.TOUCH 2.0 Carrier board
>
> 3. SOM+C.TOUCH 2.0+10.1" OF => i.Core MX8M Mini C.TOUCH 2.0 10.1" Open
> Frame board
It does not explain why you created 3 empty DTSI and 2 empty DTS files.
>
> About the bindings, (please check the
> arch/arm64/boot/dts/rockchip/px30-engicam-*), It's been discussed
> before with Rob for these boards bindings.
Refer to my specific comments about bindings.
>
> To, compare with what we have described with rockchip
>
> SoM binding,
> - engicam,icore-mx8mm is binding for i.Core MX8M Mini SoM
> - engicam,px30-core is binding for PX30.Core SoM
>
> EDIMM 2.2 is Starter Kit binding,
> - engicam,icore-mx8mm-edimm2.2 is binding for EDIMM 2.2 is Starter Kit
> in i.MX8MM
> - engicam,px30-core-edimm2.2 is binding for EDIMM 2.2 is Starter Kit in PX30
>
> C.TOUCH 2.0 is Carrier board binding,
> - engicam,icore-mx8mm-ctouch2 is binding for C.TOUCH 2.0 is Carrier
> board in i.MX8MM
> - engicam,px30-core-ctouch2 is binding for C.TOUCH 2.0 is Carrier board in PX30
>
> C.TOUCH 2.0 10"1 OF binding,
> - engicam,icore-mx8mm-ctouch2-of10 is binding for C.TOUCH 2.0 10"1 in imx8MM
> - engicam,px30-core-ctouch2-of10 for C.TOUCH 2.0 10"1 in PX30
>
> So, there are 3 board combinations of which each board has a binding
> of SoM and respective carrier binding like i.Core MX8M Mini EDIMM 2.2
> Starter Kit has
> "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm"
> "engicam,icore-mx8mm-ctouch2", "engicam,icore-mx8mm"
> "engicam,icore-mx8mm-ctouch2-of10", "engicam,icore-mx8mm"
>
> Some of the DTS files are using the engicam-common.dtsi nodes and for
> ie reason those are empty and some need to have lvds display node
> which is still underworking.
Therefore add them when you have any contents for these DTS files.
>
> Hope this information helpful. Let me know for further inputs.
Thanks for the information but it was not much helpful. It does not
answer at all why you have so many empty files, why you include
imx8mm.dtsi not in the SoM but somewhere else.
Best regards,
Krzysztof
Hi Krzysztof,
On Wed, Dec 2, 2020 at 11:04 PM Krzysztof Kozlowski <[email protected]> wrote:
>
> On Wed, Dec 02, 2020 at 05:42:35PM +0530, Jagan Teki wrote:
> > i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
>
> s/SOM/SoM/
>
> >
> > General features:
> > - NXP i.MX8MM
>
> i.MX 8M Mini
> as named by NXP:
> https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI
>
> > - Up to 2GB LDDR4
> > - 8/16GB eMMC
> > - Gigabit Ethernet
> > - USB 2.0 Host/OTG
> > - PCIe Gen2 interface
> > - I2S
> > - MIPI DSI to LVDS
> > - rest of i.MX8MM features
>
> Ditto
>
> >
> > i.Core MX8M Mini needs to mount on top of Engicam baseboards for
> > creating complete platform boards.
> >
> > Possible baseboards are,
> > - EDIMM2.2
> > - C.TOUCH 2.0
>
> Don't describe baseboards. You add here only SoM.
It's just information on how this SoM is being used. Let me know any
issues while explaining the combinations being used here.
>
> >
> > Add support for it.
> >
> > Signed-off-by: Matteo Lisi <[email protected]>
> > Signed-off-by: Jagan Teki <[email protected]>
> > ---
> > .../freescale/imx8mm-engicam-icore-mx8mm.dtsi | 209 ++++++++++++++++++
> > 1 file changed, 209 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi
> > new file mode 100644
> > index 000000000000..b87917c40587
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi
> > @@ -0,0 +1,209 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (c) 2018 NXP
> > + * Copyright (c) 2019 Engicam srl
> > + * Copyright (c) 2020 Amarula Solutons(India)
> > + */
> > +
> > +/ {
>
> Missing "model".
SoM dtsi won't comprise the model it has its own binding and while
combination board has a model that will include this binding. Please
check to exist binding file.
arch/arm64/boot/dts/rockchip/px30-engicam-px30-core.dtsi
>
> > + compatible = "engicam,icore-mx8mm", "fsl,imx8mm";
> > +};
> > +
>
> No memory node? Isn't the memory a property of SoM?
>
> > +&A53_0 {
> > + cpu-supply = <®_buck4>;
> > +};
>
> Supplies for the other cores.
>
> > +
> > +&i2c1 {
> > + clock-frequency = <400000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c1>;
> > + status = "okay";
> > +
> > + pf8100@8 {
>
> Node name should describe generic class of a device, so probably you
> wanted here "pmic".
True, will update.
>
> > + compatible = "nxp,pf8x00";
> > + reg = <0x08>;
> > +
> > + regulators {
> > + reg_ldo1: ldo1 {
> > + regulator-always-on;
> > + regulator-boot-on;
>
> First min/max constraints. Then always-on and boot-on properties.
>
> > + regulator-max-microvolt = <5000000>;
> > + regulator-min-microvolt = <1500000>;
> > + };
> > +
> > + reg_ldo2: ldo2 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-max-microvolt = <5000000>;
> > + regulator-min-microvolt = <1500000>;
> > + };
> > +
> > + reg_ldo3: ldo3 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-max-microvolt = <5000000>;
> > + regulator-min-microvolt = <1500000>;
> > + };
> > +
> > + reg_ldo4: ldo4 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-max-microvolt = <5000000>;
> > + regulator-min-microvolt = <1500000>;
> > + };
> > +
> > + reg_buck1: buck1 {
> > + fsl,ilim-ma = <4500>;
>
> Where is this property documented?
Sorry it would be nxp,ilim-ma I will update in next version.
>
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-min-microvolt = <400000>;
> > + };
> > +
> > + reg_buck2: buck2 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-min-microvolt = <400000>;
> > + };
> > +
> > + reg_buck3: buck3 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-min-microvolt = <400000>;
> > + };
> > +
> > + reg_buck4: buck4 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-min-microvolt = <400000>;
> > + fast-slew = <1>;
>
> Where is this property documented?
>
> > + };
> > +
> > + reg_buck5: buck5 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-min-microvolt = <400000>;
> > + };
> > +
> > + reg_buck6: buck6 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-min-microvolt = <400000>;
> > + };
> > +
> > + reg_buck7: buck7 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-min-microvolt = <3300000>;
> > + };
> > +
> > + reg_vsnvs: vsnvs {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-min-microvolt = <1800000>;
> > + };
> > + };
> > + };
> > +};
> > +
> > +&iomuxc {
> > + pinctrl_i2c1: i2c1grp {
> > + fsl,pins = <
> > + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
> > + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
> > + >;
> > + };
> > +
> > + pinctrl_uart2: uart2grp {
>
> Not used.
>
> > + fsl,pins = <
> > + MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
> > + MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
> > + >;
> > + };
> > +
> > + pinctrl_usdhc1_gpio: usdhc1grpgpio {
>
> This should complain on bindings check. Please run dtbs_check. The "grp"
> should be a suffix in node name, so "usdhc1gpiogrp".
Yes, will update it on the next version.
Jagan.
On Thu, Dec 3, 2020 at 12:55 AM Krzysztof Kozlowski <[email protected]> wrote:
>
> On Thu, Dec 03, 2020 at 12:50:37AM +0530, Jagan Teki wrote:
> > Hi Krzysztof,
> >
> > On Wed, Dec 2, 2020 at 11:15 PM Krzysztof Kozlowski <[email protected]> wrote:
> > >
> > > On Wed, Dec 02, 2020 at 05:42:39PM +0530, Jagan Teki wrote:
> > > > i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
> > > >
> > > > C.TOUCH 2.0 is a general purpose carrier board with capacitive
> > > > touch interface support.
> > > >
> > > > i.Core MX8M Mini needs to mount on top of this Carrier board for
> > > > creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
> > > >
> > > > Add support for it.
> > > >
> > > > Signed-off-by: Matteo Lisi <[email protected]>
> > > > Signed-off-by: Jagan Teki <[email protected]>
> > > > ---
> > > > arch/arm64/boot/dts/freescale/Makefile | 1 +
> > > > .../imx8mm-engicam-icore-mx8mm-ctouch2.dts | 21 +++++++++++++++++++
> > > > 2 files changed, 22 insertions(+)
> > > > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
> > > >
> > > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> > > > index 4369d783dade..8191db4c64fa 100644
> > > > --- a/arch/arm64/boot/dts/freescale/Makefile
> > > > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > > > @@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
> > > > dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
> > > >
> > > > dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
> > > > +dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-ctouch2.dtb
> > > > dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-edimm2.2.dtb
> > > > dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
> > > > dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
> > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
> > > > new file mode 100644
> > > > index 000000000000..aa3c03ad3109
> > > > --- /dev/null
> > > > +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-ctouch2.dts
> > > > @@ -0,0 +1,21 @@
> > > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > > > +/*
> > > > + * Copyright (c) 2019 NXP
> > > > + * Copyright (c) 2019 Engicam srl
> > > > + * Copyright (c) 2020 Amarula Solutions(India)
> > > > + */
> > > > +
> > > > +/dts-v1/;
> > > > +#include "imx8mm.dtsi"
> > >
> > > You have multiple DTSI files to only include one DTSI. I was trying to
> > > follow the logic here but I failed...
> > >
> > > This is ctouch, so it should include SoM, which you call icore. But it
> > > also includes ctouch2 which *only* includes common DTSI. It's then
> > > exactly the same as starter kit which includes edimm (which includes
> > > common) and icore.
> >
> > I hope you have checked the cover letter where I have mentioned all
> > the combinations.
> >
> > 1. SoM, Starter Kit, Carrier Board, Open Frame are three different hardware.
> >
> > 2. i.Core MX8M Mini is SoM
> >
> > 3. EDIMM 2.2 is Starter Kit
> >
> > 4. C.TOUCH 2.0 is Carrier board
> >
> > 5. 10"1 Open Frame board for LVDS
> >
> > The combination of respective hardware mounting is,
> >
> > 1. SOM+Starter Kitt => i.Core MX8M Mini EDIMM 2.2 Starter Kit
> >
> > 2. SOM+C.TOUCH 2.0 => i.Core MX8M Mini C.TOUCH 2.0 Carrier board
> >
> > 3. SOM+C.TOUCH 2.0+10.1" OF => i.Core MX8M Mini C.TOUCH 2.0 10.1" Open
> > Frame board
>
> It does not explain why you created 3 empty DTSI and 2 empty DTS files.
>
> >
> > About the bindings, (please check the
> > arch/arm64/boot/dts/rockchip/px30-engicam-*), It's been discussed
> > before with Rob for these boards bindings.
>
> Refer to my specific comments about bindings.
>
> >
> > To, compare with what we have described with rockchip
> >
> > SoM binding,
> > - engicam,icore-mx8mm is binding for i.Core MX8M Mini SoM
> > - engicam,px30-core is binding for PX30.Core SoM
> >
> > EDIMM 2.2 is Starter Kit binding,
> > - engicam,icore-mx8mm-edimm2.2 is binding for EDIMM 2.2 is Starter Kit
> > in i.MX8MM
> > - engicam,px30-core-edimm2.2 is binding for EDIMM 2.2 is Starter Kit in PX30
> >
> > C.TOUCH 2.0 is Carrier board binding,
> > - engicam,icore-mx8mm-ctouch2 is binding for C.TOUCH 2.0 is Carrier
> > board in i.MX8MM
> > - engicam,px30-core-ctouch2 is binding for C.TOUCH 2.0 is Carrier board in PX30
> >
> > C.TOUCH 2.0 10"1 OF binding,
> > - engicam,icore-mx8mm-ctouch2-of10 is binding for C.TOUCH 2.0 10"1 in imx8MM
> > - engicam,px30-core-ctouch2-of10 for C.TOUCH 2.0 10"1 in PX30
> >
> > So, there are 3 board combinations of which each board has a binding
> > of SoM and respective carrier binding like i.Core MX8M Mini EDIMM 2.2
> > Starter Kit has
> > "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm"
> > "engicam,icore-mx8mm-ctouch2", "engicam,icore-mx8mm"
> > "engicam,icore-mx8mm-ctouch2-of10", "engicam,icore-mx8mm"
> >
> > Some of the DTS files are using the engicam-common.dtsi nodes and for
> > ie reason those are empty and some need to have lvds display node
> > which is still underworking.
>
> Therefore add them when you have any contents for these DTS files.
>
> >
> > Hope this information helpful. Let me know for further inputs.
>
> Thanks for the information but it was not much helpful. It does not
> answer at all why you have so many empty files, why you include
> imx8mm.dtsi not in the SoM but somewhere else.
Sorry, I have missed it.
All these three carrier board dtsi files,
imx8mm-engicam-edimm2.2.dtsi
imx8mm-engicam-icore-mx8mm-ctouch2.dts
imx8mm-engicam-icore-mx8mm-ctouch2-of10.dts
are included imx8mm-engicam-common.dtsi. ie is the reason these are empty.
And I agree with your point of adding whenever it ready. I will drop
display related carrier imx8mm-engicam-icore-mx8mm-ctouch2-of10.dts
when DSI, LVDS ready, and update on next versions.
Thanks for the review.
Jagan.
On Thu, Dec 03, 2020 at 01:00:59AM +0530, Jagan Teki wrote:
> Hi Krzysztof,
>
> On Wed, Dec 2, 2020 at 11:04 PM Krzysztof Kozlowski <[email protected]> wrote:
> >
> > On Wed, Dec 02, 2020 at 05:42:35PM +0530, Jagan Teki wrote:
> > > i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
> >
> > s/SOM/SoM/
> >
> > >
> > > General features:
> > > - NXP i.MX8MM
> >
> > i.MX 8M Mini
> > as named by NXP:
> > https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI
> >
> > > - Up to 2GB LDDR4
> > > - 8/16GB eMMC
> > > - Gigabit Ethernet
> > > - USB 2.0 Host/OTG
> > > - PCIe Gen2 interface
> > > - I2S
> > > - MIPI DSI to LVDS
> > > - rest of i.MX8MM features
> >
> > Ditto
> >
> > >
> > > i.Core MX8M Mini needs to mount on top of Engicam baseboards for
> > > creating complete platform boards.
> > >
> > > Possible baseboards are,
> > > - EDIMM2.2
> > > - C.TOUCH 2.0
> >
> > Don't describe baseboards. You add here only SoM.
>
> It's just information on how this SoM is being used. Let me know any
> issues while explaining the combinations being used here.
Don't describe baseboards. No point to blow up description. Include only
information relevant to this patch.
Best regards,
Krzysztof
On Thu, Dec 3, 2020 at 1:07 AM Krzysztof Kozlowski <[email protected]> wrote:
>
> On Thu, Dec 03, 2020 at 01:00:59AM +0530, Jagan Teki wrote:
> > Hi Krzysztof,
> >
> > On Wed, Dec 2, 2020 at 11:04 PM Krzysztof Kozlowski <[email protected]> wrote:
> > >
> > > On Wed, Dec 02, 2020 at 05:42:35PM +0530, Jagan Teki wrote:
> > > > i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
> > >
> > > s/SOM/SoM/
> > >
> > > >
> > > > General features:
> > > > - NXP i.MX8MM
> > >
> > > i.MX 8M Mini
> > > as named by NXP:
> > > https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI
> > >
> > > > - Up to 2GB LDDR4
> > > > - 8/16GB eMMC
> > > > - Gigabit Ethernet
> > > > - USB 2.0 Host/OTG
> > > > - PCIe Gen2 interface
> > > > - I2S
> > > > - MIPI DSI to LVDS
> > > > - rest of i.MX8MM features
> > >
> > > Ditto
> > >
> > > >
> > > > i.Core MX8M Mini needs to mount on top of Engicam baseboards for
> > > > creating complete platform boards.
> > > >
> > > > Possible baseboards are,
> > > > - EDIMM2.2
> > > > - C.TOUCH 2.0
> > >
> > > Don't describe baseboards. You add here only SoM.
> >
> > It's just information on how this SoM is being used. Let me know any
> > issues while explaining the combinations being used here.
>
> Don't describe baseboards. No point to blow up description. Include only
> information relevant to this patch.
It was my basic practice to include combination so-that users or
others can get to know. ie what I did for other SoC's. Yes, will
update here next versions.
Jagan.