Introduce BSH SystemMaster (SMM) M2 and S2 board family.
Changes in v2:
* Added M2 board support.
* Added dt-bindings for vendor prefix and board compatible.
* Fixed pmic dt entry.
Ariel D'Alessandro (4):
dt-bindings: Add vendor prefix for BSH Hausgeraete GmbH
dt-bindings: arm: fsl: Add iMX8MN BSH SMM S2 boards
arm64: dts: imx8mn-bsh-smm-s2/pro: Add iMX8MN BSH SMM S2 boards
dt-bindings: arm: fsl: Add BSH SMM-M2 IMX6ULZ SystemMaster board
Michael Trimarchi (1):
arm: dts: imx8ulz-bsh-smm-m2: Add BSH SMM-M2 IMX6ULZ SystemMaster
.../devicetree/bindings/arm/fsl.yaml | 3 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts | 153 +++++++
arch/arm64/boot/dts/freescale/Makefile | 2 +
.../freescale/imx8mn-bsh-smm-s2-common.dtsi | 426 ++++++++++++++++++
.../boot/dts/freescale/imx8mn-bsh-smm-s2.dts | 48 ++
.../dts/freescale/imx8mn-bsh-smm-s2pro.dts | 80 ++++
8 files changed, 716 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
--
2.30.2
Document vendor prefix for BSH Hausgeraete GmbH ('BSH Home Appliances',
B/S/H/) manufacturer.
Signed-off-by: Ariel D'Alessandro <[email protected]>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 66d6432fd781..5f35d7ad9760 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -187,6 +187,8 @@ patternProperties:
description: Shanghai Broadmobi Communication Technology Co.,Ltd.
"^brcm,.*":
description: Broadcom Corporation
+ "^bsh,.*":
+ description: BSH Hausgeraete GmbH
"^buffalo,.*":
description: Buffalo, Inc.
"^bur,.*":
--
2.30.2
Add bindings for BSH SystemMaster (SMM) S2 board family, which consists
of: iMX8MN SMM S2 and iMX8MN SMM S2 PRO boards.
Signed-off-by: Ariel D'Alessandro <[email protected]>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 0b595b26061f..d49c4b786f09 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -758,6 +758,8 @@ properties:
items:
- enum:
- beacon,imx8mn-beacon-kit # i.MX8MN Beacon Development Kit
+ - bsh,imx8mn-bsh-smm-s2 # i.MX8MN BSH SystemMaster S2
+ - bsh,imx8mn-bsh-smm-s2pro # i.MX8MN BSH SystemMaster S2 PRO
- fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board
- fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board
- gw,imx8mn-gw7902 # i.MX8MM Gateworks Board
--
2.30.2
Introduce BSH SystemMaster (SMM) S2 board family, which consists of:
iMX8MN SMM S2 and iMX8MN SMM S2 PRO boards.
Add support for iMX8MN BSH SMM S2 board:
- 256 MiB DDR3 RAM
- 512 MiB NAND
- Megabit Ethernet PHY
- Wi-Fi 802.11 a/b/g/n/ac with Bluetooth 5.0
- USB-OTG (peripheral mode)
Add support for iMX8MN BSH SMM S2 PRO board:
- 512 MiB DDR3 RAM
- 8 GiB eMMC
- Megabit Ethernet PHY
- Wi-Fi 802.11 a/b/g/n/ac with Bluetooth 5.0
- USB-OTG (peripheral mode)
Signed-off-by: Ariel D'Alessandro <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
---
arch/arm64/boot/dts/freescale/Makefile | 2 +
.../freescale/imx8mn-bsh-smm-s2-common.dtsi | 426 ++++++++++++++++++
.../boot/dts/freescale/imx8mn-bsh-smm-s2.dts | 48 ++
.../dts/freescale/imx8mn-bsh-smm-s2pro.dts | 80 ++++
4 files changed, 556 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index a14a6173b765..c3e01c94ff7f 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -47,6 +47,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7901.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7902.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-beacon-kit.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2pro.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
new file mode 100644
index 000000000000..a49528e1601c
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
@@ -0,0 +1,426 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021 Collabora Ltd.
+ * Copyright 2021 BSH Hausgeraete GmbH
+ */
+
+/dts-v1/;
+
+#include "imx8mn.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart4;
+ };
+
+ fec_supply: fec_supply_en {
+ compatible = "regulator-fixed";
+ regulator-name = "tja1101_en";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&buck4_reg>;
+ enable-active-high;
+ };
+
+ usdhc2_pwrseq: usdhc2_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2_pwrseq>;
+ reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&A53_0 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&A53_1 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&A53_2 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&A53_3 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&ecspi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_espi2>;
+ status = "okay";
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec1>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy0>;
+ phy-supply = <&fec_supply>;
+ fsl,magic-packet;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <20>;
+ reset-deassert-us = <2000>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ bd71847: pmic@4b {
+ compatible = "rohm,bd71847";
+ reg = <0x4b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pmic>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ rohm,reset-snvs-powered;
+
+ #clock-cells = <0>;
+ clocks = <&osc_32k 0>;
+ clock-output-names = "clk-32k-out";
+
+ regulators {
+ buck1_reg: BUCK1 {
+ /* PMIC_BUCK1 - VDD_SOC */
+ regulator-name = "buck1";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <1250>;
+ };
+
+ buck2_reg: BUCK2 {
+ /* PMIC_BUCK2 - VDD_ARM */
+ regulator-name = "buck2";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <1250>;
+ };
+
+ buck3_reg: BUCK3 {
+ /* PMIC_BUCK5 - VDD_DRAM_VPU_GPU */
+ regulator-name = "buck3";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck4_reg: BUCK4 {
+ /* PMIC_BUCK6 - VDD_3V3 */
+ regulator-name = "buck4";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5_reg: BUCK5 {
+ /* PMIC_BUCK7 - VDD_1V8 */
+ regulator-name = "buck5";
+ regulator-min-microvolt = <1605000>;
+ regulator-max-microvolt = <1995000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6_reg: BUCK6 {
+ /* PMIC_BUCK8 - NVCC_DRAM */
+ regulator-name = "buck6";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: LDO1 {
+ /* PMIC_LDO1 - NVCC_SNVS_1V8 */
+ regulator-name = "ldo1";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <1900000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo2_reg: LDO2 {
+ /* PMIC_LDO2 - VDD_SNVS_0V8 */
+ regulator-name = "ldo2";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <900000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo3_reg: LDO3 {
+ /* PMIC_LDO3 - VDDA_1V8 */
+ regulator-name = "ldo3";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4_reg: LDO4 {
+ /* PMIC_LDO4 - VDD_MIPI_0V9 */
+ regulator-name = "ldo4";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo6_reg: LDO6 {
+ /* PMIC_LDO6 - VDD_MIPI_1V2 */
+ regulator-name = "ldo6";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&i2c3 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+};
+
+&i2c4 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ assigned-clocks = <&clk IMX8MN_CLK_UART3>;
+ assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_bluetooth>;
+ shutdown-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
+ device-wakeup-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+ max-speed = <3000000>;
+ };
+};
+
+/* Console */
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&usbotg1 {
+ dr_mode = "peripheral";
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
+ mmc-pwrseq = <&usdhc2_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: bcrmf@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wlan>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&wdog1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ fsl,ext-reset-output;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_espi2: espi2grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x082
+ MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x082
+ MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x082
+ MX8MN_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x040
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400000c2
+ MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400000c2
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400000c2
+ MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400000c2
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400000c2
+ MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400000c2
+ >;
+ };
+
+ pinctrl_pmic: pmicirq {
+ fsl,pins = <
+ MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x040
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x040
+ MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x040
+ >;
+ };
+
+ pinctrl_usdhc2_pwrseq: usdhc2pwrseqgrp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x040 /* WL_REG_ON */
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x090
+ MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d0
+ MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0d0
+ MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0d0
+ MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0d0
+ MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d0
+ >;
+ };
+
+ pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+ fsl,pins = <
+ MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x094
+ MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d4
+ MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0d4
+ MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0d4
+ MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0d4
+ MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d4
+ >;
+ };
+
+ pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+ fsl,pins = <
+ MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x096
+ MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d6
+ MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0d6
+ MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0d6
+ MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0d6
+ MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d6
+ >;
+ };
+
+ pinctrl_wlan: wlangrp {
+ fsl,pins = <
+ MX8MN_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x0d6 /* GPIO_0 - WIFI_GPIO_0 */
+ MX8MN_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x0d6 /* GPIO_1 - WIFI_GPIO_1 */
+ MX8MN_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x0d6 /* BT_GPIO_5 - WIFI_GPIO_5 */
+ MX8MN_IOMUXC_SPDIF_RX_GPIO5_IO4 0x0d6 /* I2S_CLK - WIFI_GPIO_6 */
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x040
+ MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x040
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0x040
+ MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0x040
+ MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x040
+ MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x040
+ >;
+ };
+
+ pinctrl_bluetooth: bluetoothgrp {
+ fsl,pins = <
+ MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x044 /* BT_REG_ON */
+ MX8MN_IOMUXC_ENET_TD3_GPIO1_IO18 0x046 /* BT_DEV_WAKE */
+ MX8MN_IOMUXC_ENET_RD2_GPIO1_IO28 0x090 /* BT_HOST_WAKE */
+ >;
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x046
+ >;
+ };
+
+ pinctrl_fec1: fec1grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x002
+ MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x002
+ MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x090
+ MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x090
+ MX8MN_IOMUXC_ENET_RXC_ENET1_RX_ER 0x090
+ MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x016
+ MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x016
+ MX8MN_IOMUXC_ENET_TD2_ENET1_TX_CLK 0x016
+ MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x016
+ MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x090
+ MX8MN_IOMUXC_ENET_TXC_ENET1_TX_ER 0x016
+ MX8MN_IOMUXC_SD2_CD_B_GPIO2_IO12 0x150 /* RMII_INT - ENET_INT */
+ MX8MN_IOMUXC_SD2_WP_GPIO2_IO20 0x150 /* RMII_EN - ENET_EN */
+ MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x016 /* RMII_WAKE - GPIO_ENET_WAKE */
+ MX8MN_IOMUXC_ENET_RD3_GPIO1_IO29 0x016 /* RMII_RESET - GPIO_ENET_RST */
+ >;
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
new file mode 100644
index 000000000000..33f98582eace
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021 Collabora Ltd.
+ * Copyright 2021 BSH Hausgeraete GmbH
+ */
+
+/dts-v1/;
+
+#include "imx8mn-bsh-smm-s2-common.dtsi"
+
+/ {
+ model = "BSH SMM S2";
+ compatible = "bsh,imx8mn-bsh-smm-s2", "fsl,imx8mn";
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x0 0x40000000 0x0 0x10000000>;
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ nand-on-flash-bbt;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_gpmi_nand: gpmi-nand {
+ fsl,pins = <
+ MX8MN_IOMUXC_NAND_ALE_RAWNAND_ALE 0x00000096
+ MX8MN_IOMUXC_NAND_CE0_B_RAWNAND_CE0_B 0x00000096
+ MX8MN_IOMUXC_NAND_CLE_RAWNAND_CLE 0x00000096
+ MX8MN_IOMUXC_NAND_DATA00_RAWNAND_DATA00 0x00000096
+ MX8MN_IOMUXC_NAND_DATA01_RAWNAND_DATA01 0x00000096
+ MX8MN_IOMUXC_NAND_DATA02_RAWNAND_DATA02 0x00000096
+ MX8MN_IOMUXC_NAND_DATA03_RAWNAND_DATA03 0x00000096
+ MX8MN_IOMUXC_NAND_DATA04_RAWNAND_DATA04 0x00000096
+ MX8MN_IOMUXC_NAND_DATA05_RAWNAND_DATA05 0x00000096
+ MX8MN_IOMUXC_NAND_DATA06_RAWNAND_DATA06 0x00000096
+ MX8MN_IOMUXC_NAND_DATA07_RAWNAND_DATA07 0x00000096
+ MX8MN_IOMUXC_NAND_RE_B_RAWNAND_RE_B 0x00000096
+ MX8MN_IOMUXC_NAND_READY_B_RAWNAND_READY_B 0x00000056
+ MX8MN_IOMUXC_NAND_WE_B_RAWNAND_WE_B 0x00000096
+ MX8MN_IOMUXC_NAND_WP_B_RAWNAND_WP_B 0x00000096
+ >;
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
new file mode 100644
index 000000000000..c6a8ed6745c1
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
@@ -0,0 +1,80 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021 Collabora Ltd.
+ * Copyright 2021 BSH Hausgeraete GmbH
+ */
+
+/dts-v1/;
+
+#include "imx8mn-bsh-smm-s2-common.dtsi"
+
+/ {
+ model = "BSH SMM S2 PRO";
+ compatible = "bsh,imx8mn-bsh-smm-s2pro", "fsl,imx8mn";
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x0 0x40000000 0x0 0x20000000>;
+ };
+};
+
+/* eMMC */
+&usdhc1 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x40000090
+ MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x0d0
+ MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0d0
+ MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0d0
+ MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0d0
+ MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x0d0
+ MX8MN_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x0d0
+ MX8MN_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x0d0
+ MX8MN_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x0d0
+ MX8MN_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x0d0
+ MX8MN_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x090
+ >;
+ };
+
+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ fsl,pins = <
+ MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x40000094
+ MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x0d4
+ MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0d4
+ MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0d4
+ MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0d4
+ MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x0d4
+ MX8MN_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x0d4
+ MX8MN_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x0d4
+ MX8MN_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x0d4
+ MX8MN_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x0d4
+ MX8MN_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x094
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ fsl,pins = <
+ MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x40000096
+ MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x0d6
+ MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0d6
+ MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0d6
+ MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0d6
+ MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x0d6
+ MX8MN_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x0d6
+ MX8MN_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x0d6
+ MX8MN_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x0d6
+ MX8MN_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x0d6
+ MX8MN_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x096
+ >;
+ };
+};
--
2.30.2
Add bindings for BSH SystemMaster (SMM) M2 IMX6ULZ board.
Signed-off-by: Ariel D'Alessandro <[email protected]>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index d49c4b786f09..461b9888812e 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -632,6 +632,7 @@ properties:
- description: i.MX6ULZ based Boards
items:
- enum:
+ - bsh,imx6ulz-bsh-smm-m2 # i.MX6 ULZ BSH SystemMaster
- fsl,imx6ulz-14x14-evk # i.MX6 ULZ 14x14 EVK Board
- const: fsl,imx6ull # This seems odd. Should be last?
- const: fsl,imx6ulz
--
2.30.2
From: Michael Trimarchi <[email protected]>
Add DTS of BSH SMM-M2 SystemMaster.
This version comes with:
- 128 MiB DDR3 RAM
- 256 MiB Nand
- wifi
- bluetooth
Signed-off-by: Ariel D'Alessandro <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts | 153 +++++++++++++++++++++++
2 files changed, 155 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0de64f237cd8..e6d4ad497985 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -693,7 +693,8 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ull-phytec-segin-ff-rdk-nand.dtb \
imx6ull-phytec-segin-ff-rdk-emmc.dtb \
imx6ull-phytec-segin-lc-rdk-nand.dtb \
- imx6ulz-14x14-evk.dtb
+ imx6ulz-14x14-evk.dtb \
+ imx6ulz-bsh-smm-m2.dts
dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-cl-som-imx7.dtb \
imx7d-colibri-aster.dtb \
diff --git a/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts b/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
new file mode 100644
index 000000000000..9e82860469e3
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
@@ -0,0 +1,153 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2021 BSH Hausgeraete GmbH
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include "imx6ulz.dtsi"
+
+/ {
+ model = "BSH SMM M2";
+ compatible = "bsh,imx6ulz-bsh-smm-m2", "fsl,imx6ull";
+
+ chosen {
+ stdout-path = &uart4;
+ };
+
+ usdhc2_pwrseq: usdhc2_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
+ status = "okay";
+ };
+
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_bluetooth_uart>;
+ uart-has-rtscts;
+
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm4330-bt";
+ max-speed = <3000000>;
+ shutdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+ device-wakeup-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_debug_uart>;
+ status = "okay";
+};
+
+&usbotg1 {
+ dr_mode = "peripheral";
+ srp-disable;
+ hnp-disable;
+ adp-disable;
+ status = "okay";
+};
+
+&usbphy1 {
+ fsl,tx-d-cal = <106>;
+};
+
+&usdhc2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wlan>;
+ bus-width = <4>;
+ no-1-8-v;
+ non-removable;
+ cap-power-off-card;
+ pm-ignore-notify;
+ keep-power-in-suspend;
+ wifi-host;
+ cap-sdio-irq;
+ mmc-pwrseq = <&usdhc2_pwrseq>;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&gpio1>;
+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&wdog1 {
+ status = "okay";
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ status = "okay";
+ nand-on-flash-bbt;
+};
+
+&iomuxc {
+ pinctrl_bluetooth_uart: uart3grp {
+ fsl,pins = <
+ MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b099
+ MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
+ MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b099
+
+ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x79 /* BT_REG_ON */
+ MX6UL_PAD_SD1_CLK__GPIO2_IO17 0x100b1 /* BT_DEV_WAKE out */
+ MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x1b0b0 /* BT_HOST_WAKE in */
+ >;
+ };
+
+ pinctrl_debug_uart: uart4grp {
+ fsl,pins = <
+ MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpmi-nand {
+ fsl,pins = <
+ MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
+ MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
+ MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
+ MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
+ MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
+ MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
+ MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
+ MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
+ MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
+ MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
+ MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
+ MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
+ MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
+ MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
+ MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
+ >;
+ };
+
+ pinctrl_wlan: wlangrp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059
+ MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10059
+ MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059
+ MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059
+ MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059
+ MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059
+
+ MX6UL_PAD_SD1_DATA3__GPIO2_IO21 0x79 /* WL_REG_ON */
+ MX6UL_PAD_UART2_CTS_B__GPIO1_IO22 0x100b1 /* WL_DEV_WAKE - WiFi_GPIO_4 - WiFi FW UART */
+ MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b1 /* WL_HOST_WAKE - WIFI_GPIO_0 - OOB IRQ */
+ MX6UL_PAD_ENET1_RX_EN__OSC32K_32K_OUT 0x4001b031 /* OSC 32Khz wifi clk in */
+ >;
+ };
+};
--
2.30.2
On Tue, 23 Nov 2021 12:12:48 -0300, Ariel D'Alessandro wrote:
> Document vendor prefix for BSH Hausgeraete GmbH ('BSH Home Appliances',
> B/S/H/) manufacturer.
>
> Signed-off-by: Ariel D'Alessandro <[email protected]>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring <[email protected]>
On Tue, 23 Nov 2021 12:12:49 -0300, Ariel D'Alessandro wrote:
> Add bindings for BSH SystemMaster (SMM) S2 board family, which consists
> of: iMX8MN SMM S2 and iMX8MN SMM S2 PRO boards.
>
> Signed-off-by: Ariel D'Alessandro <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring <[email protected]>
On Tue, 23 Nov 2021 12:12:51 -0300, Ariel D'Alessandro wrote:
> Add bindings for BSH SystemMaster (SMM) M2 IMX6ULZ board.
>
> Signed-off-by: Ariel D'Alessandro <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <[email protected]>
On Tue, Nov 23, 2021 at 12:12:50PM -0300, Ariel D'Alessandro wrote:
> Introduce BSH SystemMaster (SMM) S2 board family, which consists of:
> iMX8MN SMM S2 and iMX8MN SMM S2 PRO boards.
>
> Add support for iMX8MN BSH SMM S2 board:
>
> - 256 MiB DDR3 RAM
> - 512 MiB NAND
> - Megabit Ethernet PHY
> - Wi-Fi 802.11 a/b/g/n/ac with Bluetooth 5.0
> - USB-OTG (peripheral mode)
>
> Add support for iMX8MN BSH SMM S2 PRO board:
>
> - 512 MiB DDR3 RAM
> - 8 GiB eMMC
> - Megabit Ethernet PHY
> - Wi-Fi 802.11 a/b/g/n/ac with Bluetooth 5.0
> - USB-OTG (peripheral mode)
>
> Signed-off-by: Ariel D'Alessandro <[email protected]>
> Signed-off-by: Michael Trimarchi <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/Makefile | 2 +
> .../freescale/imx8mn-bsh-smm-s2-common.dtsi | 426 ++++++++++++++++++
> .../boot/dts/freescale/imx8mn-bsh-smm-s2.dts | 48 ++
> .../dts/freescale/imx8mn-bsh-smm-s2pro.dts | 80 ++++
> 4 files changed, 556 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
>
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index a14a6173b765..c3e01c94ff7f 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -47,6 +47,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7901.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7902.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mn-beacon-kit.dtb
> +dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2.dtb
> +dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2pro.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
> new file mode 100644
> index 000000000000..a49528e1601c
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
> @@ -0,0 +1,426 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2021 Collabora Ltd.
> + * Copyright 2021 BSH Hausgeraete GmbH
> + */
> +
> +/dts-v1/;
> +
> +#include "imx8mn.dtsi"
> +
> +/ {
> + chosen {
> + stdout-path = &uart4;
> + };
> +
> + fec_supply: fec_supply_en {
Hyphen is recommended in node name.
> + compatible = "regulator-fixed";
> + regulator-name = "tja1101_en";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>;
> + vin-supply = <&buck4_reg>;
> + enable-active-high;
Put it right below 'gpio' line.
> + };
> +
> + usdhc2_pwrseq: usdhc2_pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc2_pwrseq>;
> + reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&A53_0 {
> + cpu-supply = <&buck2_reg>;
> +};
> +
> +&A53_1 {
> + cpu-supply = <&buck2_reg>;
> +};
> +
> +&A53_2 {
> + cpu-supply = <&buck2_reg>;
> +};
> +
> +&A53_3 {
> + cpu-supply = <&buck2_reg>;
> +};
> +
> +&ecspi2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_espi2>;
> + status = "okay";
> +};
> +
> +&fec1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fec1>;
> + phy-mode = "rmii";
> + phy-handle = <ðphy0>;
> + phy-supply = <&fec_supply>;
> + fsl,magic-packet;
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ethphy0: ethernet-phy@0 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0>;
> + reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
> + reset-assert-us = <20>;
> + reset-deassert-us = <2000>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1>;
> + status = "okay";
> +
> + bd71847: pmic@4b {
> + compatible = "rohm,bd71847";
> + reg = <0x4b>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pmic>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
> + rohm,reset-snvs-powered;
> +
> + #clock-cells = <0>;
> + clocks = <&osc_32k 0>;
> + clock-output-names = "clk-32k-out";
> +
> + regulators {
> + buck1_reg: BUCK1 {
> + /* PMIC_BUCK1 - VDD_SOC */
> + regulator-name = "buck1";
> + regulator-min-microvolt = <700000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-ramp-delay = <1250>;
> + };
> +
> + buck2_reg: BUCK2 {
> + /* PMIC_BUCK2 - VDD_ARM */
> + regulator-name = "buck2";
> + regulator-min-microvolt = <700000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-ramp-delay = <1250>;
> + };
> +
> + buck3_reg: BUCK3 {
> + /* PMIC_BUCK5 - VDD_DRAM_VPU_GPU */
> + regulator-name = "buck3";
> + regulator-min-microvolt = <700000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + buck4_reg: BUCK4 {
> + /* PMIC_BUCK6 - VDD_3V3 */
> + regulator-name = "buck4";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + buck5_reg: BUCK5 {
> + /* PMIC_BUCK7 - VDD_1V8 */
> + regulator-name = "buck5";
> + regulator-min-microvolt = <1605000>;
> + regulator-max-microvolt = <1995000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + buck6_reg: BUCK6 {
> + /* PMIC_BUCK8 - NVCC_DRAM */
> + regulator-name = "buck6";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1400000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + ldo1_reg: LDO1 {
> + /* PMIC_LDO1 - NVCC_SNVS_1V8 */
> + regulator-name = "ldo1";
> + regulator-min-microvolt = <1600000>;
> + regulator-max-microvolt = <1900000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + ldo2_reg: LDO2 {
> + /* PMIC_LDO2 - VDD_SNVS_0V8 */
> + regulator-name = "ldo2";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <900000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + ldo3_reg: LDO3 {
> + /* PMIC_LDO3 - VDDA_1V8 */
> + regulator-name = "ldo3";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + ldo4_reg: LDO4 {
> + /* PMIC_LDO4 - VDD_MIPI_0V9 */
> + regulator-name = "ldo4";
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + ldo6_reg: LDO6 {
> + /* PMIC_LDO6 - VDD_MIPI_1V2 */
> + regulator-name = "ldo6";
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> + };
> + };
> +};
> +
> +&i2c3 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3>;
> + status = "okay";
> +};
> +
> +&i2c4 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c4>;
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + status = "okay";
> +};
> +
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart3>;
> + assigned-clocks = <&clk IMX8MN_CLK_UART3>;
> + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
> + uart-has-rtscts;
> + status = "okay";
> +
> + bluetooth {
> + compatible = "brcm,bcm43438-bt";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_bluetooth>;
> + shutdown-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
> + device-wakeup-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
> + host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
> + max-speed = <3000000>;
> + };
> +};
> +
> +/* Console */
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4>;
> + status = "okay";
> +};
> +
> +&usbotg1 {
> + dr_mode = "peripheral";
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc2>;
> + pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
> + mmc-pwrseq = <&usdhc2_pwrseq>;
> + bus-width = <4>;
> + non-removable;
> + status = "okay";
> +
> + brcmf: bcrmf@1 {
> + compatible = "brcm,bcm4329-fmac";
> + reg = <1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_wlan>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "host-wake";
> + };
> +};
> +
> +&wdog1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_wdog>;
> + fsl,ext-reset-output;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_espi2: espi2grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x082
> + MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x082
> + MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x082
> + MX8MN_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x040
> + >;
> + };
> +
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400000c2
> + MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400000c2
> + >;
> + };
> +
> + pinctrl_i2c3: i2c3grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400000c2
> + MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400000c2
> + >;
> + };
> +
> + pinctrl_i2c4: i2c4grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400000c2
> + MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400000c2
> + >;
> + };
> +
> + pinctrl_pmic: pmicirq {
> + fsl,pins = <
> + MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x040
> + >;
> + };
> +
> + pinctrl_uart4: uart4grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x040
> + MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x040
> + >;
> + };
> +
> + pinctrl_usdhc2_pwrseq: usdhc2pwrseqgrp {
> + fsl,pins = <
> + MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x040 /* WL_REG_ON */
> + >;
> + };
> +
> + pinctrl_usdhc2: usdhc2grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x090
> + MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d0
> + MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0d0
> + MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0d0
> + MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0d0
> + MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d0
> + >;
> + };
> +
> + pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
> + fsl,pins = <
> + MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x094
> + MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d4
> + MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0d4
> + MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0d4
> + MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0d4
> + MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d4
> + >;
> + };
> +
> + pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
> + fsl,pins = <
> + MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x096
> + MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d6
> + MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0d6
> + MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0d6
> + MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0d6
> + MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d6
> + >;
> + };
> +
> + pinctrl_wlan: wlangrp {
> + fsl,pins = <
> + MX8MN_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x0d6 /* GPIO_0 - WIFI_GPIO_0 */
> + MX8MN_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x0d6 /* GPIO_1 - WIFI_GPIO_1 */
> + MX8MN_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x0d6 /* BT_GPIO_5 - WIFI_GPIO_5 */
> + MX8MN_IOMUXC_SPDIF_RX_GPIO5_IO4 0x0d6 /* I2S_CLK - WIFI_GPIO_6 */
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x040
> + MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x040
> + >;
> + };
> +
> + pinctrl_uart3: uart3grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0x040
> + MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0x040
> + MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x040
> + MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x040
> + >;
> + };
> +
> + pinctrl_bluetooth: bluetoothgrp {
Out of alphabetical order.
Shawn
> + fsl,pins = <
> + MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x044 /* BT_REG_ON */
> + MX8MN_IOMUXC_ENET_TD3_GPIO1_IO18 0x046 /* BT_DEV_WAKE */
> + MX8MN_IOMUXC_ENET_RD2_GPIO1_IO28 0x090 /* BT_HOST_WAKE */
> + >;
> + };
> +
> + pinctrl_wdog: wdoggrp {
> + fsl,pins = <
> + MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x046
> + >;
> + };
> +
> + pinctrl_fec1: fec1grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x002
> + MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x002
> + MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x090
> + MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x090
> + MX8MN_IOMUXC_ENET_RXC_ENET1_RX_ER 0x090
> + MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x016
> + MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x016
> + MX8MN_IOMUXC_ENET_TD2_ENET1_TX_CLK 0x016
> + MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x016
> + MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x090
> + MX8MN_IOMUXC_ENET_TXC_ENET1_TX_ER 0x016
> + MX8MN_IOMUXC_SD2_CD_B_GPIO2_IO12 0x150 /* RMII_INT - ENET_INT */
> + MX8MN_IOMUXC_SD2_WP_GPIO2_IO20 0x150 /* RMII_EN - ENET_EN */
> + MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x016 /* RMII_WAKE - GPIO_ENET_WAKE */
> + MX8MN_IOMUXC_ENET_RD3_GPIO1_IO29 0x016 /* RMII_RESET - GPIO_ENET_RST */
> + >;
> + };
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
> new file mode 100644
> index 000000000000..33f98582eace
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
> @@ -0,0 +1,48 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2021 Collabora Ltd.
> + * Copyright 2021 BSH Hausgeraete GmbH
> + */
> +
> +/dts-v1/;
> +
> +#include "imx8mn-bsh-smm-s2-common.dtsi"
> +
> +/ {
> + model = "BSH SMM S2";
> + compatible = "bsh,imx8mn-bsh-smm-s2", "fsl,imx8mn";
> +
> + memory@40000000 {
> + device_type = "memory";
> + reg = <0x0 0x40000000 0x0 0x10000000>;
> + };
> +};
> +
> +&gpmi {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpmi_nand>;
> + nand-on-flash-bbt;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_gpmi_nand: gpmi-nand {
> + fsl,pins = <
> + MX8MN_IOMUXC_NAND_ALE_RAWNAND_ALE 0x00000096
> + MX8MN_IOMUXC_NAND_CE0_B_RAWNAND_CE0_B 0x00000096
> + MX8MN_IOMUXC_NAND_CLE_RAWNAND_CLE 0x00000096
> + MX8MN_IOMUXC_NAND_DATA00_RAWNAND_DATA00 0x00000096
> + MX8MN_IOMUXC_NAND_DATA01_RAWNAND_DATA01 0x00000096
> + MX8MN_IOMUXC_NAND_DATA02_RAWNAND_DATA02 0x00000096
> + MX8MN_IOMUXC_NAND_DATA03_RAWNAND_DATA03 0x00000096
> + MX8MN_IOMUXC_NAND_DATA04_RAWNAND_DATA04 0x00000096
> + MX8MN_IOMUXC_NAND_DATA05_RAWNAND_DATA05 0x00000096
> + MX8MN_IOMUXC_NAND_DATA06_RAWNAND_DATA06 0x00000096
> + MX8MN_IOMUXC_NAND_DATA07_RAWNAND_DATA07 0x00000096
> + MX8MN_IOMUXC_NAND_RE_B_RAWNAND_RE_B 0x00000096
> + MX8MN_IOMUXC_NAND_READY_B_RAWNAND_READY_B 0x00000056
> + MX8MN_IOMUXC_NAND_WE_B_RAWNAND_WE_B 0x00000096
> + MX8MN_IOMUXC_NAND_WP_B_RAWNAND_WP_B 0x00000096
> + >;
> + };
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
> new file mode 100644
> index 000000000000..c6a8ed6745c1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
> @@ -0,0 +1,80 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2021 Collabora Ltd.
> + * Copyright 2021 BSH Hausgeraete GmbH
> + */
> +
> +/dts-v1/;
> +
> +#include "imx8mn-bsh-smm-s2-common.dtsi"
> +
> +/ {
> + model = "BSH SMM S2 PRO";
> + compatible = "bsh,imx8mn-bsh-smm-s2pro", "fsl,imx8mn";
> +
> + memory@40000000 {
> + device_type = "memory";
> + reg = <0x0 0x40000000 0x0 0x20000000>;
> + };
> +};
> +
> +/* eMMC */
> +&usdhc1 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc1>;
> + pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
> + bus-width = <8>;
> + non-removable;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_usdhc1: usdhc1grp {
> + fsl,pins = <
> + MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x40000090
> + MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x0d0
> + MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0d0
> + MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0d0
> + MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0d0
> + MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x0d0
> + MX8MN_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x0d0
> + MX8MN_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x0d0
> + MX8MN_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x0d0
> + MX8MN_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x0d0
> + MX8MN_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x090
> + >;
> + };
> +
> + pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
> + fsl,pins = <
> + MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x40000094
> + MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x0d4
> + MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0d4
> + MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0d4
> + MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0d4
> + MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x0d4
> + MX8MN_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x0d4
> + MX8MN_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x0d4
> + MX8MN_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x0d4
> + MX8MN_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x0d4
> + MX8MN_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x094
> + >;
> + };
> +
> + pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
> + fsl,pins = <
> + MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x40000096
> + MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x0d6
> + MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0d6
> + MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0d6
> + MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0d6
> + MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x0d6
> + MX8MN_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x0d6
> + MX8MN_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x0d6
> + MX8MN_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x0d6
> + MX8MN_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x0d6
> + MX8MN_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x096
> + >;
> + };
> +};
> --
> 2.30.2
>
On Tue, Nov 23, 2021 at 12:12:52PM -0300, Ariel D'Alessandro wrote:
> From: Michael Trimarchi <[email protected]>
>
> Add DTS of BSH SMM-M2 SystemMaster.
>
> This version comes with:
> - 128 MiB DDR3 RAM
> - 256 MiB Nand
> - wifi
> - bluetooth
>
> Signed-off-by: Ariel D'Alessandro <[email protected]>
> Signed-off-by: Michael Trimarchi <[email protected]>
> ---
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts | 153 +++++++++++++++++++++++
> 2 files changed, 155 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 0de64f237cd8..e6d4ad497985 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -693,7 +693,8 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
> imx6ull-phytec-segin-ff-rdk-nand.dtb \
> imx6ull-phytec-segin-ff-rdk-emmc.dtb \
> imx6ull-phytec-segin-lc-rdk-nand.dtb \
> - imx6ulz-14x14-evk.dtb
> + imx6ulz-14x14-evk.dtb \
> + imx6ulz-bsh-smm-m2.dts
> dtb-$(CONFIG_SOC_IMX7D) += \
> imx7d-cl-som-imx7.dtb \
> imx7d-colibri-aster.dtb \
> diff --git a/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts b/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
> new file mode 100644
> index 000000000000..9e82860469e3
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
> @@ -0,0 +1,153 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (C) 2021 BSH Hausgeraete GmbH
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include "imx6ulz.dtsi"
> +
> +/ {
> + model = "BSH SMM M2";
> + compatible = "bsh,imx6ulz-bsh-smm-m2", "fsl,imx6ull";
> +
> + chosen {
> + stdout-path = &uart4;
> + };
> +
> + usdhc2_pwrseq: usdhc2_pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
> + status = "okay";
"okay" status is generally used to flip "disabled" devices.
> + };
> +
> +};
> +
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_bluetooth_uart>;
> + uart-has-rtscts;
> +
Unneeded newline.
> + status = "okay";
> +
> + bluetooth {
> + compatible = "brcm,bcm4330-bt";
> + max-speed = <3000000>;
> + shutdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
> + device-wakeup-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
> + host-wakeup-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
> + };
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_debug_uart>;
> + status = "okay";
> +};
> +
> +&usbotg1 {
> + dr_mode = "peripheral";
> + srp-disable;
> + hnp-disable;
> + adp-disable;
> + status = "okay";
> +};
> +
> +&usbphy1 {
> + fsl,tx-d-cal = <106>;
> +};
> +
> +&usdhc2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_wlan>;
> + bus-width = <4>;
> + no-1-8-v;
> + non-removable;
> + cap-power-off-card;
> + pm-ignore-notify;
What is this?
> + keep-power-in-suspend;
> + wifi-host;
and this?
> + cap-sdio-irq;
> + mmc-pwrseq = <&usdhc2_pwrseq>;
> + status = "okay";
> +
> + brcmf: wifi@1 {
> + reg = <1>;
> + compatible = "brcm,bcm4329-fmac";
> + interrupt-parent = <&gpio1>;
> + interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "host-wake";
> + };
> +};
> +
> +&wdog1 {
> + status = "okay";
> +};
> +
> +&gpmi {
Out of alphabetical order.
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpmi_nand>;
> + status = "okay";
End property list with status.
> + nand-on-flash-bbt;
> +};
> +
> +&iomuxc {
> + pinctrl_bluetooth_uart: uart3grp {
Name label and node consistently.
> + fsl,pins = <
> + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
> + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b099
> + MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
> + MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b099
> +
Unnecessary newline.
> + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x79 /* BT_REG_ON */
> + MX6UL_PAD_SD1_CLK__GPIO2_IO17 0x100b1 /* BT_DEV_WAKE out */
> + MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x1b0b0 /* BT_HOST_WAKE in */
> + >;
> + };
> +
> + pinctrl_debug_uart: uart4grp {
> + fsl,pins = <
> + MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
> + MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
> + >;
> + };
> +
> + pinctrl_gpmi_nand: gpmi-nand {
Name node in the same style as others.
Shawn
> + fsl,pins = <
> + MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
> + MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
> + MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
> + MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
> + MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
> + MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
> + MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
> + MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
> + MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
> + MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
> + MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
> + MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
> + MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
> + MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
> + MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
> + >;
> + };
> +
> + pinctrl_wlan: wlangrp {
> + fsl,pins = <
> + MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059
> + MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10059
> + MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059
> + MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059
> + MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059
> + MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059
> +
> + MX6UL_PAD_SD1_DATA3__GPIO2_IO21 0x79 /* WL_REG_ON */
> + MX6UL_PAD_UART2_CTS_B__GPIO1_IO22 0x100b1 /* WL_DEV_WAKE - WiFi_GPIO_4 - WiFi FW UART */
> + MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b1 /* WL_HOST_WAKE - WIFI_GPIO_0 - OOB IRQ */
> + MX6UL_PAD_ENET1_RX_EN__OSC32K_32K_OUT 0x4001b031 /* OSC 32Khz wifi clk in */
> + >;
> + };
> +};
> --
> 2.30.2
>
Hi Shawn,
Thanks a lot for the review.
On 12/5/21 10:29 PM, Shawn Guo wrote:
> On Tue, Nov 23, 2021 at 12:12:50PM -0300, Ariel D'Alessandro wrote:
>> Introduce BSH SystemMaster (SMM) S2 board family, which consists of:
>> iMX8MN SMM S2 and iMX8MN SMM S2 PRO boards.
>>
>> Add support for iMX8MN BSH SMM S2 board:
>>
>> - 256 MiB DDR3 RAM
>> - 512 MiB NAND
>> - Megabit Ethernet PHY
>> - Wi-Fi 802.11 a/b/g/n/ac with Bluetooth 5.0
>> - USB-OTG (peripheral mode)
>>
>> Add support for iMX8MN BSH SMM S2 PRO board:
>>
>> - 512 MiB DDR3 RAM
>> - 8 GiB eMMC
>> - Megabit Ethernet PHY
>> - Wi-Fi 802.11 a/b/g/n/ac with Bluetooth 5.0
>> - USB-OTG (peripheral mode)
>>
>> Signed-off-by: Ariel D'Alessandro <[email protected]>
>> Signed-off-by: Michael Trimarchi <[email protected]>
>> ---
>> arch/arm64/boot/dts/freescale/Makefile | 2 +
>> .../freescale/imx8mn-bsh-smm-s2-common.dtsi | 426 ++++++++++++++++++
>> .../boot/dts/freescale/imx8mn-bsh-smm-s2.dts | 48 ++
>> .../dts/freescale/imx8mn-bsh-smm-s2pro.dts | 80 ++++
>> 4 files changed, 556 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
>> create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
>> create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
>>
>> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
>> index a14a6173b765..c3e01c94ff7f 100644
>> --- a/arch/arm64/boot/dts/freescale/Makefile
>> +++ b/arch/arm64/boot/dts/freescale/Makefile
>> @@ -47,6 +47,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x.dtb
>> dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7901.dtb
>> dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7902.dtb
>> dtb-$(CONFIG_ARCH_MXC) += imx8mn-beacon-kit.dtb
>> +dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2.dtb
>> +dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2pro.dtb
>> dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
>> dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb
>> dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
>> new file mode 100644
>> index 000000000000..a49528e1601c
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
>> @@ -0,0 +1,426 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright 2021 Collabora Ltd.
>> + * Copyright 2021 BSH Hausgeraete GmbH
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "imx8mn.dtsi"
>> +
>> +/ {
>> + chosen {
>> + stdout-path = &uart4;
>> + };
>> +
>> + fec_supply: fec_supply_en {
>
> Hyphen is recommended in node name.
Fixed in v3.
>
>> + compatible = "regulator-fixed";
>> + regulator-name = "tja1101_en";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>;
>> + vin-supply = <&buck4_reg>;
>> + enable-active-high;
>
> Put it right below 'gpio' line.
Fixed in v3.
>
>> + };
>> +
>> + usdhc2_pwrseq: usdhc2_pwrseq {
>> + compatible = "mmc-pwrseq-simple";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usdhc2_pwrseq>;
>> + reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
>> + };
>> +};
>> +
>> +&A53_0 {
>> + cpu-supply = <&buck2_reg>;
>> +};
>> +
>> +&A53_1 {
>> + cpu-supply = <&buck2_reg>;
>> +};
>> +
>> +&A53_2 {
>> + cpu-supply = <&buck2_reg>;
>> +};
>> +
>> +&A53_3 {
>> + cpu-supply = <&buck2_reg>;
>> +};
>> +
>> +&ecspi2 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_espi2>;
>> + status = "okay";
>> +};
>> +
>> +&fec1 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_fec1>;
>> + phy-mode = "rmii";
>> + phy-handle = <ðphy0>;
>> + phy-supply = <&fec_supply>;
>> + fsl,magic-packet;
>> + status = "okay";
>> +
>> + mdio {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + ethphy0: ethernet-phy@0 {
>> + compatible = "ethernet-phy-ieee802.3-c22";
>> + reg = <0>;
>> + reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
>> + reset-assert-us = <20>;
>> + reset-deassert-us = <2000>;
>> + };
>> + };
>> +};
>> +
>> +&i2c1 {
>> + clock-frequency = <400000>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_i2c1>;
>> + status = "okay";
>> +
>> + bd71847: pmic@4b {
>> + compatible = "rohm,bd71847";
>> + reg = <0x4b>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_pmic>;
>> + interrupt-parent = <&gpio1>;
>> + interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
>> + rohm,reset-snvs-powered;
>> +
>> + #clock-cells = <0>;
>> + clocks = <&osc_32k 0>;
>> + clock-output-names = "clk-32k-out";
>> +
>> + regulators {
>> + buck1_reg: BUCK1 {
>> + /* PMIC_BUCK1 - VDD_SOC */
>> + regulator-name = "buck1";
>> + regulator-min-microvolt = <700000>;
>> + regulator-max-microvolt = <1300000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + regulator-ramp-delay = <1250>;
>> + };
>> +
>> + buck2_reg: BUCK2 {
>> + /* PMIC_BUCK2 - VDD_ARM */
>> + regulator-name = "buck2";
>> + regulator-min-microvolt = <700000>;
>> + regulator-max-microvolt = <1300000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + regulator-ramp-delay = <1250>;
>> + };
>> +
>> + buck3_reg: BUCK3 {
>> + /* PMIC_BUCK5 - VDD_DRAM_VPU_GPU */
>> + regulator-name = "buck3";
>> + regulator-min-microvolt = <700000>;
>> + regulator-max-microvolt = <1350000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + buck4_reg: BUCK4 {
>> + /* PMIC_BUCK6 - VDD_3V3 */
>> + regulator-name = "buck4";
>> + regulator-min-microvolt = <3000000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + buck5_reg: BUCK5 {
>> + /* PMIC_BUCK7 - VDD_1V8 */
>> + regulator-name = "buck5";
>> + regulator-min-microvolt = <1605000>;
>> + regulator-max-microvolt = <1995000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + buck6_reg: BUCK6 {
>> + /* PMIC_BUCK8 - NVCC_DRAM */
>> + regulator-name = "buck6";
>> + regulator-min-microvolt = <800000>;
>> + regulator-max-microvolt = <1400000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + ldo1_reg: LDO1 {
>> + /* PMIC_LDO1 - NVCC_SNVS_1V8 */
>> + regulator-name = "ldo1";
>> + regulator-min-microvolt = <1600000>;
>> + regulator-max-microvolt = <1900000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + ldo2_reg: LDO2 {
>> + /* PMIC_LDO2 - VDD_SNVS_0V8 */
>> + regulator-name = "ldo2";
>> + regulator-min-microvolt = <800000>;
>> + regulator-max-microvolt = <900000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + ldo3_reg: LDO3 {
>> + /* PMIC_LDO3 - VDDA_1V8 */
>> + regulator-name = "ldo3";
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + ldo4_reg: LDO4 {
>> + /* PMIC_LDO4 - VDD_MIPI_0V9 */
>> + regulator-name = "ldo4";
>> + regulator-min-microvolt = <900000>;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + ldo6_reg: LDO6 {
>> + /* PMIC_LDO6 - VDD_MIPI_1V2 */
>> + regulator-name = "ldo6";
>> + regulator-min-microvolt = <900000>;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> + };
>> + };
>> +};
>> +
>> +&i2c3 {
>> + clock-frequency = <400000>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_i2c3>;
>> + status = "okay";
>> +};
>> +
>> +&i2c4 {
>> + clock-frequency = <400000>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_i2c4>;
>> + status = "okay";
>> +};
>> +
>> +&uart2 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_uart2>;
>> + status = "okay";
>> +};
>> +
>> +&uart3 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_uart3>;
>> + assigned-clocks = <&clk IMX8MN_CLK_UART3>;
>> + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
>> + uart-has-rtscts;
>> + status = "okay";
>> +
>> + bluetooth {
>> + compatible = "brcm,bcm43438-bt";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_bluetooth>;
>> + shutdown-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
>> + device-wakeup-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
>> + host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
>> + max-speed = <3000000>;
>> + };
>> +};
>> +
>> +/* Console */
>> +&uart4 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_uart4>;
>> + status = "okay";
>> +};
>> +
>> +&usbotg1 {
>> + dr_mode = "peripheral";
>> + disable-over-current;
>> + status = "okay";
>> +};
>> +
>> +&usdhc2 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
>> + pinctrl-0 = <&pinctrl_usdhc2>;
>> + pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
>> + pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
>> + mmc-pwrseq = <&usdhc2_pwrseq>;
>> + bus-width = <4>;
>> + non-removable;
>> + status = "okay";
>> +
>> + brcmf: bcrmf@1 {
>> + compatible = "brcm,bcm4329-fmac";
>> + reg = <1>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_wlan>;
>> + interrupt-parent = <&gpio1>;
>> + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "host-wake";
>> + };
>> +};
>> +
>> +&wdog1 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_wdog>;
>> + fsl,ext-reset-output;
>> + status = "okay";
>> +};
>> +
>> +&iomuxc {
>> + pinctrl_espi2: espi2grp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x082
>> + MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x082
>> + MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x082
>> + MX8MN_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x040
>> + >;
>> + };
>> +
>> + pinctrl_i2c1: i2c1grp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400000c2
>> + MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400000c2
>> + >;
>> + };
>> +
>> + pinctrl_i2c3: i2c3grp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400000c2
>> + MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400000c2
>> + >;
>> + };
>> +
>> + pinctrl_i2c4: i2c4grp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400000c2
>> + MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400000c2
>> + >;
>> + };
>> +
>> + pinctrl_pmic: pmicirq {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x040
>> + >;
>> + };
>> +
>> + pinctrl_uart4: uart4grp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x040
>> + MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x040
>> + >;
>> + };
>> +
>> + pinctrl_usdhc2_pwrseq: usdhc2pwrseqgrp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x040 /* WL_REG_ON */
>> + >;
>> + };
>> +
>> + pinctrl_usdhc2: usdhc2grp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x090
>> + MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d0
>> + MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0d0
>> + MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0d0
>> + MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0d0
>> + MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d0
>> + >;
>> + };
>> +
>> + pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x094
>> + MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d4
>> + MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0d4
>> + MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0d4
>> + MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0d4
>> + MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d4
>> + >;
>> + };
>> +
>> + pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x096
>> + MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d6
>> + MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0d6
>> + MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0d6
>> + MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0d6
>> + MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d6
>> + >;
>> + };
>> +
>> + pinctrl_wlan: wlangrp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x0d6 /* GPIO_0 - WIFI_GPIO_0 */
>> + MX8MN_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x0d6 /* GPIO_1 - WIFI_GPIO_1 */
>> + MX8MN_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x0d6 /* BT_GPIO_5 - WIFI_GPIO_5 */
>> + MX8MN_IOMUXC_SPDIF_RX_GPIO5_IO4 0x0d6 /* I2S_CLK - WIFI_GPIO_6 */
>> + >;
>> + };
>> +
>> + pinctrl_uart2: uart2grp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x040
>> + MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x040
>> + >;
>> + };
>> +
>> + pinctrl_uart3: uart3grp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0x040
>> + MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0x040
>> + MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x040
>> + MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x040
>> + >;
>> + };
>> +
>> + pinctrl_bluetooth: bluetoothgrp {
>
> Out of alphabetical order.
Fixed in v3.
>
> Shawn
>
>> + fsl,pins = <
>> + MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x044 /* BT_REG_ON */
>> + MX8MN_IOMUXC_ENET_TD3_GPIO1_IO18 0x046 /* BT_DEV_WAKE */
>> + MX8MN_IOMUXC_ENET_RD2_GPIO1_IO28 0x090 /* BT_HOST_WAKE */
>> + >;
>> + };
>> +
>> + pinctrl_wdog: wdoggrp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x046
>> + >;
>> + };
>> +
>> + pinctrl_fec1: fec1grp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x002
>> + MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x002
>> + MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x090
>> + MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x090
>> + MX8MN_IOMUXC_ENET_RXC_ENET1_RX_ER 0x090
>> + MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x016
>> + MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x016
>> + MX8MN_IOMUXC_ENET_TD2_ENET1_TX_CLK 0x016
>> + MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x016
>> + MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x090
>> + MX8MN_IOMUXC_ENET_TXC_ENET1_TX_ER 0x016
>> + MX8MN_IOMUXC_SD2_CD_B_GPIO2_IO12 0x150 /* RMII_INT - ENET_INT */
>> + MX8MN_IOMUXC_SD2_WP_GPIO2_IO20 0x150 /* RMII_EN - ENET_EN */
>> + MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x016 /* RMII_WAKE - GPIO_ENET_WAKE */
>> + MX8MN_IOMUXC_ENET_RD3_GPIO1_IO29 0x016 /* RMII_RESET - GPIO_ENET_RST */
>> + >;
>> + };
>> +};
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
>> new file mode 100644
>> index 000000000000..33f98582eace
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2.dts
>> @@ -0,0 +1,48 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright 2021 Collabora Ltd.
>> + * Copyright 2021 BSH Hausgeraete GmbH
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "imx8mn-bsh-smm-s2-common.dtsi"
>> +
>> +/ {
>> + model = "BSH SMM S2";
>> + compatible = "bsh,imx8mn-bsh-smm-s2", "fsl,imx8mn";
>> +
>> + memory@40000000 {
>> + device_type = "memory";
>> + reg = <0x0 0x40000000 0x0 0x10000000>;
>> + };
>> +};
>> +
>> +&gpmi {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_gpmi_nand>;
>> + nand-on-flash-bbt;
>> + status = "okay";
>> +};
>> +
>> +&iomuxc {
>> + pinctrl_gpmi_nand: gpmi-nand {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_NAND_ALE_RAWNAND_ALE 0x00000096
>> + MX8MN_IOMUXC_NAND_CE0_B_RAWNAND_CE0_B 0x00000096
>> + MX8MN_IOMUXC_NAND_CLE_RAWNAND_CLE 0x00000096
>> + MX8MN_IOMUXC_NAND_DATA00_RAWNAND_DATA00 0x00000096
>> + MX8MN_IOMUXC_NAND_DATA01_RAWNAND_DATA01 0x00000096
>> + MX8MN_IOMUXC_NAND_DATA02_RAWNAND_DATA02 0x00000096
>> + MX8MN_IOMUXC_NAND_DATA03_RAWNAND_DATA03 0x00000096
>> + MX8MN_IOMUXC_NAND_DATA04_RAWNAND_DATA04 0x00000096
>> + MX8MN_IOMUXC_NAND_DATA05_RAWNAND_DATA05 0x00000096
>> + MX8MN_IOMUXC_NAND_DATA06_RAWNAND_DATA06 0x00000096
>> + MX8MN_IOMUXC_NAND_DATA07_RAWNAND_DATA07 0x00000096
>> + MX8MN_IOMUXC_NAND_RE_B_RAWNAND_RE_B 0x00000096
>> + MX8MN_IOMUXC_NAND_READY_B_RAWNAND_READY_B 0x00000056
>> + MX8MN_IOMUXC_NAND_WE_B_RAWNAND_WE_B 0x00000096
>> + MX8MN_IOMUXC_NAND_WP_B_RAWNAND_WP_B 0x00000096
>> + >;
>> + };
>> +};
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
>> new file mode 100644
>> index 000000000000..c6a8ed6745c1
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts
>> @@ -0,0 +1,80 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright 2021 Collabora Ltd.
>> + * Copyright 2021 BSH Hausgeraete GmbH
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "imx8mn-bsh-smm-s2-common.dtsi"
>> +
>> +/ {
>> + model = "BSH SMM S2 PRO";
>> + compatible = "bsh,imx8mn-bsh-smm-s2pro", "fsl,imx8mn";
>> +
>> + memory@40000000 {
>> + device_type = "memory";
>> + reg = <0x0 0x40000000 0x0 0x20000000>;
>> + };
>> +};
>> +
>> +/* eMMC */
>> +&usdhc1 {
>> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
>> + pinctrl-0 = <&pinctrl_usdhc1>;
>> + pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
>> + pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
>> + bus-width = <8>;
>> + non-removable;
>> + status = "okay";
>> +};
>> +
>> +&iomuxc {
>> + pinctrl_usdhc1: usdhc1grp {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x40000090
>> + MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x0d0
>> + MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0d0
>> + MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0d0
>> + MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0d0
>> + MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x0d0
>> + MX8MN_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x0d0
>> + MX8MN_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x0d0
>> + MX8MN_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x0d0
>> + MX8MN_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x0d0
>> + MX8MN_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x090
>> + >;
>> + };
>> +
>> + pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x40000094
>> + MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x0d4
>> + MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0d4
>> + MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0d4
>> + MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0d4
>> + MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x0d4
>> + MX8MN_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x0d4
>> + MX8MN_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x0d4
>> + MX8MN_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x0d4
>> + MX8MN_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x0d4
>> + MX8MN_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x094
>> + >;
>> + };
>> +
>> + pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
>> + fsl,pins = <
>> + MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x40000096
>> + MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x0d6
>> + MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0d6
>> + MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0d6
>> + MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0d6
>> + MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x0d6
>> + MX8MN_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x0d6
>> + MX8MN_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x0d6
>> + MX8MN_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x0d6
>> + MX8MN_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x0d6
>> + MX8MN_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x096
>> + >;
>> + };
>> +};
>> --
>> 2.30.2
>>
Regards,
Ariel
Hi Shawn,
On 12/5/21 10:35 PM, Shawn Guo wrote:
> On Tue, Nov 23, 2021 at 12:12:52PM -0300, Ariel D'Alessandro wrote:
>> From: Michael Trimarchi <[email protected]>
>>
>> Add DTS of BSH SMM-M2 SystemMaster.
>>
>> This version comes with:
>> - 128 MiB DDR3 RAM
>> - 256 MiB Nand
>> - wifi
>> - bluetooth
>>
>> Signed-off-by: Ariel D'Alessandro <[email protected]>
>> Signed-off-by: Michael Trimarchi <[email protected]>
>> ---
>> arch/arm/boot/dts/Makefile | 3 +-
>> arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts | 153 +++++++++++++++++++++++
>> 2 files changed, 155 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 0de64f237cd8..e6d4ad497985 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -693,7 +693,8 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
>> imx6ull-phytec-segin-ff-rdk-nand.dtb \
>> imx6ull-phytec-segin-ff-rdk-emmc.dtb \
>> imx6ull-phytec-segin-lc-rdk-nand.dtb \
>> - imx6ulz-14x14-evk.dtb
>> + imx6ulz-14x14-evk.dtb \
>> + imx6ulz-bsh-smm-m2.dts
>> dtb-$(CONFIG_SOC_IMX7D) += \
>> imx7d-cl-som-imx7.dtb \
>> imx7d-colibri-aster.dtb \
>> diff --git a/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts b/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
>> new file mode 100644
>> index 000000000000..9e82860469e3
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
>> @@ -0,0 +1,153 @@
>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
>> +/*
>> + * Copyright (C) 2021 BSH Hausgeraete GmbH
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include <dt-bindings/input/input.h>
>> +#include "imx6ulz.dtsi"
>> +
>> +/ {
>> + model = "BSH SMM M2";
>> + compatible = "bsh,imx6ulz-bsh-smm-m2", "fsl,imx6ull";
>> +
>> + chosen {
>> + stdout-path = &uart4;
>> + };
>> +
>> + usdhc2_pwrseq: usdhc2_pwrseq {
>> + compatible = "mmc-pwrseq-simple";
>> + reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
>> + status = "okay";
>
> "okay" status is generally used to flip "disabled" devices.
Fixed in v3.
>
>> + };
>> +
>> +};
>> +
>> +&uart3 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_bluetooth_uart>;
>> + uart-has-rtscts;
>> +
>
> Unneeded newline.
Fixed in v3.
>
>> + status = "okay";
>> +
>> + bluetooth {
>> + compatible = "brcm,bcm4330-bt";
>> + max-speed = <3000000>;
>> + shutdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
>> + device-wakeup-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
>> + host-wakeup-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
>> + };
>> +};
>> +
>> +&uart4 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_debug_uart>;
>> + status = "okay";
>> +};
>> +
>> +&usbotg1 {
>> + dr_mode = "peripheral";
>> + srp-disable;
>> + hnp-disable;
>> + adp-disable;
>> + status = "okay";
>> +};
>> +
>> +&usbphy1 {
>> + fsl,tx-d-cal = <106>;
>> +};
>> +
>> +&usdhc2 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_wlan>;
>> + bus-width = <4>;
>> + no-1-8-v;
>> + non-removable;
>> + cap-power-off-card;
>> + pm-ignore-notify;
>
> What is this?
Wrong vendor property, removed in v3.
Interesting there're other cases as well:
$ git grep -w pm-ignore-notify
arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts: pm-ignore-notify;
arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi: pm-ignore-notify;
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dts:
pm-ignore-notify;
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts:
pm-ignore-notify;
arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi: pm-ignore-notify;
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi: pm-ignore-notify;
>
>> + keep-power-in-suspend;
>> + wifi-host;
>
> and this?
Wrong vendor property, removed in v3.
>
>> + cap-sdio-irq;
>> + mmc-pwrseq = <&usdhc2_pwrseq>;
>> + status = "okay";
>> +
>> + brcmf: wifi@1 {
>> + reg = <1>;
>> + compatible = "brcm,bcm4329-fmac";
>> + interrupt-parent = <&gpio1>;
>> + interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "host-wake";
>> + };
>> +};
>> +
>> +&wdog1 {
>> + status = "okay";
>> +};
>> +
>> +&gpmi {
>
> Out of alphabetical order.
Fixed in v3.
>
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_gpmi_nand>;
>> + status = "okay";
>
> End property list with status.
Fixed in v3.
>
>> + nand-on-flash-bbt;
>> +};
>> +
>> +&iomuxc {
>> + pinctrl_bluetooth_uart: uart3grp {
>
> Name label and node consistently.
Fixed in v3.
>
>> + fsl,pins = <
>> + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
>> + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b099
>> + MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
>> + MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b099
>> +
>
> Unnecessary newline.
Fixed in v3.
>
>> + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x79 /* BT_REG_ON */
>> + MX6UL_PAD_SD1_CLK__GPIO2_IO17 0x100b1 /* BT_DEV_WAKE out */
>> + MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x1b0b0 /* BT_HOST_WAKE in */
>> + >;
>> + };
>> +
>> + pinctrl_debug_uart: uart4grp {
>> + fsl,pins = <
>> + MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
>> + MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
>> + >;
>> + };
>> +
>> + pinctrl_gpmi_nand: gpmi-nand {
>
> Name node in the same style as others.
Fixed in v3.
>
> Shawn
>
>> + fsl,pins = <
>> + MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
>> + MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
>> + MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
>> + MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
>> + MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
>> + MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
>> + MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
>> + MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
>> + MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
>> + MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
>> + MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
>> + MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
>> + MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
>> + MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
>> + MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
>> + >;
>> + };
>> +
>> + pinctrl_wlan: wlangrp {
>> + fsl,pins = <
>> + MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059
>> + MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10059
>> + MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059
>> + MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059
>> + MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059
>> + MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059
>> +
>> + MX6UL_PAD_SD1_DATA3__GPIO2_IO21 0x79 /* WL_REG_ON */
>> + MX6UL_PAD_UART2_CTS_B__GPIO1_IO22 0x100b1 /* WL_DEV_WAKE - WiFi_GPIO_4 - WiFi FW UART */
>> + MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b1 /* WL_HOST_WAKE - WIFI_GPIO_0 - OOB IRQ */
>> + MX6UL_PAD_ENET1_RX_EN__OSC32K_32K_OUT 0x4001b031 /* OSC 32Khz wifi clk in */
>> + >;
>> + };
>> +};
>> --
>> 2.30.2
>>
Regards,
Ariel
On Wed, Dec 08, 2021 at 03:15:52PM -0300, Ariel D'Alessandro wrote:
> Hi Shawn,
>
> On 12/5/21 10:35 PM, Shawn Guo wrote:
> > On Tue, Nov 23, 2021 at 12:12:52PM -0300, Ariel D'Alessandro wrote:
> >> From: Michael Trimarchi <[email protected]>
> >>
> >> Add DTS of BSH SMM-M2 SystemMaster.
> >>
> >> This version comes with:
> >> - 128 MiB DDR3 RAM
> >> - 256 MiB Nand
> >> - wifi
> >> - bluetooth
> >>
> >> Signed-off-by: Ariel D'Alessandro <[email protected]>
> >> Signed-off-by: Michael Trimarchi <[email protected]>
> >> ---
> >> arch/arm/boot/dts/Makefile | 3 +-
> >> arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts | 153 +++++++++++++++++++++++
> >> 2 files changed, 155 insertions(+), 1 deletion(-)
> >> create mode 100644 arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
> >>
> >> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> >> index 0de64f237cd8..e6d4ad497985 100644
> >> --- a/arch/arm/boot/dts/Makefile
> >> +++ b/arch/arm/boot/dts/Makefile
> >> @@ -693,7 +693,8 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
> >> imx6ull-phytec-segin-ff-rdk-nand.dtb \
> >> imx6ull-phytec-segin-ff-rdk-emmc.dtb \
> >> imx6ull-phytec-segin-lc-rdk-nand.dtb \
> >> - imx6ulz-14x14-evk.dtb
> >> + imx6ulz-14x14-evk.dtb \
> >> + imx6ulz-bsh-smm-m2.dts
> >> dtb-$(CONFIG_SOC_IMX7D) += \
> >> imx7d-cl-som-imx7.dtb \
> >> imx7d-colibri-aster.dtb \
> >> diff --git a/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts b/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
> >> new file mode 100644
> >> index 000000000000..9e82860469e3
> >> --- /dev/null
> >> +++ b/arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
> >> @@ -0,0 +1,153 @@
> >> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> >> +/*
> >> + * Copyright (C) 2021 BSH Hausgeraete GmbH
> >> + */
> >> +
> >> +/dts-v1/;
> >> +
> >> +#include <dt-bindings/input/input.h>
> >> +#include "imx6ulz.dtsi"
> >> +
> >> +/ {
> >> + model = "BSH SMM M2";
> >> + compatible = "bsh,imx6ulz-bsh-smm-m2", "fsl,imx6ull";
> >> +
> >> + chosen {
> >> + stdout-path = &uart4;
> >> + };
> >> +
> >> + usdhc2_pwrseq: usdhc2_pwrseq {
> >> + compatible = "mmc-pwrseq-simple";
> >> + reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
> >> + status = "okay";
> >
> > "okay" status is generally used to flip "disabled" devices.
>
> Fixed in v3.
>
> >
> >> + };
> >> +
> >> +};
> >> +
> >> +&uart3 {
> >> + pinctrl-names = "default";
> >> + pinctrl-0 = <&pinctrl_bluetooth_uart>;
> >> + uart-has-rtscts;
> >> +
> >
> > Unneeded newline.
>
> Fixed in v3.
>
> >
> >> + status = "okay";
> >> +
> >> + bluetooth {
> >> + compatible = "brcm,bcm4330-bt";
> >> + max-speed = <3000000>;
> >> + shutdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
> >> + device-wakeup-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
> >> + host-wakeup-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
> >> + };
> >> +};
> >> +
> >> +&uart4 {
> >> + pinctrl-names = "default";
> >> + pinctrl-0 = <&pinctrl_debug_uart>;
> >> + status = "okay";
> >> +};
> >> +
> >> +&usbotg1 {
> >> + dr_mode = "peripheral";
> >> + srp-disable;
> >> + hnp-disable;
> >> + adp-disable;
> >> + status = "okay";
> >> +};
> >> +
> >> +&usbphy1 {
> >> + fsl,tx-d-cal = <106>;
> >> +};
> >> +
> >> +&usdhc2 {
> >> + #address-cells = <1>;
> >> + #size-cells = <0>;
> >> + pinctrl-names = "default";
> >> + pinctrl-0 = <&pinctrl_wlan>;
> >> + bus-width = <4>;
> >> + no-1-8-v;
> >> + non-removable;
> >> + cap-power-off-card;
> >> + pm-ignore-notify;
> >
> > What is this?
>
> Wrong vendor property, removed in v3.
>
> Interesting there're other cases as well:
>
> $ git grep -w pm-ignore-notify
> arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts: pm-ignore-notify;
> arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi: pm-ignore-notify;
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dts:
> pm-ignore-notify;
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts:
> pm-ignore-notify;
> arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi: pm-ignore-notify;
> arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi: pm-ignore-notify;
Thanks for the reminding! I will fix them.
Shawn
On Tue, Nov 23, 2021 at 12:13 PM Ariel D'Alessandro
<[email protected]> wrote:
>
> From: Michael Trimarchi <[email protected]>
>
> Add DTS of BSH SMM-M2 SystemMaster.
>
> This version comes with:
> - 128 MiB DDR3 RAM
> - 256 MiB Nand
> - wifi
> - bluetooth
>
> Signed-off-by: Ariel D'Alessandro <[email protected]>
> Signed-off-by: Michael Trimarchi <[email protected]>
> ---
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts | 153 +++++++++++++++++++++++
> 2 files changed, 155 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 0de64f237cd8..e6d4ad497985 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -693,7 +693,8 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
> imx6ull-phytec-segin-ff-rdk-nand.dtb \
> imx6ull-phytec-segin-ff-rdk-emmc.dtb \
> imx6ull-phytec-segin-lc-rdk-nand.dtb \
> - imx6ulz-14x14-evk.dtb
> + imx6ulz-14x14-evk.dtb \
> + imx6ulz-bsh-smm-m2.dts
This should be .dtb instead of .dts