2019-10-11 08:39:58

by Anson Huang

Subject: [PATCH] clk: imx7ulp: Correct system clock source option #7

In the latest reference manual Rev.0,06/2019, the SCG1's system
clock source option #7 is no longer from upll, it is reserved,
update clock driver accordingly.

Fixes: b1260067ac3d ("clk: imx: add imx7ulp clk driver")
Signed-off-by: Anson Huang <[email protected]>
---
drivers/clk/imx/clk-imx7ulp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imx7ulp.c b/drivers/clk/imx/clk-imx7ulp.c
index 2022d9b..b2c5866 100644
--- a/drivers/clk/imx/clk-imx7ulp.c
+++ b/drivers/clk/imx/clk-imx7ulp.c
@@ -24,7 +24,7 @@ static const char * const spll_pfd_sels[] = { "spll_pfd0", "spll_pfd1", "spll_pf
static const char * const spll_sels[] = { "spll", "spll_pfd_sel", };
static const char * const apll_pfd_sels[] = { "apll_pfd0", "apll_pfd1", "apll_pfd2", "apll_pfd3", };
static const char * const apll_sels[] = { "apll", "apll_pfd_sel", };
-static const char * const scs_sels[] = { "dummy", "sosc", "sirc", "firc", "dummy", "apll_sel", "spll_sel", "upll", };
+static const char * const scs_sels[] = { "dummy", "sosc", "sirc", "firc", "dummy", "apll_sel", "spll_sel", "dummy", };
static const char * const ddr_sels[] = { "apll_pfd_sel", "upll", };
static const char * const nic_sels[] = { "firc", "ddr_clk", };
static const char * const periph_plat_sels[] = { "dummy", "nic1_bus_clk", "nic1_clk", "ddr_clk", "apll_pfd2", "apll_pfd1", "apll_pfd0", "upll", };
--
2.7.4

2019-10-11 11:17:28

by Fabio Estevam

Subject: Re: [PATCH] clk: imx7ulp: Correct system clock source option #7

On Fri, Oct 11, 2019 at 5:39 AM Anson Huang <[email protected]> wrote:
>
> In the latest reference manual Rev.0,06/2019, the SCG1's system

This should be SCS instead of SCG1.

> clock source option #7 is no longer from upll, it is reserved,
> update clock driver accordingly.
>
> Fixes: b1260067ac3d ("clk: imx: add imx7ulp clk driver")
> Signed-off-by: Anson Huang <[email protected]>

Reviewed-by: Fabio Estevam <[email protected]>

2019-10-12 01:05:56

by Anson Huang

Subject: RE: [PATCH] clk: imx7ulp: Correct system clock source option #7

Hi, Fabio

> On Fri, Oct 11, 2019 at 5:39 AM Anson Huang <[email protected]>
> wrote:
> >
> > In the latest reference manual Rev.0,06/2019, the SCG1's system
>
> This should be SCS instead of SCG1.

The reference states SCG system clock, SCS stands for system clock source, so I think
it is actually meaning SCG1's system clock source????

Selects the SCG system clock.
0000b - Reserved
0001b - System OSC (SOSC_CLK)
0010b - Slow IRC (SIRC_CLK)
0011b - Fast IRC (FIRC_CLK)
0100b - Reserved
0101b - Auxiliary PLL (APLL_CLK)
0110b - System PLL (SPLL_CLK)
0111b - Reserved

>
> > clock source option #7 is no longer from upll, it is reserved, update
> > clock driver accordingly.
> >
> > Fixes: b1260067ac3d ("clk: imx: add imx7ulp clk driver")
> > Signed-off-by: Anson Huang <[email protected]>
>
> Reviewed-by: Fabio Estevam <[email protected]>

Thanks,
Anson

2019-10-12 12:48:42

by Fabio Estevam

Subject: Re: [PATCH] clk: imx7ulp: Correct system clock source option #7

Hi Anson,

On Fri, Oct 11, 2019 at 10:05 PM Anson Huang <[email protected]> wrote:

> The reference states SCG system clock, SCS stands for system clock source, so I think
> it is actually meaning SCG1's system clock source
>
> Selects the SCG system clock.

Yes, SCG is the name used in the Reference Manual and also the driver
calls it scs_sels,
so it would be better to keep consistency and spell SCG in the commit log.

Thanks