According to the Rockchip vendor tree the PMU interrupt number is
76, so fix it accordingly.
Signed-off-by: Otavio Salvador <[email protected]>
Tested-by: Fabio Berton <[email protected]>
---
Changes in v2:
- fixup commit signed-off-by
- fixup commit log
arch/arm/boot/dts/rv1108.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 11ab86d6c4a5..611f2fe8e56c 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -67,7 +67,7 @@
arm-pmu {
compatible = "arm,cortex-a7-pmu";
- interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
};
timer {
--
2.19.2
It is not correct to assign the 24MHz clock oscillator to the GPIO
ports.
Fix it by assigning the proper GPIO clocks instead.
Signed-off-by: Otavio Salvador <[email protected]>
Tested-by: Fabio Berton <[email protected]>
---
Changes in v2:
- fixup commit signed-off-by
- fixup commit log
arch/arm/boot/dts/rv1108.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 611f2fe8e56c..300de8e1475b 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -565,7 +565,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x20030000 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&xin24m>;
+ clocks = <&cru PCLK_GPIO0_PMU>;
gpio-controller;
#gpio-cells = <2>;
@@ -578,7 +578,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x10310000 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&xin24m>;
+ clocks = <&cru PCLK_GPIO1>;
gpio-controller;
#gpio-cells = <2>;
@@ -591,7 +591,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x10320000 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&xin24m>;
+ clocks = <&cru PCLK_GPIO2>;
gpio-controller;
#gpio-cells = <2>;
@@ -604,7 +604,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x10330000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&xin24m>;
+ clocks = <&cru PCLK_GPIO3>;
gpio-controller;
#gpio-cells = <2>;
--
2.19.2
Add support for the internal timer peripheral on RV1108.
Signed-off-by: Otavio Salvador <[email protected]>
---
Changes in v2:
- add binding to doc
- fixup commit log
.../devicetree/bindings/timer/rockchip,rk-timer.txt | 1 +
arch/arm/boot/dts/rv1108.dtsi | 8 ++++++++
2 files changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/rockchip,rk-timer.txt b/Documentation/devicetree/bindings/timer/rockchip,rk-timer.txt
index 16a5f4577a61..d65fdce7c7f0 100644
--- a/Documentation/devicetree/bindings/timer/rockchip,rk-timer.txt
+++ b/Documentation/devicetree/bindings/timer/rockchip,rk-timer.txt
@@ -2,6 +2,7 @@ Rockchip rk timer
Required properties:
- compatible: should be:
+ "rockchip,rv1108-timer", "rockchip,rk3288-timer": for Rockchip RV1108
"rockchip,rk3036-timer", "rockchip,rk3288-timer": for Rockchip RK3036
"rockchip,rk3066-timer", "rockchip,rk3288-timer": for Rockchip RK3066
"rockchip,rk3188-timer", "rockchip,rk3288-timer": for Rockchip RK3188
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 23ac4b10d690..9683f3b00d9d 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -293,6 +293,14 @@
};
};
+ timer: timer@10350000 {
+ compatible = "rockchip,rv1108-timer", "rockchip,rk3288-timer";
+ reg = <0x10350000 0x20>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&xin24m>, <&cru PCLK_TIMER>;
+ clock-names = "timer", "pclk";
+ };
+
watchdog: wdt@10360000 {
compatible = "snps,dw-wdt";
reg = <0x10360000 0x100>;
--
2.19.2
Pass the 'dmas' property to the UART ports so that DMA can
be supported.
Signed-off-by: Otavio Salvador <[email protected]>
Tested-by: Fabio Berton <[email protected]>
---
Changes in v2:
- fixup commit signed-off-by
- fixup commit log
arch/arm/boot/dts/rv1108.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 300de8e1475b..23ac4b10d690 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -116,6 +116,8 @@
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ dmas = <&pdma 6>, <&pdma 7>;
+ #dma-cells = <2>;
clock-frequency = <24000000>;
clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
clock-names = "baudclk", "apb_pclk";
@@ -130,6 +132,8 @@
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ dmas = <&pdma 4>, <&pdma 5>;
+ #dma-cells = <2>;
clock-frequency = <24000000>;
clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
clock-names = "baudclk", "apb_pclk";
@@ -144,6 +148,8 @@
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ dmas = <&pdma 2>, <&pdma 3>;
+ #dma-cells = <2>;
clock-frequency = <24000000>;
clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
clock-names = "baudclk", "apb_pclk";
--
2.19.2
Am Montag, 26. November 2018, 18:35:03 CET schrieb Otavio Salvador:
> According to the Rockchip vendor tree the PMU interrupt number is
> 76, so fix it accordingly.
>
> Signed-off-by: Otavio Salvador <[email protected]>
> Tested-by: Fabio Berton <[email protected]>
applied for 4.21
Thanks
Heiko
Am Montag, 26. November 2018, 18:35:04 CET schrieb Otavio Salvador:
> It is not correct to assign the 24MHz clock oscillator to the GPIO
> ports.
>
> Fix it by assigning the proper GPIO clocks instead.
>
> Signed-off-by: Otavio Salvador <[email protected]>
> Tested-by: Fabio Berton <[email protected]>
applied for 4.21
Thanks
Heiko
Am Montag, 26. November 2018, 18:35:05 CET schrieb Otavio Salvador:
> Pass the 'dmas' property to the UART ports so that DMA can
> be supported.
>
> Signed-off-by: Otavio Salvador <[email protected]>
> Tested-by: Fabio Berton <[email protected]>
applied for 4.21 after moving the dma-* below the clock*
alphabetical ordering and such :-)
Thanks
Heiko
Am Montag, 26. November 2018, 18:35:06 CET schrieb Otavio Salvador:
> Add support for the internal timer peripheral on RV1108.
>
> Signed-off-by: Otavio Salvador <[email protected]>
> ---
looks good, but due to the newly added compatible
I'll let this sit a bit longer to give Rob a chance to add a
Review-tag or so.
Heiko
>
> Changes in v2:
> - add binding to doc
> - fixup commit log
>
> .../devicetree/bindings/timer/rockchip,rk-timer.txt | 1 +
> arch/arm/boot/dts/rv1108.dtsi | 8 ++++++++
> 2 files changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/timer/rockchip,rk-timer.txt b/Documentation/devicetree/bindings/timer/rockchip,rk-timer.txt
> index 16a5f4577a61..d65fdce7c7f0 100644
> --- a/Documentation/devicetree/bindings/timer/rockchip,rk-timer.txt
> +++ b/Documentation/devicetree/bindings/timer/rockchip,rk-timer.txt
> @@ -2,6 +2,7 @@ Rockchip rk timer
>
> Required properties:
> - compatible: should be:
> + "rockchip,rv1108-timer", "rockchip,rk3288-timer": for Rockchip RV1108
> "rockchip,rk3036-timer", "rockchip,rk3288-timer": for Rockchip RK3036
> "rockchip,rk3066-timer", "rockchip,rk3288-timer": for Rockchip RK3066
> "rockchip,rk3188-timer", "rockchip,rk3288-timer": for Rockchip RK3188
> diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
> index 23ac4b10d690..9683f3b00d9d 100644
> --- a/arch/arm/boot/dts/rv1108.dtsi
> +++ b/arch/arm/boot/dts/rv1108.dtsi
> @@ -293,6 +293,14 @@
> };
> };
>
> + timer: timer@10350000 {
> + compatible = "rockchip,rv1108-timer", "rockchip,rk3288-timer";
> + reg = <0x10350000 0x20>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&xin24m>, <&cru PCLK_TIMER>;
> + clock-names = "timer", "pclk";
> + };
> +
> watchdog: wdt@10360000 {
> compatible = "snps,dw-wdt";
> reg = <0x10360000 0x100>;
>
Hello Heiko,
On Mon, Nov 26, 2018 at 10:29 PM Heiko Stuebner <[email protected]> wrote:
> Am Montag, 26. November 2018, 18:35:06 CET schrieb Otavio Salvador:
> > Add support for the internal timer peripheral on RV1108.
> >
> > Signed-off-by: Otavio Salvador <[email protected]>
> > ---
>
> looks good, but due to the newly added compatible
> I'll let this sit a bit longer to give Rob a chance to add a
> Review-tag or so.
Sure, it is fine. Thanks for your support.
--
Otavio Salvador O.S. Systems
http://www.ossystems.com.br http://code.ossystems.com.br
Mobile: +55 (53) 9 9981-7854 Mobile: +1 (347) 903-9750
Am Montag, 26. November 2018, 18:35:06 CET schrieb Otavio Salvador:
> Add support for the internal timer peripheral on RV1108.
>
> Signed-off-by: Otavio Salvador <[email protected]>
applied for 4.21
Thanks
Heiko