2023-11-23 16:18:06

by Neil Armstrong

[permalink] [raw]
Subject: [PATCH v2 0/2] pmdomain: amlogic: meson-ee-pwrc: add ISP power domain

Add MIPI ISP power domain bindings and entries for the ISP power domain
found in the Amlogic G12B SoC.

Signed-off-by: Neil Armstrong <[email protected]>
---
Changes in v2:
- Correctly use REG1 for second g12a_pwrc_mem_isp cell
- Link to v1: https://lore.kernel.org/r/20231114-topic-amlogic-upstream-isp-pmdomain-v1-0-f01e6fca67a0@linaro.org

---
Neil Armstrong (2):
dt-bindings: power: meson-g12a-power: document ISP power domain
pmdomain: amlogic: meson-ee-pwrc: add support for G12A ISP power domain

drivers/pmdomain/amlogic/meson-ee-pwrc.c | 16 ++++++++++++++++
include/dt-bindings/power/meson-g12a-power.h | 1 +
2 files changed, 17 insertions(+)
---
base-commit: 5cd631a52568a18b12fd2563418985c8cb63e4b0
change-id: 20231114-topic-amlogic-upstream-isp-pmdomain-f7502561f911

Best regards,
--
Neil Armstrong <[email protected]>


2023-11-23 16:18:07

by Neil Armstrong

[permalink] [raw]
Subject: [PATCH v2 1/2] dt-bindings: power: meson-g12a-power: document ISP power domain

Add MIPI ISP power domain ID to the G12A Power domains bindings header

Signed-off-by: Neil Armstrong <[email protected]>
---
include/dt-bindings/power/meson-g12a-power.h | 1 +
1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h
index 44ec0c50e340..01fd0ac4dd08 100644
--- a/include/dt-bindings/power/meson-g12a-power.h
+++ b/include/dt-bindings/power/meson-g12a-power.h
@@ -10,5 +10,6 @@
#define PWRC_G12A_VPU_ID 0
#define PWRC_G12A_ETH_ID 1
#define PWRC_G12A_NNA_ID 2
+#define PWRC_G12A_ISP_ID 3

#endif

--
2.34.1

2023-11-23 16:18:20

by Neil Armstrong

[permalink] [raw]
Subject: [PATCH v2 2/2] pmdomain: amlogic: meson-ee-pwrc: add support for G12A ISP power domain

Add entries for the ISP power domain found in the Amlogic G12B SoC

Signed-off-by: Neil Armstrong <[email protected]>
---
drivers/pmdomain/amlogic/meson-ee-pwrc.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)

diff --git a/drivers/pmdomain/amlogic/meson-ee-pwrc.c b/drivers/pmdomain/amlogic/meson-ee-pwrc.c
index 0dd71cd814c5..fcec6eb610e4 100644
--- a/drivers/pmdomain/amlogic/meson-ee-pwrc.c
+++ b/drivers/pmdomain/amlogic/meson-ee-pwrc.c
@@ -47,6 +47,8 @@

#define G12A_HHI_NANOQ_MEM_PD_REG0 (0x43 << 2)
#define G12A_HHI_NANOQ_MEM_PD_REG1 (0x44 << 2)
+#define G12A_HHI_ISP_MEM_PD_REG0 (0x45 << 2)
+#define G12A_HHI_ISP_MEM_PD_REG1 (0x46 << 2)

struct meson_ee_pwrc;
struct meson_ee_pwrc_domain;
@@ -115,6 +117,13 @@ static struct meson_ee_pwrc_top_domain g12a_pwrc_nna = {
.iso_mask = BIT(16) | BIT(17),
};

+static struct meson_ee_pwrc_top_domain g12a_pwrc_isp = {
+ .sleep_reg = GX_AO_RTI_GEN_PWR_SLEEP0,
+ .sleep_mask = BIT(18) | BIT(19),
+ .iso_reg = GX_AO_RTI_GEN_PWR_ISO0,
+ .iso_mask = BIT(18) | BIT(19),
+};
+
/* Memory PD Domains */

#define VPU_MEMPD(__reg) \
@@ -231,6 +240,11 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_nna[] = {
{ G12A_HHI_NANOQ_MEM_PD_REG1, GENMASK(31, 0) },
};

+static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_isp[] = {
+ { G12A_HHI_ISP_MEM_PD_REG0, GENMASK(31, 0) },
+ { G12A_HHI_ISP_MEM_PD_REG1, GENMASK(31, 0) },
+};
+
#define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks) \
{ \
.name = __name, \
@@ -269,6 +283,8 @@ static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = {
[PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson_pwrc_mem_eth),
[PWRC_G12A_NNA_ID] = TOP_PD("NNA", &g12a_pwrc_nna, g12a_pwrc_mem_nna,
pwrc_ee_is_powered_off),
+ [PWRC_G12A_ISP_ID] = TOP_PD("ISP", &g12a_pwrc_isp, g12a_pwrc_mem_isp,
+ pwrc_ee_is_powered_off),
};

static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = {

--
2.34.1

2023-11-23 16:20:06

by Neil Armstrong

[permalink] [raw]
Subject: Re: [PATCH v2 1/2] dt-bindings: power: meson-g12a-power: document ISP power domain

On 23/11/2023 17:17, Neil Armstrong wrote:
> Add MIPI ISP power domain ID to the G12A Power domains bindings header
>
> Signed-off-by: Neil Armstrong <[email protected]>
> ---
> include/dt-bindings/power/meson-g12a-power.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h
> index 44ec0c50e340..01fd0ac4dd08 100644
> --- a/include/dt-bindings/power/meson-g12a-power.h
> +++ b/include/dt-bindings/power/meson-g12a-power.h
> @@ -10,5 +10,6 @@
> #define PWRC_G12A_VPU_ID 0
> #define PWRC_G12A_ETH_ID 1
> #define PWRC_G12A_NNA_ID 2
> +#define PWRC_G12A_ISP_ID 3
>
> #endif
>

I forgot:
Reviewed-by: Daniel Scally <[email protected]>
Tested-by: Daniel Scally <[email protected]>
Acked-by: Conor Dooley <[email protected]>

If needed I can send a v4 with those added...

Neil

2023-11-23 16:39:19

by Ulf Hansson

[permalink] [raw]
Subject: Re: [PATCH v2 1/2] dt-bindings: power: meson-g12a-power: document ISP power domain

On Thu, 23 Nov 2023 at 17:19, Neil Armstrong <[email protected]> wrote:
>
> On 23/11/2023 17:17, Neil Armstrong wrote:
> > Add MIPI ISP power domain ID to the G12A Power domains bindings header
> >
> > Signed-off-by: Neil Armstrong <[email protected]>
> > ---
> > include/dt-bindings/power/meson-g12a-power.h | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h
> > index 44ec0c50e340..01fd0ac4dd08 100644
> > --- a/include/dt-bindings/power/meson-g12a-power.h
> > +++ b/include/dt-bindings/power/meson-g12a-power.h
> > @@ -10,5 +10,6 @@
> > #define PWRC_G12A_VPU_ID 0
> > #define PWRC_G12A_ETH_ID 1
> > #define PWRC_G12A_NNA_ID 2
> > +#define PWRC_G12A_ISP_ID 3
> >
> > #endif
> >
>
> I forgot:
> Reviewed-by: Daniel Scally <[email protected]>
> Tested-by: Daniel Scally <[email protected]>
> Acked-by: Conor Dooley <[email protected]>
>
> If needed I can send a v4 with those added...

No problem, I will add the tags when applying.

Kind regards
Uffe

2023-11-30 11:31:30

by Ulf Hansson

[permalink] [raw]
Subject: Re: [PATCH v2 1/2] dt-bindings: power: meson-g12a-power: document ISP power domain

On Thu, 23 Nov 2023 at 17:17, Neil Armstrong <[email protected]> wrote:
>
> Add MIPI ISP power domain ID to the G12A Power domains bindings header
>
> Signed-off-by: Neil Armstrong <[email protected]>

Applied for next and the immutable dt branch, thanks!

Kind regards
Uffe


> ---
> include/dt-bindings/power/meson-g12a-power.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h
> index 44ec0c50e340..01fd0ac4dd08 100644
> --- a/include/dt-bindings/power/meson-g12a-power.h
> +++ b/include/dt-bindings/power/meson-g12a-power.h
> @@ -10,5 +10,6 @@
> #define PWRC_G12A_VPU_ID 0
> #define PWRC_G12A_ETH_ID 1
> #define PWRC_G12A_NNA_ID 2
> +#define PWRC_G12A_ISP_ID 3
>
> #endif
>
> --
> 2.34.1
>

2023-11-30 11:32:22

by Ulf Hansson

[permalink] [raw]
Subject: Re: [PATCH v2 2/2] pmdomain: amlogic: meson-ee-pwrc: add support for G12A ISP power domain

On Thu, 23 Nov 2023 at 17:17, Neil Armstrong <[email protected]> wrote:
>
> Add entries for the ISP power domain found in the Amlogic G12B SoC
>
> Signed-off-by: Neil Armstrong <[email protected]>

Applied for next, thanks!

Kind regards
Uffe


> ---
> drivers/pmdomain/amlogic/meson-ee-pwrc.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/pmdomain/amlogic/meson-ee-pwrc.c b/drivers/pmdomain/amlogic/meson-ee-pwrc.c
> index 0dd71cd814c5..fcec6eb610e4 100644
> --- a/drivers/pmdomain/amlogic/meson-ee-pwrc.c
> +++ b/drivers/pmdomain/amlogic/meson-ee-pwrc.c
> @@ -47,6 +47,8 @@
>
> #define G12A_HHI_NANOQ_MEM_PD_REG0 (0x43 << 2)
> #define G12A_HHI_NANOQ_MEM_PD_REG1 (0x44 << 2)
> +#define G12A_HHI_ISP_MEM_PD_REG0 (0x45 << 2)
> +#define G12A_HHI_ISP_MEM_PD_REG1 (0x46 << 2)
>
> struct meson_ee_pwrc;
> struct meson_ee_pwrc_domain;
> @@ -115,6 +117,13 @@ static struct meson_ee_pwrc_top_domain g12a_pwrc_nna = {
> .iso_mask = BIT(16) | BIT(17),
> };
>
> +static struct meson_ee_pwrc_top_domain g12a_pwrc_isp = {
> + .sleep_reg = GX_AO_RTI_GEN_PWR_SLEEP0,
> + .sleep_mask = BIT(18) | BIT(19),
> + .iso_reg = GX_AO_RTI_GEN_PWR_ISO0,
> + .iso_mask = BIT(18) | BIT(19),
> +};
> +
> /* Memory PD Domains */
>
> #define VPU_MEMPD(__reg) \
> @@ -231,6 +240,11 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_nna[] = {
> { G12A_HHI_NANOQ_MEM_PD_REG1, GENMASK(31, 0) },
> };
>
> +static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_isp[] = {
> + { G12A_HHI_ISP_MEM_PD_REG0, GENMASK(31, 0) },
> + { G12A_HHI_ISP_MEM_PD_REG1, GENMASK(31, 0) },
> +};
> +
> #define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks) \
> { \
> .name = __name, \
> @@ -269,6 +283,8 @@ static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = {
> [PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson_pwrc_mem_eth),
> [PWRC_G12A_NNA_ID] = TOP_PD("NNA", &g12a_pwrc_nna, g12a_pwrc_mem_nna,
> pwrc_ee_is_powered_off),
> + [PWRC_G12A_ISP_ID] = TOP_PD("ISP", &g12a_pwrc_isp, g12a_pwrc_mem_isp,
> + pwrc_ee_is_powered_off),
> };
>
> static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = {
>
> --
> 2.34.1
>