From: Stefan Chulski <[email protected]>
This patch enables eth0 10G interface on CN9130-DB paltforms.
Signed-off-by: Stefan Chulski <[email protected]>
Signed-off-by: Konstantin Porotchkin <[email protected]>
---
arch/arm64/boot/dts/marvell/cn9130-db.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
index 8de3a552b806..97c74b81fd78 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
@@ -125,7 +125,7 @@
/* SLM-1521-V2, CON9 */
&cp0_eth0 {
- status = "disabled";
+ status = "okay";
phy-mode = "10gbase-kr";
/* Generic PHY, providing serdes lanes */
phys = <&cp0_comphy4 0>;
--
2.17.1
Hi,
wt., 9 lut 2021 o 14:47 <[email protected]> napisaĆ(a):
>
> From: Stefan Chulski <[email protected]>
>
> This patch enables eth0 10G interface on CN9130-DB paltforms.
>
> Signed-off-by: Stefan Chulski <[email protected]>
> Signed-off-by: Konstantin Porotchkin <[email protected]>
> ---
> arch/arm64/boot/dts/marvell/cn9130-db.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
> index 8de3a552b806..97c74b81fd78 100644
> --- a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
> +++ b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
> @@ -125,7 +125,7 @@
>
> /* SLM-1521-V2, CON9 */
> &cp0_eth0 {
> - status = "disabled";
> + status = "okay";
> phy-mode = "10gbase-kr";
> /* Generic PHY, providing serdes lanes */
> phys = <&cp0_comphy4 0>;
> --
> 2.17.1
>
You can add my:
Tested-by: Marcin Wojtas <[email protected]>
Please do the same for cp1_eth0?
Best regards,
Marcin