2019-11-18 12:39:10

by Manikandan

[permalink] [raw]
Subject: [PATCH] ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC

The Yosemite V2 is a facebook multi-node server
platform that host four OCP server. The BMC
in the Yosemite V2 platorm based on AST2500 SoC.

This patch adds linux device tree entry related to
Yosemite V2 specific devices connected to BMC SoC.

Signed-off-by: manikandan-e <[email protected]>
---
.../boot/dts/aspeed-bmc-facebook-yosemitev2.dts | 170 +++++++++++++++++++++
1 file changed, 170 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts

diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
new file mode 100644
index 0000000..46a285a
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 Facebook Inc.
+// Author:
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+ model = "Facebook Yosemitev2 BMC";
+ compatible = "facebook,yosemitev2-bmc", "aspeed,ast2500";
+ aliases {
+ serial0 = &uart1;
+ serial4 = &uart5;
+ };
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200 earlyprintk";
+ };
+
+ memory@80000000 {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ iio-hwmon {
+ // VOLATAGE SENSOR
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0> , <&adc 1> , <&adc 2> , <&adc 3> ,
+ <&adc 4> , <&adc 5> , <&adc 6> , <&adc 7> ,
+ <&adc 8> , <&adc 9> , <&adc 10>, <&adc 11> ,
+ <&adc 12> , <&adc 13> , <&adc 14> , <&adc 15> ;
+ };
+};
+
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+#include "openbmc-flash-layout.dtsi"
+ };
+};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default>;
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "pnor";
+ };
+};
+
+&lpc_snoop {
+ status = "okay";
+ snoop-ports = <0x80>;
+};
+
+&lpc_ctrl {
+ // Enable lpc clock
+ status = "okay";
+};
+
+&vuart {
+ // VUART Host Console
+ status = "okay";
+};
+
+&uart1 {
+ // Host Console
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default>;
+};
+
+&uart2 {
+ // SoL Host Console
+ status = "okay";
+};
+
+&uart3 {
+ // SoL BMC Console
+ status = "okay";
+};
+
+&uart5 {
+ // BMC Console
+ status = "okay";
+};
+
+&mac0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii1_default>;
+ use-ncsi;
+};
+
+&adc {
+ status = "okay";
+};
+
+&i2c8 {
+ status = "okay";
+ //FRU EEPROM
+ eeprom@51 {
+ compatible = "atmel,24c64";
+ reg = <0x51>;
+ pagesize = <32>;
+ };
+};
+
+&i2c9 {
+ status = "okay";
+ tmp421@4e {
+ //INLET TEMP
+ compatible = "ti,tmp421";
+ reg = <0x4e>;
+ };
+ //OUTLET TEMP
+ tmp421@4f {
+ compatible = "ti,tmp421";
+ reg = <0x4f>;
+ };
+};
+
+&i2c10 {
+ status = "okay";
+ //HSC
+ adm1278@40 {
+ compatible = "adi,adm1278";
+ reg = <0x40>;
+ };
+};
+
+&i2c11 {
+ status = "okay";
+ //MEZZ_TEMP_SENSOR
+ tmp421@1f {
+ compatible = "ti,tmp421";
+ reg = <0x1f>;
+ };
+};
+
+&i2c12 {
+ status = "okay";
+ //MEZZ_FRU
+ eeprom@51 {
+ compatible = "atmel,24c64";
+ reg = <0x51>;
+ pagesize = <32>;
+ };
+};
+
+&pwm_tacho {
+ status = "okay";
+ //FSC
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
+ fan@0 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x00>;
+ };
+ fan@1 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x02>;
+ };
+};
--
2.7.4


2019-11-20 05:57:57

by Andrew Jeffery

[permalink] [raw]
Subject: Re: [PATCH] ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC



On Mon, 18 Nov 2019, at 23:07, manikandan-e wrote:
> The Yosemite V2 is a facebook multi-node server
> platform that host four OCP server. The BMC
> in the Yosemite V2 platorm based on AST2500 SoC.
>
> This patch adds linux device tree entry related to
> Yosemite V2 specific devices connected to BMC SoC.
>
> Signed-off-by: manikandan-e <[email protected]>
> ---
> .../boot/dts/aspeed-bmc-facebook-yosemitev2.dts | 170 +++++++++++++++++++++
> 1 file changed, 170 insertions(+)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> new file mode 100644
> index 0000000..46a285a
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> @@ -0,0 +1,170 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// Copyright (c) 2018 Facebook Inc.
> +// Author:
> +/dts-v1/;
> +
> +#include "aspeed-g5.dtsi"
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +
> +/ {
> + model = "Facebook Yosemitev2 BMC";
> + compatible = "facebook,yosemitev2-bmc", "aspeed,ast2500";
> + aliases {
> + serial0 = &uart1;
> + serial4 = &uart5;
> + };
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=ttyS4,115200 earlyprintk";
> + };
> +
> + memory@80000000 {
> + reg = <0x80000000 0x20000000>;
> + };
> +
> + iio-hwmon {
> + // VOLATAGE SENSOR
> + compatible = "iio-hwmon";
> + io-channels = <&adc 0> , <&adc 1> , <&adc 2> , <&adc 3> ,
> + <&adc 4> , <&adc 5> , <&adc 6> , <&adc 7> ,
> + <&adc 8> , <&adc 9> , <&adc 10>, <&adc 11> ,
> + <&adc 12> , <&adc 13> , <&adc 14> , <&adc 15> ;
> + };
> +};
> +
> +&fmc {
> + status = "okay";
> + flash@0 {
> + status = "okay";
> + m25p,fast-read;
> +#include "openbmc-flash-layout.dtsi"
> + };
> +};
> +
> +&spi1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi1_default>;
> + flash@0 {
> + status = "okay";
> + m25p,fast-read;
> + label = "pnor";
> + };
> +};
> +
> +&lpc_snoop {
> + status = "okay";
> + snoop-ports = <0x80>;
> +};
> +
> +&lpc_ctrl {
> + // Enable lpc clock
> + status = "okay";

Something I'm intending to fix in the devicetrees using LPC is to hog
the pins in the pinctrl node. You should consider doing the same here.

> +};
> +
> +&vuart {
> + // VUART Host Console
> + status = "okay";
> +};
> +
> +&uart1 {
> + // Host Console
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_txd1_default
> + &pinctrl_rxd1_default>;
> +};
> +
> +&uart2 {
> + // SoL Host Console
> + status = "okay";

Also needs pinctrl configuration.

> +};
> +
> +&uart3 {
> + // SoL BMC Console
> + status = "okay";

Again needs pinctrl.

> +};
> +
> +&uart5 {
> + // BMC Console
> + status = "okay";
> +};
> +
> +&mac0 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rmii1_default>;
> + use-ncsi;
> +};
> +
> +&adc {
> + status = "okay";

Strongly suggest adding the pinctrl properties here to ensure
exclusive access for the ADC pins.

Otherwise it looks reasonable.

Andrew

2019-11-20 06:52:00

by Vijay Khemka

[permalink] [raw]
Subject: Re: [PATCH] ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC



On 11/19/19, 9:56 PM, "Linux-aspeed on behalf of Andrew Jeffery" <[email protected] on behalf of [email protected]> wrote:



On Mon, 18 Nov 2019, at 23:07, manikandan-e wrote:
> The Yosemite V2 is a facebook multi-node server
> platform that host four OCP server. The BMC
> in the Yosemite V2 platorm based on AST2500 SoC.
>
> This patch adds linux device tree entry related to
> Yosemite V2 specific devices connected to BMC SoC.
>
> Signed-off-by: manikandan-e <[email protected]>
> ---
> .../boot/dts/aspeed-bmc-facebook-yosemitev2.dts | 170 +++++++++++++++++++++
> 1 file changed, 170 insertions(+)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> new file mode 100644
> index 0000000..46a285a
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> @@ -0,0 +1,170 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// Copyright (c) 2018 Facebook Inc.
> +// Author:
> +/dts-v1/;
> +
> +#include "aspeed-g5.dtsi"
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +
> +/ {
> + model = "Facebook Yosemitev2 BMC";
> + compatible = "facebook,yosemitev2-bmc", "aspeed,ast2500";
> + aliases {
> + serial0 = &uart1;
> + serial4 = &uart5;
> + };
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=ttyS4,115200 earlyprintk";
> + };
> +
> + memory@80000000 {
> + reg = <0x80000000 0x20000000>;
> + };
> +
> + iio-hwmon {
> + // VOLATAGE SENSOR
> + compatible = "iio-hwmon";
> + io-channels = <&adc 0> , <&adc 1> , <&adc 2> , <&adc 3> ,
> + <&adc 4> , <&adc 5> , <&adc 6> , <&adc 7> ,
> + <&adc 8> , <&adc 9> , <&adc 10>, <&adc 11> ,
> + <&adc 12> , <&adc 13> , <&adc 14> , <&adc 15> ;
> + };
> +};
> +
> +&fmc {
> + status = "okay";
> + flash@0 {
> + status = "okay";
> + m25p,fast-read;
> +#include "openbmc-flash-layout.dtsi"
> + };
> +};
> +
> +&spi1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi1_default>;
> + flash@0 {
> + status = "okay";
> + m25p,fast-read;
> + label = "pnor";
> + };
> +};
> +
> +&lpc_snoop {
> + status = "okay";
> + snoop-ports = <0x80>;
> +};
No lpc in Yosemite so please remove.

> +
> +&lpc_ctrl {
> + // Enable lpc clock
> + status = "okay";
Same here remove.

Something I'm intending to fix in the devicetrees using LPC is to hog
the pins in the pinctrl node. You should consider doing the same here.

> +};
> +
> +&vuart {
> + // VUART Host Console
> + status = "okay";
> +};
No Vuart.

> +
> +&uart1 {
> + // Host Console
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_txd1_default
> + &pinctrl_rxd1_default>;
> +};
> +
> +&uart2 {
> + // SoL Host Console
> + status = "okay";

uart1-4 are all assigned for 4 multiple hosts so define accordingly.

Also needs pinctrl configuration.

> +};
> +
> +&uart3 {
> + // SoL BMC Console
> + status = "okay";

Again needs pinctrl.

> +};
> +
> +&uart5 {
> + // BMC Console
> + status = "okay";
> +};
> +
> +&mac0 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rmii1_default>;
> + use-ncsi;
> +};
> +
> +&adc {
> + status = "okay";

Strongly suggest adding the pinctrl properties here to ensure
exclusive access for the ADC pins.

Otherwise it looks reasonable.

Andrew


2019-11-21 07:52:47

by Manikandan

[permalink] [raw]
Subject: Re: [PATCH] ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC


Hi Andrew/Vijay,

Thanks for the review .

The following changes done in dts and tested in Facebook Yosemite V2 BMC platform,
1. LPC feature removed as not supported .
2. VUART feature removed as not supported.
3. Host UART feature removed as not in the current scope.
4. ADC pinctrl details added in dts.

Thanks
Mani.E

On Wed, Nov 20, 2019 at 06:50:15AM +0000, Vijay Khemka wrote:
>
>
> On 11/19/19, 9:56 PM, "Linux-aspeed on behalf of Andrew Jeffery" <[email protected] on behalf of [email protected]> wrote:
>
>
>
> On Mon, 18 Nov 2019, at 23:07, manikandan-e wrote:
> > The Yosemite V2 is a facebook multi-node server
> > platform that host four OCP server. The BMC
> > in the Yosemite V2 platorm based on AST2500 SoC.
> >
> > This patch adds linux device tree entry related to
> > Yosemite V2 specific devices connected to BMC SoC.
> >
> > Signed-off-by: manikandan-e <[email protected]>
> > ---
> > .../boot/dts/aspeed-bmc-facebook-yosemitev2.dts | 170 +++++++++++++++++++++
> > 1 file changed, 170 insertions(+)
> > create mode 100644 arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> >
> > diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> > b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> > new file mode 100644
> > index 0000000..46a285a
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> > @@ -0,0 +1,170 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +// Copyright (c) 2018 Facebook Inc.
> > +// Author:
> > +/dts-v1/;
> > +
> > +#include "aspeed-g5.dtsi"
> > +#include <dt-bindings/gpio/aspeed-gpio.h>
> > +
> > +/ {
> > + model = "Facebook Yosemitev2 BMC";
> > + compatible = "facebook,yosemitev2-bmc", "aspeed,ast2500";
> > + aliases {
> > + serial0 = &uart1;
> > + serial4 = &uart5;
> > + };
> > + chosen {
> > + stdout-path = &uart5;
> > + bootargs = "console=ttyS4,115200 earlyprintk";
> > + };
> > +
> > + memory@80000000 {
> > + reg = <0x80000000 0x20000000>;
> > + };
> > +
> > + iio-hwmon {
> > + // VOLATAGE SENSOR
> > + compatible = "iio-hwmon";
> > + io-channels = <&adc 0> , <&adc 1> , <&adc 2> , <&adc 3> ,
> > + <&adc 4> , <&adc 5> , <&adc 6> , <&adc 7> ,
> > + <&adc 8> , <&adc 9> , <&adc 10>, <&adc 11> ,
> > + <&adc 12> , <&adc 13> , <&adc 14> , <&adc 15> ;
> > + };
> > +};
> > +
> > +&fmc {
> > + status = "okay";
> > + flash@0 {
> > + status = "okay";
> > + m25p,fast-read;
> > +#include "openbmc-flash-layout.dtsi"
> > + };
> > +};
> > +
> > +&spi1 {
> > + status = "okay";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_spi1_default>;
> > + flash@0 {
> > + status = "okay";
> > + m25p,fast-read;
> > + label = "pnor";
> > + };
> > +};
> > +
> > +&lpc_snoop {
> > + status = "okay";
> > + snoop-ports = <0x80>;
> > +};
> No lpc in Yosemite so please remove.
>
> > +
> > +&lpc_ctrl {
> > + // Enable lpc clock
> > + status = "okay";
> Same here remove.
>
> Something I'm intending to fix in the devicetrees using LPC is to hog
> the pins in the pinctrl node. You should consider doing the same here.
>
> > +};
> > +
> > +&vuart {
> > + // VUART Host Console
> > + status = "okay";
> > +};
> No Vuart.
>
> > +
> > +&uart1 {
> > + // Host Console
> > + status = "okay";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_txd1_default
> > + &pinctrl_rxd1_default>;
> > +};
> > +
> > +&uart2 {
> > + // SoL Host Console
> > + status = "okay";
>
> uart1-4 are all assigned for 4 multiple hosts so define accordingly.
>
> Also needs pinctrl configuration.
>
> > +};
> > +
> > +&uart3 {
> > + // SoL BMC Console
> > + status = "okay";
>
> Again needs pinctrl.
>
> > +};
> > +
> > +&uart5 {
> > + // BMC Console
> > + status = "okay";
> > +};
> > +
> > +&mac0 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_rmii1_default>;
> > + use-ncsi;
> > +};
> > +
> > +&adc {
> > + status = "okay";
>
> Strongly suggest adding the pinctrl properties here to ensure
> exclusive access for the ADC pins.
>
> Otherwise it looks reasonable.
>
> Andrew
>
>


Attachments:
(No filename) (4.75 kB)
0001-ARM-dts-aspeed-Adding-Facebook-Yosemite-V2-BMC.patch (3.78 kB)
Download all attachments

2019-11-21 22:46:46

by Andrew Jeffery

[permalink] [raw]
Subject: Re: [PATCH] ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC



On Thu, 21 Nov 2019, at 18:18, Manikandan wrote:
>
> Hi Andrew/Vijay,
>
> Thanks for the review .
>
> The following changes done in dts and tested in Facebook Yosemite V2
> BMC platform,
> 1. LPC feature removed as not supported .
> 2. VUART feature removed as not supported.
> 3. Host UART feature removed as not in the current scope.
> 4. ADC pinctrl details added in dts.

Can you please re-send the patch as a v2 and inline to the mail rather than
as an attachment?

Cheers,

Andrew

2019-11-22 10:32:13

by Manikandan

[permalink] [raw]
Subject: Re: [PATCH v2] ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC


From 9a17872b5faf2c00ab0b572bac0072e44a3d8b91 Mon Sep 17 00:00:00 2001
From: manikandan-e <[email protected]>
Date: Thu, 21 Nov 2019 11:57:07 +0530
Subject: [PATCH] ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC

The Yosemite V2 is a facebook multi-node server
platform that host four OCP server. The BMC
in the Yosemite V2 platorm based on AST2500 SoC.

This patch adds linux device tree entry related to
Yosemite V2 specific devices connected to BMC SoC.

Signed-off-by: manikandan-e <[email protected]>
---
.../boot/dts/aspeed-bmc-facebook-yosemitev2.dts | 152 +++++++++++++++++++++
1 file changed, 152 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts

diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
new file mode 100644
index 0000000..5f9a2e1
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 Facebook Inc.
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+ model = "Facebook Yosemitev2 BMC";
+ compatible = "facebook,yosemitev2-bmc", "aspeed,ast2500";
+ aliases {
+ serial0 = &uart1;
+ serial4 = &uart5;
+ };
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200 earlyprintk";
+ };
+
+ memory@80000000 {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ iio-hwmon {
+ // VOLATAGE SENSOR
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0> , <&adc 1> , <&adc 2> , <&adc 3> ,
+ <&adc 4> , <&adc 5> , <&adc 6> , <&adc 7> ,
+ <&adc 8> , <&adc 9> , <&adc 10>, <&adc 11> ,
+ <&adc 12> , <&adc 13> , <&adc 14> , <&adc 15> ;
+ };
+};
+
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+#include "openbmc-flash-layout.dtsi"
+ };
+};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default>;
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "pnor";
+ };
+};
+
+&uart5 {
+ // BMC Console
+ status = "okay";
+};
+
+&mac0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii1_default>;
+ use-ncsi;
+};
+
+&adc {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_adc0_default
+ &pinctrl_adc1_default
+ &pinctrl_adc2_default
+ &pinctrl_adc3_default
+ &pinctrl_adc4_default
+ &pinctrl_adc5_default
+ &pinctrl_adc6_default
+ &pinctrl_adc7_default
+ &pinctrl_adc8_default
+ &pinctrl_adc9_default
+ &pinctrl_adc10_default
+ &pinctrl_adc11_default
+ &pinctrl_adc12_default
+ &pinctrl_adc13_default
+ &pinctrl_adc14_default
+ &pinctrl_adc15_default>;
+};
+
+&i2c8 {
+ status = "okay";
+ //FRU EEPROM
+ eeprom@51 {
+ compatible = "atmel,24c64";
+ reg = <0x51>;
+ pagesize = <32>;
+ };
+};
+
+&i2c9 {
+ status = "okay";
+ tmp421@4e {
+ //INLET TEMP
+ compatible = "ti,tmp421";
+ reg = <0x4e>;
+ };
+ //OUTLET TEMP
+ tmp421@4f {
+ compatible = "ti,tmp421";
+ reg = <0x4f>;
+ };
+};
+
+&i2c10 {
+ status = "okay";
+ //HSC
+ adm1278@40 {
+ compatible = "adi,adm1278";
+ reg = <0x40>;
+ };
+};
+
+&i2c11 {
+ status = "okay";
+ //MEZZ_TEMP_SENSOR
+ tmp421@1f {
+ compatible = "ti,tmp421";
+ reg = <0x1f>;
+ };
+};
+
+&i2c12 {
+ status = "okay";
+ //MEZZ_FRU
+ eeprom@51 {
+ compatible = "atmel,24c64";
+ reg = <0x51>;
+ pagesize = <32>;
+ };
+};
+
+&pwm_tacho {
+ status = "okay";
+ //FSC
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
+ fan@0 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x00>;
+ };
+ fan@1 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x02>;
+ };
+};
--
2.7.4


On Fri, Nov 22, 2019 at 09:16:39AM +1030, Andrew Jeffery wrote:
>
>
> On Thu, 21 Nov 2019, at 18:18, Manikandan wrote:
> >
> > Hi Andrew/Vijay,
> >
> > Thanks for the review .
> >
> > The following changes done in dts and tested in Facebook Yosemite V2
> > BMC platform,
> > 1. LPC feature removed as not supported .
> > 2. VUART feature removed as not supported.
> > 3. Host UART feature removed as not in the current scope.
> > 4. ADC pinctrl details added in dts.
>
> Can you please re-send the patch as a v2 and inline to the mail rather than
> as an attachment?
>
> Cheers,
>
> Andrew

2019-11-24 22:06:29

by Andrew Jeffery

[permalink] [raw]
Subject: Re: [PATCH v2] ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC



On Fri, 22 Nov 2019, at 21:00, Manikandan wrote:
>
> From 9a17872b5faf2c00ab0b572bac0072e44a3d8b91 Mon Sep 17 00:00:00 2001
> From: manikandan-e <[email protected]>
> Date: Thu, 21 Nov 2019 11:57:07 +0530
> Subject: [PATCH] ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC
>
> The Yosemite V2 is a facebook multi-node server
> platform that host four OCP server. The BMC
> in the Yosemite V2 platorm based on AST2500 SoC.
>
> This patch adds linux device tree entry related to
> Yosemite V2 specific devices connected to BMC SoC.
>
> Signed-off-by: manikandan-e <[email protected]>
> ---
> .../boot/dts/aspeed-bmc-facebook-yosemitev2.dts | 152 +++++++++++++++++++++
> 1 file changed, 152 insertions(+)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> new file mode 100644
> index 0000000..5f9a2e1
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> @@ -0,0 +1,152 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// Copyright (c) 2018 Facebook Inc.
> +/dts-v1/;
> +
> +#include "aspeed-g5.dtsi"
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +
> +/ {
> + model = "Facebook Yosemitev2 BMC";
> + compatible = "facebook,yosemitev2-bmc", "aspeed,ast2500";
> + aliases {
> + serial0 = &uart1;

Is this necessary now that you're not enabling uart1?

But otherwise:

Acked-by: Andrew Jeffery <[email protected]>

However, I'm guessing you copy/pasted the patch as we still have the
reply text at the bottom. Copy/paste can lead to mangled whitespace
or other errors that prevent the patch from being applied cleanly. I
recommend getting set up and familiar with `git send-email` to give
your patch the best chance of being applied without trouble. The
`git format-patch` / `git send-email` pair also take care of iterating
on your patch with e.g. the `-v` switch that injects the version number
of the patch in the appropriate places.

Andrew

> + serial4 = &uart5;
> + };
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=ttyS4,115200 earlyprintk";
> + };
> +
> + memory@80000000 {
> + reg = <0x80000000 0x20000000>;
> + };
> +
> + iio-hwmon {
> + // VOLATAGE SENSOR
> + compatible = "iio-hwmon";
> + io-channels = <&adc 0> , <&adc 1> , <&adc 2> , <&adc 3> ,
> + <&adc 4> , <&adc 5> , <&adc 6> , <&adc 7> ,
> + <&adc 8> , <&adc 9> , <&adc 10>, <&adc 11> ,
> + <&adc 12> , <&adc 13> , <&adc 14> , <&adc 15> ;
> + };
> +};
> +
> +&fmc {
> + status = "okay";
> + flash@0 {
> + status = "okay";
> + m25p,fast-read;
> +#include "openbmc-flash-layout.dtsi"
> + };
> +};
> +
> +&spi1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi1_default>;
> + flash@0 {
> + status = "okay";
> + m25p,fast-read;
> + label = "pnor";
> + };
> +};
> +
> +&uart5 {
> + // BMC Console
> + status = "okay";
> +};
> +
> +&mac0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rmii1_default>;
> + use-ncsi;
> +};
> +
> +&adc {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_adc0_default
> + &pinctrl_adc1_default
> + &pinctrl_adc2_default
> + &pinctrl_adc3_default
> + &pinctrl_adc4_default
> + &pinctrl_adc5_default
> + &pinctrl_adc6_default
> + &pinctrl_adc7_default
> + &pinctrl_adc8_default
> + &pinctrl_adc9_default
> + &pinctrl_adc10_default
> + &pinctrl_adc11_default
> + &pinctrl_adc12_default
> + &pinctrl_adc13_default
> + &pinctrl_adc14_default
> + &pinctrl_adc15_default>;
> +};
> +
> +&i2c8 {
> + status = "okay";
> + //FRU EEPROM
> + eeprom@51 {
> + compatible = "atmel,24c64";
> + reg = <0x51>;
> + pagesize = <32>;
> + };
> +};
> +
> +&i2c9 {
> + status = "okay";
> + tmp421@4e {
> + //INLET TEMP
> + compatible = "ti,tmp421";
> + reg = <0x4e>;
> + };
> + //OUTLET TEMP
> + tmp421@4f {
> + compatible = "ti,tmp421";
> + reg = <0x4f>;
> + };
> +};
> +
> +&i2c10 {
> + status = "okay";
> + //HSC
> + adm1278@40 {
> + compatible = "adi,adm1278";
> + reg = <0x40>;
> + };
> +};
> +
> +&i2c11 {
> + status = "okay";
> + //MEZZ_TEMP_SENSOR
> + tmp421@1f {
> + compatible = "ti,tmp421";
> + reg = <0x1f>;
> + };
> +};
> +
> +&i2c12 {
> + status = "okay";
> + //MEZZ_FRU
> + eeprom@51 {
> + compatible = "atmel,24c64";
> + reg = <0x51>;
> + pagesize = <32>;
> + };
> +};
> +
> +&pwm_tacho {
> + status = "okay";
> + //FSC
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
> + fan@0 {
> + reg = <0x00>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x00>;
> + };
> + fan@1 {
> + reg = <0x01>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x02>;
> + };
> +};
> --
> 2.7.4
>
>
> On Fri, Nov 22, 2019 at 09:16:39AM +1030, Andrew Jeffery wrote:
> >
> >
> > On Thu, 21 Nov 2019, at 18:18, Manikandan wrote:
> > >
> > > Hi Andrew/Vijay,
> > >
> > > Thanks for the review .
> > >
> > > The following changes done in dts and tested in Facebook Yosemite V2
> > > BMC platform,
> > > 1. LPC feature removed as not supported .
> > > 2. VUART feature removed as not supported.
> > > 3. Host UART feature removed as not in the current scope.
> > > 4. ADC pinctrl details added in dts.
> >
> > Can you please re-send the patch as a v2 and inline to the mail rather than
> > as an attachment?
> >
> > Cheers,
> >
> > Andrew
>

2019-11-25 18:41:47

by Manikandan

[permalink] [raw]
Subject: Re: [PATCH v2] ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC

On Mon, Nov 25, 2019 at 08:36:30AM +1030, Andrew Jeffery wrote:
>
>
> On Fri, 22 Nov 2019, at 21:00, Manikandan wrote:
> >
> > From 9a17872b5faf2c00ab0b572bac0072e44a3d8b91 Mon Sep 17 00:00:00 2001
> > From: manikandan-e <[email protected]>
> > Date: Thu, 21 Nov 2019 11:57:07 +0530
> > Subject: [PATCH] ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC
> >
> > The Yosemite V2 is a facebook multi-node server
> > platform that host four OCP server. The BMC
> > in the Yosemite V2 platorm based on AST2500 SoC.
> >
> > This patch adds linux device tree entry related to
> > Yosemite V2 specific devices connected to BMC SoC.
> >
> > Signed-off-by: manikandan-e <[email protected]>
> > ---
> > .../boot/dts/aspeed-bmc-facebook-yosemitev2.dts | 152 +++++++++++++++++++++
> > 1 file changed, 152 insertions(+)
> > create mode 100644 arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> >
> > diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> > b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> > new file mode 100644
> > index 0000000..5f9a2e1
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-yosemitev2.dts
> > @@ -0,0 +1,152 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +// Copyright (c) 2018 Facebook Inc.
> > +/dts-v1/;
> > +
> > +#include "aspeed-g5.dtsi"
> > +#include <dt-bindings/gpio/aspeed-gpio.h>
> > +
> > +/ {
> > + model = "Facebook Yosemitev2 BMC";
> > + compatible = "facebook,yosemitev2-bmc", "aspeed,ast2500";
> > + aliases {
> > + serial0 = &uart1;
>
> Is this necessary now that you're not enabling uart1?
Removed in dts.
>
> But otherwise:
>
> Acked-by: Andrew Jeffery <[email protected]>
>
> However, I'm guessing you copy/pasted the patch as we still have the
> reply text at the bottom. Copy/paste can lead to mangled whitespace
> or other errors that prevent the patch from being applied cleanly. I
> recommend getting set up and familiar with `git send-email` to give
> your patch the best chance of being applied without trouble. The
> `git format-patch` / `git send-email` pair also take care of iterating
> on your patch with e.g. the `-v` switch that injects the version number
> of the patch in the appropriate places.
>
> Andrew
>
Thanks for input. I have done patch version based on 'git format-patch' and send patch as v3 using mutt.

> > + serial4 = &uart5;
> > + };
> > + chosen {
> > + stdout-path = &uart5;
> > + bootargs = "console=ttyS4,115200 earlyprintk";
> > + };
> > +
> > + memory@80000000 {
> > + reg = <0x80000000 0x20000000>;
> > + };
> > +
> > + iio-hwmon {
> > + // VOLATAGE SENSOR
> > + compatible = "iio-hwmon";
> > + io-channels = <&adc 0> , <&adc 1> , <&adc 2> , <&adc 3> ,
> > + <&adc 4> , <&adc 5> , <&adc 6> , <&adc 7> ,
> > + <&adc 8> , <&adc 9> , <&adc 10>, <&adc 11> ,
> > + <&adc 12> , <&adc 13> , <&adc 14> , <&adc 15> ;
> > + };
> > +};
> > +
> > +&fmc {
> > + status = "okay";
> > + flash@0 {
> > + status = "okay";
> > + m25p,fast-read;
> > +#include "openbmc-flash-layout.dtsi"
> > + };
> > +};
> > +
> > +&spi1 {
> > + status = "okay";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_spi1_default>;
> > + flash@0 {
> > + status = "okay";
> > + m25p,fast-read;
> > + label = "pnor";
> > + };
> > +};
> > +
> > +&uart5 {
> > + // BMC Console
> > + status = "okay";
> > +};
> > +
> > +&mac0 {
> > + status = "okay";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_rmii1_default>;
> > + use-ncsi;
> > +};
> > +
> > +&adc {
> > + status = "okay";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_adc0_default
> > + &pinctrl_adc1_default
> > + &pinctrl_adc2_default
> > + &pinctrl_adc3_default
> > + &pinctrl_adc4_default
> > + &pinctrl_adc5_default
> > + &pinctrl_adc6_default
> > + &pinctrl_adc7_default
> > + &pinctrl_adc8_default
> > + &pinctrl_adc9_default
> > + &pinctrl_adc10_default
> > + &pinctrl_adc11_default
> > + &pinctrl_adc12_default
> > + &pinctrl_adc13_default
> > + &pinctrl_adc14_default
> > + &pinctrl_adc15_default>;
> > +};
> > +
> > +&i2c8 {
> > + status = "okay";
> > + //FRU EEPROM
> > + eeprom@51 {
> > + compatible = "atmel,24c64";
> > + reg = <0x51>;
> > + pagesize = <32>;
> > + };
> > +};
> > +
> > +&i2c9 {
> > + status = "okay";
> > + tmp421@4e {
> > + //INLET TEMP
> > + compatible = "ti,tmp421";
> > + reg = <0x4e>;
> > + };
> > + //OUTLET TEMP
> > + tmp421@4f {
> > + compatible = "ti,tmp421";
> > + reg = <0x4f>;
> > + };
> > +};
> > +
> > +&i2c10 {
> > + status = "okay";
> > + //HSC
> > + adm1278@40 {
> > + compatible = "adi,adm1278";
> > + reg = <0x40>;
> > + };
> > +};
> > +
> > +&i2c11 {
> > + status = "okay";
> > + //MEZZ_TEMP_SENSOR
> > + tmp421@1f {
> > + compatible = "ti,tmp421";
> > + reg = <0x1f>;
> > + };
> > +};
> > +
> > +&i2c12 {
> > + status = "okay";
> > + //MEZZ_FRU
> > + eeprom@51 {
> > + compatible = "atmel,24c64";
> > + reg = <0x51>;
> > + pagesize = <32>;
> > + };
> > +};
> > +
> > +&pwm_tacho {
> > + status = "okay";
> > + //FSC
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
> > + fan@0 {
> > + reg = <0x00>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x00>;
> > + };
> > + fan@1 {
> > + reg = <0x01>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x02>;
> > + };
> > +};
> > --
> > 2.7.4
> >
> >
> > On Fri, Nov 22, 2019 at 09:16:39AM +1030, Andrew Jeffery wrote:
> > >
> > >
> > > On Thu, 21 Nov 2019, at 18:18, Manikandan wrote:
> > > >
> > > > Hi Andrew/Vijay,
> > > >
> > > > Thanks for the review .
> > > >
> > > > The following changes done in dts and tested in Facebook Yosemite V2
> > > > BMC platform,
> > > > 1. LPC feature removed as not supported .
> > > > 2. VUART feature removed as not supported.
> > > > 3. Host UART feature removed
> > > > 4. ADC pinctrl details added in dts.
> > >
> > > Can you please re-send the patch as a v2 and inline to the mail rather than
> > > as an attachment?
> > >
> > > Cheers,
> > >
> > > Andrew
> >