Add macro for the SNVS clock of the i.MX8MQ.
Signed-off-by: Anson Huang <[email protected]>
---
include/dt-bindings/clock/imx8mq-clock.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-bindings/clock/imx8mq-clock.h
index 6677e92..0233bb1 100644
--- a/include/dt-bindings/clock/imx8mq-clock.h
+++ b/include/dt-bindings/clock/imx8mq-clock.h
@@ -400,5 +400,7 @@
#define IMX8MQ_CLK_GPIO4_ROOT 262
#define IMX8MQ_CLK_GPIO5_ROOT 263
-#define IMX8MQ_CLK_END 264
+#define IMX8MQ_CLK_SNVS_ROOT 264
+
+#define IMX8MQ_CLK_END 265
#endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */
--
2.7.4
i.MX8MQ has clock gate for SNVS module, add it into clock tree
for SNVS RTC driver to manage.
Signed-off-by: Anson Huang <[email protected]>
---
drivers/clk/imx/clk-imx8mq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index daf1841..24c3464 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -507,6 +507,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
clks[IMX8MQ_CLK_SAI5_IPG] = imx_clk_gate2_shared2("sai5_ipg_clk", "ipg_audio_root", base + 0x4370, 0, &share_count_sai5);
clks[IMX8MQ_CLK_SAI6_ROOT] = imx_clk_gate2_shared2("sai6_root_clk", "sai6", base + 0x4380, 0, &share_count_sai6);
clks[IMX8MQ_CLK_SAI6_IPG] = imx_clk_gate2_shared2("sai6_ipg_clk", "ipg_audio_root", base + 0x4380, 0, &share_count_sai6);
+ clks[IMX8MQ_CLK_SNVS_ROOT] = imx_clk_gate4("snvs_root_clk", "ipg_root", base + 0x4470, 0);
clks[IMX8MQ_CLK_UART1_ROOT] = imx_clk_gate4("uart1_root_clk", "uart1", base + 0x4490, 0);
clks[IMX8MQ_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0);
clks[IMX8MQ_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0);
--
2.7.4
i.MX8MQ has clock gate for SNVS module, add clock info to SNVS
RTC node for clock management.
Signed-off-by: Anson Huang <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index e5f3133..b706de8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -438,6 +438,8 @@
offset = <0x34>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_SNVS_ROOT>;
+ clock-names = "snvs-rtc";
};
};
--
2.7.4
On 15.05.2019 04:09, Anson Huang wrote:
> Add macro for the SNVS clock of the i.MX8MQ.
>
> Signed-off-by: Anson Huang <[email protected]>
For series (couldn't find a cover letter):
Reviewed-by: Leonard Crestez <[email protected]>
On Wed, May 15, 2019 at 01:09:24AM +0000, Anson Huang wrote:
> Add macro for the SNVS clock of the i.MX8MQ.
>
> Signed-off-by: Anson Huang <[email protected]>
Applied, thanks.
On Wed, May 15, 2019 at 01:09:30AM +0000, Anson Huang wrote:
> i.MX8MQ has clock gate for SNVS module, add it into clock tree
> for SNVS RTC driver to manage.
>
> Signed-off-by: Anson Huang <[email protected]>
Applied, thanks.
On Wed, May 15, 2019 at 01:09:36AM +0000, Anson Huang wrote:
> i.MX8MQ has clock gate for SNVS module, add clock info to SNVS
> RTC node for clock management.
>
> Signed-off-by: Anson Huang <[email protected]>
This one still has problem with encoding and thus cannot be applied.
Here is what I get, and there is '=20' in the patch content.
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dt=
s/freescale/imx8mq.dtsi
index e5f3133..b706de8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -438,6 +438,8 @@
offset =3D <0x34>;
interrupts =3D <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&clk IMX8MQ_CLK_SNVS_ROOT>;
+ clock-names =3D "snvs-rtc";
};
};
=20
--=20
2.7.4
Hi, Shawn
> -----Original Message-----
> From: Shawn Guo [mailto:[email protected]]
> Sent: Thursday, May 23, 2019 9:03 AM
> To: Anson Huang <[email protected]>
> Cc: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; Abel Vesa
> <[email protected]>; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected]; linux-arm-
> [email protected]; [email protected]; linux-
> [email protected]; dl-linux-imx <[email protected]>
> Subject: Re: [PATCH 3/3] arm64: dts: imx8mq: add clock for SNVS RTC node
>
> On Wed, May 15, 2019 at 01:09:36AM +0000, Anson Huang wrote:
> > i.MX8MQ has clock gate for SNVS module, add clock info to SNVS RTC
> > node for clock management.
> >
> > Signed-off-by: Anson Huang <[email protected]>
>
> This one still has problem with encoding and thus cannot be applied.
> Here is what I get, and there is '=20' in the patch content.
We switch to another server which has no such issue, I resent the patch,
Please pick up this one, sorry for the inconvenience.
https://patchwork.kernel.org/patch/10959097/
thanks,
Anson.
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> b/arch/arm64/boot/dt= s/freescale/imx8mq.dtsi index e5f3133..b706de8
> 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -438,6 +438,8 @@
> offset =3D <0x34>;
> interrupts =3D <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + clocks =3D <&clk IMX8MQ_CLK_SNVS_ROOT>;
> + clock-names =3D "snvs-rtc";
> };
> };
> =20
> --=20
> 2.7.4