2020-03-10 09:00:21

by Anson Huang

Subject: [PATCH 1/2] arm64: dts: imx8qxp-mek: Sort labels alphabetically

Sort the labels alphabetically for consistency.

Signed-off-by: Anson Huang <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 60 +++++++++++++--------------
1 file changed, 30 insertions(+), 30 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 13460a3..2ed7aba 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -30,29 +30,8 @@
};
};

-&adma_lpuart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_lpuart0>;
- status = "okay";
-};
-
-&fec1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec1>;
- phy-mode = "rgmii-id";
- phy-handle = <&ethphy0>;
- fsl,magic-packet;
+&adma_dsp {
status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- };
- };
};

&adma_i2c1 {
@@ -131,6 +110,35 @@
};
};

+&adma_lpuart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpuart0>;
+ status = "okay";
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec1>;
+ phy-mode = "rgmii-id";
+ phy-handle = <&ethphy0>;
+ fsl,magic-packet;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+ };
+};
+
+&scu_key {
+ status = "okay";
+};
+
&usdhc1 {
assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>;
assigned-clock-rates = <200000000>;
@@ -229,11 +237,3 @@
>;
};
};
-
-&adma_dsp {
- status = "okay";
-};
-
-&scu_key {
- status = "okay";
-};
--
2.7.4

2020-03-10 09:00:38

by Anson Huang

Subject: [PATCH 2/2] arm64: dts: imx8qxp-mek: Add PMIC thermal zone support

i.MX8QXP MEK board has PMIC thermal sensor, add support for it.

Signed-off-by: Anson Huang <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 33 +++++++++++++++++++++++++++
1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 2ed7aba..9b105ae 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -139,6 +139,39 @@
status = "okay";
};

+&thermal_zones {
+ pmic-thermal0 {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+ thermal-sensors = <&tsens IMX_SC_R_PMIC_0>;
+
+ trips {
+ pmic_alert0: trip0 {
+ temperature = <110000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ pmic_crit0: trip1 {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&pmic_alert0>;
+ cooling-device =
+ <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+};
+
&usdhc1 {
assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>;
assigned-clock-rates = <200000000>;
--
2.7.4

2020-03-16 01:06:13

by Shawn Guo

Subject: Re: [PATCH 1/2] arm64: dts: imx8qxp-mek: Sort labels alphabetically

On Tue, Mar 10, 2020 at 04:52:16PM +0800, Anson Huang wrote:
> Sort the labels alphabetically for consistency.
>
> Signed-off-by: Anson Huang <[email protected]>

It doesn't apply to my branch.

Shawn

> ---
> arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 60 +++++++++++++--------------
> 1 file changed, 30 insertions(+), 30 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> index 13460a3..2ed7aba 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> @@ -30,29 +30,8 @@
> };
> };
>
> -&adma_lpuart0 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_lpuart0>;
> - status = "okay";
> -};
> -
> -&fec1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_fec1>;
> - phy-mode = "rgmii-id";
> - phy-handle = <&ethphy0>;
> - fsl,magic-packet;
> +&adma_dsp {
> status = "okay";
> -
> - mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - ethphy0: ethernet-phy@0 {
> - compatible = "ethernet-phy-ieee802.3-c22";
> - reg = <0>;
> - };
> - };
> };
>
> &adma_i2c1 {
> @@ -131,6 +110,35 @@
> };
> };
>
> +&adma_lpuart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_lpuart0>;
> + status = "okay";
> +};
> +
> +&fec1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fec1>;
> + phy-mode = "rgmii-id";
> + phy-handle = <&ethphy0>;
> + fsl,magic-packet;
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ethphy0: ethernet-phy@0 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0>;
> + };
> + };
> +};
> +
> +&scu_key {
> + status = "okay";
> +};
> +
> &usdhc1 {
> assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>;
> assigned-clock-rates = <200000000>;
> @@ -229,11 +237,3 @@
> >;
> };
> };
> -
> -&adma_dsp {
> - status = "okay";
> -};
> -
> -&scu_key {
> - status = "okay";
> -};
> --
> 2.7.4
>

2020-03-16 01:13:02

by Anson Huang

Subject: RE: [PATCH 1/2] arm64: dts: imx8qxp-mek: Sort labels alphabetically

Hi, Shawn

> Subject: Re: [PATCH 1/2] arm64: dts: imx8qxp-mek: Sort labels alphabetically
>
> On Tue, Mar 10, 2020 at 04:52:16PM +0800, Anson Huang wrote:
> > Sort the labels alphabetically for consistency.
> >
> > Signed-off-by: Anson Huang <[email protected]>
>
> It doesn't apply to my branch.

I will rebase it and resend the patch series.

Thanks,
Anson


>
> Shawn
>
> > ---
> > arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 60 +++++++++++++-----
> ---------
> > 1 file changed, 30 insertions(+), 30 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> > index 13460a3..2ed7aba 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> > @@ -30,29 +30,8 @@
> > };
> > };
> >
> > -&adma_lpuart0 {
> > - pinctrl-names = "default";
> > - pinctrl-0 = <&pinctrl_lpuart0>;
> > - status = "okay";
> > -};
> > -
> > -&fec1 {
> > - pinctrl-names = "default";
> > - pinctrl-0 = <&pinctrl_fec1>;
> > - phy-mode = "rgmii-id";
> > - phy-handle = <&ethphy0>;
> > - fsl,magic-packet;
> > +&adma_dsp {
> > status = "okay";
> > -
> > - mdio {
> > - #address-cells = <1>;
> > - #size-cells = <0>;
> > -
> > - ethphy0: ethernet-phy@0 {
> > - compatible = "ethernet-phy-ieee802.3-c22";
> > - reg = <0>;
> > - };
> > - };
> > };
> >
> > &adma_i2c1 {
> > @@ -131,6 +110,35 @@
> > };
> > };
> >
> > +&adma_lpuart0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_lpuart0>;
> > + status = "okay";
> > +};
> > +
> > +&fec1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_fec1>;
> > + phy-mode = "rgmii-id";
> > + phy-handle = <&ethphy0>;
> > + fsl,magic-packet;
> > + status = "okay";
> > +
> > + mdio {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + ethphy0: ethernet-phy@0 {
> > + compatible = "ethernet-phy-ieee802.3-c22";
> > + reg = <0>;
> > + };
> > + };
> > +};
> > +
> > +&scu_key {
> > + status = "okay";
> > +};
> > +
> > &usdhc1 {
> > assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>;
> > assigned-clock-rates = <200000000>;
> > @@ -229,11 +237,3 @@
> > >;
> > };
> > };
> > -
> > -&adma_dsp {
> > - status = "okay";
> > -};
> > -
> > -&scu_key {
> > - status = "okay";
> > -};
> > --
> > 2.7.4
> >