[[ NOTE: this is completely untested by the author, but included solely
because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix
SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other
drivers using CQHCI might benefit from a similar change, if they
also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same
bug on at least MSM, Arasan, and Intel hardware. ]]
SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't
tracking that properly in software. When out of sync, we may trigger
various timeouts.
It's not typical to perform resets while CQE is enabled, but this may
occur in some suspend or error recovery scenarios.
Fixes: bb6e358169bf ("mmc: sdhci-esdhc-imx: add CMDQ support")
Signed-off-by: Brian Norris <[email protected]>
---
drivers/mmc/host/sdhci-esdhc-imx.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 55981b0f0b10..222c83929e20 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -1288,6 +1288,13 @@ static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing)
static void esdhc_reset(struct sdhci_host *host, u8 mask)
{
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
+
+ if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) &&
+ imx_data->socdata->flags & ESDHC_FLAG_CQHCI)
+ cqhci_deactivate(host->mmc);
+
sdhci_reset(host, mask);
sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
--
2.38.0.413.g74048e4d9e-goog
> -----Original Message-----
> From: Brian Norris <[email protected]>
> Sent: 2022??10??18?? 11:57
> To: Ulf Hansson <[email protected]>
> Cc: Shawn Lin <[email protected]>; Adrian Hunter
> <[email protected]>; Shawn Guo <[email protected]>; Fabio
> Estevam <[email protected]>; Faiz Abbas <[email protected]>;
> dl-linux-imx <[email protected]>; Bough Chen <[email protected]>; Al
> Cooper <[email protected]>; [email protected]; Pengutronix
> Kernel Team <[email protected]>; [email protected]; Florian
> Fainelli <[email protected]>; Sascha Hauer <[email protected]>;
> Thierry Reding <[email protected]>; Michal Simek
> <[email protected]>; Jonathan Hunter <[email protected]>;
> Sowjanya Komatineni <[email protected]>;
> [email protected]; Broadcom internal kernel review list
> <[email protected]>; Brian Norris
> <[email protected]>
> Subject: [PATCH 3/5] mms: sdhci-esdhc-imx: Fix SDHCI_RESET_ALL for CQHCI
>
> [[ NOTE: this is completely untested by the author, but included solely
> because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix
> SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other
> drivers using CQHCI might benefit from a similar change, if they
> also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same
> bug on at least MSM, Arasan, and Intel hardware. ]]
>
> SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't
> tracking that properly in software. When out of sync, we may trigger various
> timeouts.
>
> It's not typical to perform resets while CQE is enabled, but this may occur in
> some suspend or error recovery scenarios.
>
> Fixes: bb6e358169bf ("mmc: sdhci-esdhc-imx: add CMDQ support")
> Signed-off-by: Brian Norris <[email protected]>
> ---
>
> drivers/mmc/host/sdhci-esdhc-imx.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
> b/drivers/mmc/host/sdhci-esdhc-imx.c
> index 55981b0f0b10..222c83929e20 100644
> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> @@ -1288,6 +1288,13 @@ static void esdhc_set_uhs_signaling(struct
> sdhci_host *host, unsigned timing)
>
> static void esdhc_reset(struct sdhci_host *host, u8 mask) {
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
> +
> + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL)
> &&
> + imx_data->socdata->flags & ESDHC_FLAG_CQHCI)
I think we can remove the condition " imx_data->socdata->flags & ESDHC_FLAG_CQHCI" here.
According to code logic, host->mmc->caps2 & MMC_CAP2_CQE means it already contain imx_data->socdata->flags & ESDHC_FLAG_CQHCI
Best Regards
Haibo Chen
> + cqhci_deactivate(host->mmc);
> +
> sdhci_reset(host, mask);
>
> sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
> --
> 2.38.0.413.g74048e4d9e-goog
Hi,
On Tue, Oct 18, 2022 at 07:22:04AM +0000, Bough Chen wrote:
> > -----Original Message-----
> > From: Brian Norris <[email protected]>
> > --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> > +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> > @@ -1288,6 +1288,13 @@ static void esdhc_set_uhs_signaling(struct
> > sdhci_host *host, unsigned timing)
> >
> > static void esdhc_reset(struct sdhci_host *host, u8 mask) {
> > + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> > + struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
> > +
> > + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL)
> > &&
> > + imx_data->socdata->flags & ESDHC_FLAG_CQHCI)
>
> I think we can remove the condition " imx_data->socdata->flags & ESDHC_FLAG_CQHCI" here.
> According to code logic, host->mmc->caps2 & MMC_CAP2_CQE means it already contain imx_data->socdata->flags & ESDHC_FLAG_CQHCI
I don't know why I had this in the first place. Maybe just to be
double-sure that caps flags aren't getting set elsewhere (e.g., by the
core)? But you're right, and I've dropped this in v2.
Thanks,
Brian