2019-08-12 10:13:14

by Wen He

[permalink] [raw]
Subject: [v1 3/3] arm64: dts: ls1028a: Add properties node for Display output pixel clock

The LS1028A has a clock domain PXLCLK0 used for the Display output
interface in the display core, independent of the system bus frequency,
for flexible clock design. This display core has its own pixel clock.

This patch enable the pixel clock provider on the LS1028A.

Signed-off-by: Wen He <[email protected]>
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 2d31e1c09e74..0c54ba3214af 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -70,11 +70,18 @@
clock-output-names = "sysclk";
};

- dpclk: clock-dp {
+ osc_27m: clock-osc-27m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
- clock-output-names= "dpclk";
+ clock-output-names = "phy_27m";
+ };
+
+ dpclk: clock-controller@f1f0000 {
+ compatible = "fsl,ls1028a-plldig";
+ reg = <0x0 0xf1f0000 0x0 0xffff>;
+ #clock-cells = <1>;
+ clocks = <&osc_27m>;
};

aclk: clock-axi {
@@ -557,7 +564,7 @@
interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
<0 223 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "DE", "SE";
- clocks = <&dpclk>, <&aclk>, <&aclk>, <&pclk>;
+ clocks = <&dpclk 0>, <&aclk>, <&aclk>, <&pclk>;
clock-names = "pxlclk", "mclk", "aclk", "pclk";
arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
arm,malidp-arqos-value = <0xd000d000>;
--
2.17.1


2019-08-19 09:33:16

by Shawn Guo

[permalink] [raw]
Subject: Re: [v1 3/3] arm64: dts: ls1028a: Add properties node for Display output pixel clock

On Mon, Aug 12, 2019 at 06:02:24PM +0800, Wen He wrote:
> The LS1028A has a clock domain PXLCLK0 used for the Display output
> interface in the display core, independent of the system bus frequency,
> for flexible clock design. This display core has its own pixel clock.
>
> This patch enable the pixel clock provider on the LS1028A.
>
> Signed-off-by: Wen He <[email protected]>

Applied, thanks.

2019-08-19 09:53:33

by Wen He

[permalink] [raw]
Subject: RE: [EXT] Re: [v1 3/3] arm64: dts: ls1028a: Add properties node for Display output pixel clock



> -----Original Message-----
> From: Shawn Guo <[email protected]>
> Sent: 2019??8??19?? 17:32
> To: Wen He <[email protected]>
> Cc: Rob Herring <[email protected]>; Michael Turquette
> <[email protected]>; Stephen Boyd <[email protected]>; Mark
> Rutland <[email protected]>; [email protected];
> [email protected]; [email protected]; Leo Li
> <[email protected]>; [email protected]
> Subject: [EXT] Re: [v1 3/3] arm64: dts: ls1028a: Add properties node for
> Display output pixel clock
>
>
> On Mon, Aug 12, 2019 at 06:02:24PM +0800, Wen He wrote:
> > The LS1028A has a clock domain PXLCLK0 used for the Display output
> > interface in the display core, independent of the system bus
> > frequency, for flexible clock design. This display core has its own pixel clock.
> >
> > This patch enable the pixel clock provider on the LS1028A.
> >
> > Signed-off-by: Wen He <[email protected]>
>
> Applied, thanks.

Thank you for the review, Shawn.

Best Regards,
Wen