2022-11-17 08:02:39

by Yuan, Perry

[permalink] [raw]
Subject: [PATCH v3 4/5] Documentation: amd-pstate: add driver working mode introduction

Introduce the `amd_pstate` driver new working mode with
`amd_pstate=passive` added to kernel command line.
If there is no passive mode enabled by user, amd_pstate driver will be
disabled by default for now.

Acked-by: Huang Rui <[email protected]>
Reviewed-by: Gautham R. Shenoy <[email protected]>
Tested-by: Wyes Karny <[email protected]>
Signed-off-by: Perry Yuan <[email protected]>
---
Documentation/admin-guide/pm/amd-pstate.rst | 30 +++++++++------------
1 file changed, 13 insertions(+), 17 deletions(-)

diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst
index 8f3d30c5a0d8..06e23538f79c 100644
--- a/Documentation/admin-guide/pm/amd-pstate.rst
+++ b/Documentation/admin-guide/pm/amd-pstate.rst
@@ -283,23 +283,19 @@ efficiency frequency management method on AMD processors.
Kernel Module Options for ``amd-pstate``
=========================================

-.. _shared_mem:
-
-``shared_mem``
-Use a module param (shared_mem) to enable related processors manually with
-**amd_pstate.shared_mem=1**.
-Due to the performance issue on the processors with `Shared Memory Support
-<perf_cap_>`_, we disable it presently and will re-enable this by default
-once we address performance issue with this solution.
-
-To check whether the current processor is using `Full MSR Support <perf_cap_>`_
-or `Shared Memory Support <perf_cap_>`_ : ::
-
- ray@hr-test1:~$ lscpu | grep cppc
- Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbnoinvd cppc arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip pku ospke vaes vpclmulqdq rdpid overflow_recov succor smca fsrm
-
-If the CPU flags have ``cppc``, then this processor supports `Full MSR Support
-<perf_cap_>`_. Otherwise, it supports `Shared Memory Support <perf_cap_>`_.
+Passive Mode
+------------
+
+``amd_pstate=passive``
+
+It will be enabled if the ``amd_pstate=passive`` is passed to the kernel in the command line.
+In this mode, ``amd_pstate`` driver software specifies a desired QoS target in the CPPC
+performance scale as a relative number. This can be expressed as percentage of nominal
+performance (infrastructure max). Below the nominal sustained performance level,
+desired performance expresses the average performance level of the processor subject
+to the Performance Reduction Tolerance register. Above the nominal performance level,
+processor must provide at least nominal performance requested and go higher if current
+operating conditions allow.


``cpupower`` tool support for ``amd-pstate``
--
2.25.1



2022-11-17 10:22:10

by Yuan, Perry

[permalink] [raw]
Subject: RE: [PATCH v3 4/5] Documentation: amd-pstate: add driver working mode introduction

[AMD Official Use Only - General]



> -----Original Message-----
> From: Bagas Sanjaya <[email protected]>
> Sent: Thursday, November 17, 2022 4:58 PM
> To: Yuan, Perry <[email protected]>
> Cc: [email protected]; Huang, Ray <[email protected]>;
> [email protected]; Limonciello, Mario
> <[email protected]>; Fontenot, Nathan
> <[email protected]>; Deucher, Alexander
> <[email protected]>; Sharma, Deepak <[email protected]>;
> Huang, Shimmer <[email protected]>; Meng, Li (Jassmine)
> <[email protected]>; Du, Xiaojian <[email protected]>; Karny, Wyes
> <[email protected]>; Shenoy, Gautham Ranjal <[email protected]>;
> Narayan, Ananth <[email protected]>; [email protected];
> linux- [email protected]
> Subject: Re: [PATCH v3 4/5] Documentation: amd-pstate: add driver
> working mode introduction
>
> On Thu, Nov 17, 2022 at 03:35:40PM +0800, Perry Yuan wrote:
> > Introduce the `amd_pstate` driver new working mode with
> > `amd_pstate=passive` added to kernel command line.
> > If there is no passive mode enabled by user, amd_pstate driver will
> > be disabled by default for now.
> >
> ><snipped>...
> > -.. _shared_mem:
> > -
> > -``shared_mem``
> > -Use a module param (shared_mem) to enable related processors
> manually
> >with -**amd_pstate.shared_mem=1**.
> > -Due to the performance issue on the processors with `Shared Memory
> >Support -<perf_cap_>`_, we disable it presently and will re-enable
> >this by default -once we address performance issue with this solution.
> > -
> > -To check whether the current processor is using `Full MSR Support
> ><perf_cap_>`_ -or `Shared Memory Support <perf_cap_>`_ : ::
> > -
> > - ray@hr-test1:~$ lscpu | grep cppc
> > - Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
> mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext
> fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc
> cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16
> sse4_1
> sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm
> cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch
> osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext
> perfctr_llc mwaitx cpb cat_l3
> cdp_l3 hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2
> smep
> bmi2 erms invpcid cqm rdt_a rdseed adx smap clflushopt clwb sha_ni
> xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total
> cqm_mbm_local clzero irperf xsaveerptr rdpru wbnoinvd cppc arat npt
> lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists
> pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip pku
> ospke vaes vpclmulqdq rdpid overflow_recov succor smca fsrm
> > -
> > -If the CPU flags have ``cppc``, then this processor supports `Full
> >MSR Support -<perf_cap_>`_. Otherwise, it supports `Shared Memory
> Support <perf_cap_>`_.
> > +Passive Mode
> > +------------
> > +
> > +``amd_pstate=passive``
> > +
> > +It will be enabled if the ``amd_pstate=passive`` is passed to the
> > +kernel in
> the command line.
> > +In this mode, ``amd_pstate`` driver software specifies a desired
> > +QoS target in the CPPC performance scale as a relative number. This
> > +can be expressed as percentage of nominal performance
> > +(infrastructure max). Below the nominal sustained performance
> > +level, desired performance expresses the average performance level
> > +of the processor subject to the Performance Reduction Tolerance
> > +register. Above the nominal performance level, processor must
> > +provide at least nominal
> performance requested and go higher if current operating conditions allow.
> >
> >
> > ``cpupower`` tool support for ``amd-pstate``
> >
>
> Why do you replace shared_mem subsection with passive mode section? It
> isn't be mentioned in the patch description.
shared_mem is not needed any more, if no cppc flag detected for MSR support, pstate driver will use shared memory interface(cppc acpi) to set/get perf values to the low-level firmware.
There are two type CPPC only in the amd cppc implementation.
Removing shared_mem parameter will make it simple to load amd pstate driver now.

Perry.

>
> --
> An old man doll... just what I always wanted! - Clara