From: Peng Fan <[email protected]>
Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
resets and power gating for mixes.
Signed-off-by: Peng Fan <[email protected]>
---
.../bindings/power/fsl,imx93-src.yaml | 96 +++++++++++++++++++
include/dt-bindings/power/fsl,imx93-power.h | 11 +++
2 files changed, 107 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
create mode 100644 include/dt-bindings/power/fsl,imx93-power.h
diff --git a/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
new file mode 100644
index 000000000000..880500a841f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
@@ -0,0 +1,96 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/fsl,imx93-src.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX93 System Reset Controller
+
+maintainers:
+ - Peng Fan <[email protected]>
+
+description: |
+ The System Reset Controller (SRC) is responsible for the generation of
+ all the system reset signals and boot argument latching.
+
+ Its main functions are as follows,
+ - Deals with all global system reset sources from other modules,
+ and generates global system reset.
+ - Responsible for power gating of MIXs (Slices) and their memory
+ low power control.
+
+properties:
+ compatible:
+ items:
+ - const: fsl,imx93-src
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ slices:
+ type: object
+ description: list of power domains provided by this controller.
+
+ properties:
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ patternProperties:
+ "power-domain@[0-9]$":
+ $ref: /schemas/power/power-domain.yaml#
+
+ type: object
+ properties:
+ '#power-domain-cells':
+ const: 0
+
+ reg:
+ description: |
+ Power domain index. Valid values are defined in
+ include/dt-bindings/power/imx93-power.h for fsl,imx93-src
+ maxItems: 1
+
+ clocks:
+ description: |
+ A number of phandles to clocks that need to be enabled
+ during domain power-up sequencing to ensure reset
+ propagation into devices located inside this power domain.
+ minItems: 1
+ maxItems: 5
+
+ required:
+ - '#power-domain-cells'
+ - reg
+
+required:
+ - compatible
+ - reg
+ - slices
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx93-clock.h>
+ #include <dt-bindings/power/fsl,imx93-power.h>
+
+ system-controller@44460000 {
+ compatible = "fsl,imx93-src", "syscon";
+ reg = <0x44460000 0x10000>;
+
+ slices {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mediamix: power-domain@0 {
+ reg = <IMX93_POWER_DOMAIN_MEDIAMIX>;
+ #power-domain-cells = <0>;
+ clocks = <&clk IMX93_CLK_MEDIA_AXI>,
+ <&clk IMX93_CLK_MEDIA_APB>;
+ };
+ };
+ };
diff --git a/include/dt-bindings/power/fsl,imx93-power.h b/include/dt-bindings/power/fsl,imx93-power.h
new file mode 100644
index 000000000000..27fb7df80f93
--- /dev/null
+++ b/include/dt-bindings/power/fsl,imx93-power.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Copyright 2022 NXP
+ */
+
+#ifndef __DT_BINDINGS_IMX93_POWER_H__
+#define __DT_BINDINGS_IMX93_POWER_H__
+
+#define IMX93_POWER_DOMAIN_MEDIAMIX 0
+
+#endif
--
2.25.1
On Thu, Jun 09, 2022 at 08:50:54PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
> resets and power gating for mixes.
>
> Signed-off-by: Peng Fan <[email protected]>
> ---
> .../bindings/power/fsl,imx93-src.yaml | 96 +++++++++++++++++++
> include/dt-bindings/power/fsl,imx93-power.h | 11 +++
> 2 files changed, 107 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> create mode 100644 include/dt-bindings/power/fsl,imx93-power.h
>
> diff --git a/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> new file mode 100644
> index 000000000000..880500a841f7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> @@ -0,0 +1,96 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/fsl,imx93-src.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX93 System Reset Controller
> +
> +maintainers:
> + - Peng Fan <[email protected]>
> +
> +description: |
> + The System Reset Controller (SRC) is responsible for the generation of
> + all the system reset signals and boot argument latching.
> +
> + Its main functions are as follows,
> + - Deals with all global system reset sources from other modules,
> + and generates global system reset.
> + - Responsible for power gating of MIXs (Slices) and their memory
> + low power control.
> +
> +properties:
> + compatible:
> + items:
> + - const: fsl,imx93-src
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> + slices:
power-controller
But if there aren't any other child nodes for the SRC, then why do you
need this level at all? If there are others, then your binding is
incomplete.
> + type: object
> + description: list of power domains provided by this controller.
> +
> + properties:
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 0
> +
> + patternProperties:
> + "power-domain@[0-9]$":
> + $ref: /schemas/power/power-domain.yaml#
> +
> + type: object
> + properties:
> + '#power-domain-cells':
> + const: 0
> +
> + reg:
> + description: |
> + Power domain index. Valid values are defined in
> + include/dt-bindings/power/imx93-power.h for fsl,imx93-src
> + maxItems: 1
> +
> + clocks:
> + description: |
> + A number of phandles to clocks that need to be enabled
> + during domain power-up sequencing to ensure reset
> + propagation into devices located inside this power domain.
> + minItems: 1
> + maxItems: 5
> +
> + required:
> + - '#power-domain-cells'
> + - reg
> +
> +required:
> + - compatible
> + - reg
> + - slices
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/imx93-clock.h>
> + #include <dt-bindings/power/fsl,imx93-power.h>
> +
> + system-controller@44460000 {
> + compatible = "fsl,imx93-src", "syscon";
> + reg = <0x44460000 0x10000>;
> +
> + slices {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + mediamix: power-domain@0 {
> + reg = <IMX93_POWER_DOMAIN_MEDIAMIX>;
> + #power-domain-cells = <0>;
> + clocks = <&clk IMX93_CLK_MEDIA_AXI>,
> + <&clk IMX93_CLK_MEDIA_APB>;
> + };
> + };
> + };
> diff --git a/include/dt-bindings/power/fsl,imx93-power.h b/include/dt-bindings/power/fsl,imx93-power.h
> new file mode 100644
> index 000000000000..27fb7df80f93
> --- /dev/null
> +++ b/include/dt-bindings/power/fsl,imx93-power.h
> @@ -0,0 +1,11 @@
> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> +/*
> + * Copyright 2022 NXP
> + */
> +
> +#ifndef __DT_BINDINGS_IMX93_POWER_H__
> +#define __DT_BINDINGS_IMX93_POWER_H__
> +
> +#define IMX93_POWER_DOMAIN_MEDIAMIX 0
> +
> +#endif
> --
> 2.25.1
>
>
> Subject: Re: [PATCH V4 1/7] dt-bindings: soc: add i.MX93 SRC
>
> On Thu, Jun 09, 2022 at 08:50:54PM +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <[email protected]>
> >
> > Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
> > resets and power gating for mixes.
> >
> > Signed-off-by: Peng Fan <[email protected]>
> > ---
> > .../bindings/power/fsl,imx93-src.yaml | 96
> +++++++++++++++++++
> > include/dt-bindings/power/fsl,imx93-power.h | 11 +++
> > 2 files changed, 107 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> > create mode 100644 include/dt-bindings/power/fsl,imx93-power.h
> >
> > diff --git
> > a/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> > b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> > new file mode 100644
> > index 000000000000..880500a841f7
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> > @@ -0,0 +1,96 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> >
> +cetree.org%2Fschemas%2Fpower%2Ffsl%2Cimx93-src.yaml%23&data=0
> 5%7C
> >
> +01%7Cpeng.fan%40nxp.com%7Cbce11534c1f9456c1a4108da4e4e6d4d%7C6
> 86ea1d3
> >
> +bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637908395997226535%7CUnkn
> own%7CTWF
> >
> +pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVC
> I6
> >
> +Mn0%3D%7C3000%7C%7C%7C&sdata=sTDHZ9BVww%2FFe2pwS%2Fjoz
> HPwWRmkU1hi
> > +966eGXzjFSk%3D&reserved=0
> > +$schema:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> >
> +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7Cpeng
> .fan%
> >
> +40nxp.com%7Cbce11534c1f9456c1a4108da4e4e6d4d%7C686ea1d3bc2b4c6
> fa92cd9
> >
> +9c5c301635%7C0%7C0%7C637908395997226535%7CUnknown%7CTWFpbG
> Zsb3d8eyJWI
> >
> +joiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3
> 000%
> >
> +7C%7C%7C&sdata=xAU2zmsZDWOtCndpmKvMScG1XqjytSUnXLvzxR40p
> HY%3D&
> > +;reserved=0
> > +
> > +title: NXP i.MX93 System Reset Controller
> > +
> > +maintainers:
> > + - Peng Fan <[email protected]>
> > +
> > +description: |
> > + The System Reset Controller (SRC) is responsible for the generation
> > +of
> > + all the system reset signals and boot argument latching.
> > +
> > + Its main functions are as follows,
> > + - Deals with all global system reset sources from other modules,
> > + and generates global system reset.
> > + - Responsible for power gating of MIXs (Slices) and their memory
> > + low power control.
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - const: fsl,imx93-src
> > + - const: syscon
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + slices:
>
> power-controller
>
> But if there aren't any other child nodes for the SRC, then why do you need this
> level at all? If there are others, then your binding is incomplete.
Currently we not need other parts from driver, so I not add them. I just add mix
slices with name "slices". For U-Boot, we are not using DTB for mem slices,
so I not add mem slices.
It has following mix slices.
0 EdgeLock Enclave
1 AONMIX
2 WAKEUPMIX
3 DDRMIX
4 DDRPHY
5 MLMIX
6 NICMIX
7 HSIOMIX
8 MEDIAMIX
9 CM33MIX
10 CA55 core 0
11 CA55 core 1
12 CA55 cluster
It has following mem slices:
0 AONMIX memory
1 WAKEUPMIX memory
2 DDRMIX memory
3 DDRPHY memory
4 MLMIX memory
5 NICMIX memory
6 OCRAM
7 HSIOMIX memory
8 MEDIA memory
9 CA55 core 0 memory
10 CA55 core 1 memory
11 CA55 cluster memory
12 L3 cache
It has some general purpose functions that could
be covered by SRC node itself.
Thanks,
Peng.
>
> > + type: object
> > + description: list of power domains provided by this controller.
> > +
> > + properties:
> > + '#address-cells':
> > + const: 1
> > +
> > + '#size-cells':
> > + const: 0
> > +
> > + patternProperties:
> > + "power-domain@[0-9]$":
> > + $ref: /schemas/power/power-domain.yaml#
> > +
> > + type: object
> > + properties:
> > + '#power-domain-cells':
> > + const: 0
> > +
> > + reg:
> > + description: |
> > + Power domain index. Valid values are defined in
> > + include/dt-bindings/power/imx93-power.h for fsl,imx93-src
> > + maxItems: 1
> > +
> > + clocks:
> > + description: |
> > + A number of phandles to clocks that need to be enabled
> > + during domain power-up sequencing to ensure reset
> > + propagation into devices located inside this power domain.
> > + minItems: 1
> > + maxItems: 5
> > +
> > + required:
> > + - '#power-domain-cells'
> > + - reg
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - slices
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/imx93-clock.h>
> > + #include <dt-bindings/power/fsl,imx93-power.h>
> > +
> > + system-controller@44460000 {
> > + compatible = "fsl,imx93-src", "syscon";
> > + reg = <0x44460000 0x10000>;
> > +
> > + slices {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + mediamix: power-domain@0 {
> > + reg = <IMX93_POWER_DOMAIN_MEDIAMIX>;
> > + #power-domain-cells = <0>;
> > + clocks = <&clk IMX93_CLK_MEDIA_AXI>,
> > + <&clk IMX93_CLK_MEDIA_APB>;
> > + };
> > + };
> > + };
> > diff --git a/include/dt-bindings/power/fsl,imx93-power.h
> > b/include/dt-bindings/power/fsl,imx93-power.h
> > new file mode 100644
> > index 000000000000..27fb7df80f93
> > --- /dev/null
> > +++ b/include/dt-bindings/power/fsl,imx93-power.h
> > @@ -0,0 +1,11 @@
> > +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> > +/*
> > + * Copyright 2022 NXP
> > + */
> > +
> > +#ifndef __DT_BINDINGS_IMX93_POWER_H__ #define
> > +__DT_BINDINGS_IMX93_POWER_H__
> > +
> > +#define IMX93_POWER_DOMAIN_MEDIAMIX 0
> > +
> > +#endif
> > --
> > 2.25.1
> >
> >
On Tue, Jun 14, 2022 at 11:22:43PM +0000, Peng Fan wrote:
> > Subject: Re: [PATCH V4 1/7] dt-bindings: soc: add i.MX93 SRC
> >
> > On Thu, Jun 09, 2022 at 08:50:54PM +0800, Peng Fan (OSS) wrote:
> > > From: Peng Fan <[email protected]>
> > >
> > > Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
> > > resets and power gating for mixes.
> > >
> > > Signed-off-by: Peng Fan <[email protected]>
> > > ---
> > > .../bindings/power/fsl,imx93-src.yaml | 96
> > +++++++++++++++++++
> > > include/dt-bindings/power/fsl,imx93-power.h | 11 +++
> > > 2 files changed, 107 insertions(+)
> > > create mode 100644
> > > Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> > > create mode 100644 include/dt-bindings/power/fsl,imx93-power.h
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> > > b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> > > new file mode 100644
> > > index 000000000000..880500a841f7
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> > > @@ -0,0 +1,96 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > > +---
> > > +$id:
> > > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > >
> > +cetree.org%2Fschemas%2Fpower%2Ffsl%2Cimx93-src.yaml%23&data=0
> > 5%7C
> > >
> > +01%7Cpeng.fan%40nxp.com%7Cbce11534c1f9456c1a4108da4e4e6d4d%7C6
> > 86ea1d3
> > >
> > +bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637908395997226535%7CUnkn
> > own%7CTWF
> > >
> > +pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVC
> > I6
> > >
> > +Mn0%3D%7C3000%7C%7C%7C&sdata=sTDHZ9BVww%2FFe2pwS%2Fjoz
> > HPwWRmkU1hi
> > > +966eGXzjFSk%3D&reserved=0
> > > +$schema:
> > > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > >
> > +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7Cpeng
> > .fan%
> > >
> > +40nxp.com%7Cbce11534c1f9456c1a4108da4e4e6d4d%7C686ea1d3bc2b4c6
> > fa92cd9
> > >
> > +9c5c301635%7C0%7C0%7C637908395997226535%7CUnknown%7CTWFpbG
> > Zsb3d8eyJWI
> > >
> > +joiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3
> > 000%
> > >
> > +7C%7C%7C&sdata=xAU2zmsZDWOtCndpmKvMScG1XqjytSUnXLvzxR40p
> > HY%3D&
> > > +;reserved=0
> > > +
> > > +title: NXP i.MX93 System Reset Controller
> > > +
> > > +maintainers:
> > > + - Peng Fan <[email protected]>
> > > +
> > > +description: |
> > > + The System Reset Controller (SRC) is responsible for the generation
> > > +of
> > > + all the system reset signals and boot argument latching.
> > > +
> > > + Its main functions are as follows,
> > > + - Deals with all global system reset sources from other modules,
> > > + and generates global system reset.
> > > + - Responsible for power gating of MIXs (Slices) and their memory
> > > + low power control.
> > > +
> > > +properties:
> > > + compatible:
> > > + items:
> > > + - const: fsl,imx93-src
> > > + - const: syscon
> > > +
> > > + reg:
> > > + maxItems: 1
> > > +
> > > + slices:
> >
> > power-controller
> >
> > But if there aren't any other child nodes for the SRC, then why do you need this
> > level at all? If there are others, then your binding is incomplete.
>
> Currently we not need other parts from driver, so I not add them. I just add mix
> slices with name "slices". For U-Boot, we are not using DTB for mem slices,
> so I not add mem slices.
>
> It has following mix slices.
What's a mix slice?
> 0 EdgeLock Enclave
> 1 AONMIX
> 2 WAKEUPMIX
> 3 DDRMIX
> 4 DDRPHY
> 5 MLMIX
> 6 NICMIX
> 7 HSIOMIX
> 8 MEDIAMIX
> 9 CM33MIX
> 10 CA55 core 0
> 11 CA55 core 1
> 12 CA55 cluster
>
> It has following mem slices:
What's a mem slice?
> 0 AONMIX memory
> 1 WAKEUPMIX memory
> 2 DDRMIX memory
> 3 DDRPHY memory
> 4 MLMIX memory
> 5 NICMIX memory
> 6 OCRAM
> 7 HSIOMIX memory
> 8 MEDIA memory
> 9 CA55 core 0 memory
> 10 CA55 core 1 memory
> 11 CA55 cluster memory
> 12 L3 cache
>
> It has some general purpose functions that could
> be covered by SRC node itself.
Please make bindings as complete as possible, not what some u-boot or
linux currently uses or not.
Rob
> Subject: Re: [PATCH V4 1/7] dt-bindings: soc: add i.MX93 SRC
>
> On Tue, Jun 14, 2022 at 11:22:43PM +0000, Peng Fan wrote:
> > > Subject: Re: [PATCH V4 1/7] dt-bindings: soc: add i.MX93 SRC
> > >
> > > On Thu, Jun 09, 2022 at 08:50:54PM +0800, Peng Fan (OSS) wrote:
> > > > From: Peng Fan <[email protected]>
> > > >
> > > > Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
> > > > resets and power gating for mixes.
> > > >
> > > > Signed-off-by: Peng Fan <[email protected]>
> > > > ---
> > > > .../bindings/power/fsl,imx93-src.yaml | 96
> > > +++++++++++++++++++
> > > > include/dt-bindings/power/fsl,imx93-power.h | 11 +++
> > > > 2 files changed, 107 insertions(+) create mode 100644
> > > > Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> > > > create mode 100644 include/dt-bindings/power/fsl,imx93-power.h
> > > >
> > > > diff --git
> > > > a/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> > > > b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> > > > new file mode 100644
> > > > index 000000000000..880500a841f7
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml
> > > > @@ -0,0 +1,96 @@
> > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML
> > > > +1.2
> > > > +---
> > > > +$id:
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> > > > +$schema:
> > > > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2F
> > > > +devi
> > > >
> > >
> +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7Cpeng
> > > .fan%
> > > >
> > >
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> > > >
> > >
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> > > HY%3D&
> > > > +;reserved=0
> > > > +
> > > > +title: NXP i.MX93 System Reset Controller
> > > > +
> > > > +maintainers:
> > > > + - Peng Fan <[email protected]>
> > > > +
> > > > +description: |
> > > > + The System Reset Controller (SRC) is responsible for the
> > > > +generation of
> > > > + all the system reset signals and boot argument latching.
> > > > +
> > > > + Its main functions are as follows,
> > > > + - Deals with all global system reset sources from other modules,
> > > > + and generates global system reset.
> > > > + - Responsible for power gating of MIXs (Slices) and their memory
> > > > + low power control.
> > > > +
> > > > +properties:
> > > > + compatible:
> > > > + items:
> > > > + - const: fsl,imx93-src
> > > > + - const: syscon
> > > > +
> > > > + reg:
> > > > + maxItems: 1
> > > > +
> > > > + slices:
> > >
> > > power-controller
> > >
> > > But if there aren't any other child nodes for the SRC, then why do
> > > you need this level at all? If there are others, then your binding is
> incomplete.
> >
> > Currently we not need other parts from driver, so I not add them. I
> > just add mix slices with name "slices". For U-Boot, we are not using
> > DTB for mem slices, so I not add mem slices.
> >
> > It has following mix slices.
>
> What's a mix slice?
i.MX9 has many logic block named [x]mix, such as wakeupmix,
mediamix. One mix slice is for one mix block logic.
>
> > 0 EdgeLock Enclave
> > 1 AONMIX
> > 2 WAKEUPMIX
> > 3 DDRMIX
> > 4 DDRPHY
> > 5 MLMIX
> > 6 NICMIX
> > 7 HSIOMIX
> > 8 MEDIAMIX
> > 9 CM33MIX
> > 10 CA55 core 0
> > 11 CA55 core 1
> > 12 CA55 cluster
> >
> > It has following mem slices:
>
> What's a mem slice?
From HW perspective, registers are actually memory.
So saying mem slice is for memory related stuff for
a mix.
>
> > 0 AONMIX memory
> > 1 WAKEUPMIX memory
> > 2 DDRMIX memory
> > 3 DDRPHY memory
> > 4 MLMIX memory
> > 5 NICMIX memory
> > 6 OCRAM
> > 7 HSIOMIX memory
> > 8 MEDIA memory
> > 9 CA55 core 0 memory
> > 10 CA55 core 1 memory
> > 11 CA55 cluster memory
> > 12 L3 cache
> >
> > It has some general purpose functions that could be covered by SRC
> > node itself.
>
> Please make bindings as complete as possible, not what some u-boot or linux
> currently uses or not.
ok, got it. Then do you think following is ok?
mix-slices:
type: object
description: list of power domains provided by this controller.
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
patternProperties:
"power-domain@[0-9]$":
$ref: /schemas/power/power-domain.yaml#
type: object
properties:
'#power-domain-cells':
const: 0
reg:
description: |
Power domain index. Valid values are defined in
include/dt-bindings/power/imx93-power.h for fsl,imx93-src
maxItems: 1
clocks:
description: |
A number of phandles to clocks that need to be enabled
during domain power-up sequencing to ensure reset
propagation into devices located inside this power domain.
minItems: 1
maxItems: 5
required:
- '#power-domain-cells'
- reg
mem-slices:
type: object
description: list of power domains provided by this controller.
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
patternProperties:
"power-domain@[0-9]$":
$ref: /schemas/power/power-domain.yaml#
type: object
properties:
'#power-domain-cells':
const: 0
reg:
description: |
Power domain index. Valid values are defined in
include/dt-bindings/power/imx93-power.h for fsl,imx93-src
maxItems: 1
clocks:
description: |
A number of phandles to clocks that need to be enabled
during domain power-up sequencing to ensure reset
propagation into devices located inside this power domain.
minItems: 1
maxItems: 5
required:
- '#power-domain-cells'
- reg
Thanks,
Peng.
>
> Rob