Clock support for SPIs on LPC32XX SoC.
---
arch/arm/mach-lpc32xx/clock.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c
index dd5d6f5..672c9b3 100644
--- a/arch/arm/mach-lpc32xx/clock.c
+++ b/arch/arm/mach-lpc32xx/clock.c
@@ -683,6 +683,24 @@ static struct clk clk_i2c2 = {
.get_rate = local_return_parent_rate,
};
+static struct clk clk_spi1 = {
+ .parent = &clk_hclk,
+ .enable = local_onoff_enable,
+ .enable_reg = LPC32XX_CLKPWR_SPI_CLK_CTRL,
+ .enable_mask = LPC32XX_CLKPWR_SPICLK_SPI1CLK_EN|
+ LPC32XX_CLKPWR_SPICLK_USE_SPI1,
+ .get_rate = local_return_parent_rate,
+};
+
+static struct clk clk_spi2 = {
+ .parent = &clk_hclk,
+ .enable = local_onoff_enable,
+ .enable_reg = LPC32XX_CLKPWR_SPI_CLK_CTRL,
+ .enable_mask = LPC32XX_CLKPWR_SPICLK_SPI2CLK_EN|
+ LPC32XX_CLKPWR_SPICLK_USE_SPI2,
+ .get_rate = local_return_parent_rate,
+};
+
static struct clk clk_ssp0 = {
.parent = &clk_hclk,
.enable = local_onoff_enable,
@@ -1217,6 +1235,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_INIT("400a0000.i2c", NULL, &clk_i2c0),
CLKDEV_INIT("400a8000.i2c", NULL, &clk_i2c1),
CLKDEV_INIT("31020300.i2c", NULL, &clk_i2c2),
+ CLKDEV_INIT("20088000.spi", NULL, &clk_spi1),
+ CLKDEV_INIT("20090000.spi", NULL, &clk_spi2),
CLKDEV_INIT("dev:ssp0", NULL, &clk_ssp0),
CLKDEV_INIT("dev:ssp1", NULL, &clk_ssp1),
CLKDEV_INIT("40050000.key", NULL, &clk_kscan),
--
1.7.10.4