From: Hou Zhiqiang <[email protected]>
Update the description of the second entry of 'fsl,pcie-scfg' property,
as the LS1043A PCIe controller also has some control registers in SCFG
block, while it has 3 controllers.
Signed-off-by: Hou Zhiqiang <[email protected]>
---
Documentation/devicetree/bindings/pci/layerscape-pci.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index 2236d3f3089b..e992ec712bf6 100644
--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -31,7 +31,7 @@ Required properties:
"intr": The interrupt that is asserted for controller interrupts
- fsl,pcie-scfg: Must include two entries.
The first entry must be a link to the SCFG device node
- The second entry must be '0' or '1' based on physical PCIe controller index.
+ The second entry is the physical PCIe controller index starting from '0'.
This is used to get SCFG PEXN registers
- dma-coherent: Indicates that the hardware IP block can ensure the coherency
of the data transferred from/to the IP block. This can avoid the software
--
2.17.1
On Mon, 07 Sep 2020 13:37:59 +0800, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <[email protected]>
>
> Update the description of the second entry of 'fsl,pcie-scfg' property,
> as the LS1043A PCIe controller also has some control registers in SCFG
> block, while it has 3 controllers.
>
> Signed-off-by: Hou Zhiqiang <[email protected]>
> ---
> Documentation/devicetree/bindings/pci/layerscape-pci.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Rob Herring <[email protected]>
Hi Rob,
Thanks a lot for your review and ack!
Regards,
Zhiqiang
> -----Original Message-----
> From: Rob Herring <[email protected]>
> Sent: 2020??9??15?? 9:31
> To: Z.q. Hou <[email protected]>
> Cc: [email protected]; [email protected]; M.h. Lian
> <[email protected]>; [email protected];
> [email protected]; [email protected]; Mingkai Hu
> <[email protected]>; Roy Zang <[email protected]>;
> [email protected]; Leo Li <[email protected]>;
> [email protected]; [email protected]
> Subject: Re: [PATCH 5/7] dt-bindings: pci: layerscape-pci: Update the
> description of SCFG property
>
> On Mon, 07 Sep 2020 13:37:59 +0800, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <[email protected]>
> >
> > Update the description of the second entry of 'fsl,pcie-scfg'
> > property, as the LS1043A PCIe controller also has some control
> > registers in SCFG block, while it has 3 controllers.
> >
> > Signed-off-by: Hou Zhiqiang <[email protected]>
> > ---
> > Documentation/devicetree/bindings/pci/layerscape-pci.txt | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
>
> Acked-by: Rob Herring <[email protected]>