The hibernation feature enabled for Xilinx Versal NET SoC in DWC3 IP.
Added host mode interrupts and "usb-wakeup" interrupt-names optional
property in the binding schema to capture remote-wakeup and connect/
disconnect event in the hibernation state.
Xilinx dwc3-core uses "host" and "otg" interrupts interrupt-names DT
properties from dwc3-core.
Signed-off-by: Piyush Mehta <[email protected]>
---
Note:
- Xilinx uses dwc3-cores interrupt-names DT property.
Link:
Xilinx-dwc3 core: https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml#L129
dwc3-core: https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/usb/snps%2Cdwc3.yaml#L42
---
Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
index 098b73134a1b..abc32db2448a 100644
--- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
+++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
@@ -44,6 +44,15 @@ properties:
- const: bus_clk
- const: ref_clk
+ interrupts:
+ items:
+ - description: Handle to the line usb-wakeup used to wake
+ up the host processor.
+
+ interrupt-names:
+ items:
+ - const: usb-wakeup
+
resets:
description:
A list of phandles for resets listed in reset-names.
--
2.25.1
On Wed, 12 Apr 2023 11:38:43 +0530, Piyush Mehta wrote:
> The hibernation feature enabled for Xilinx Versal NET SoC in DWC3 IP.
> Added host mode interrupts and "usb-wakeup" interrupt-names optional
> property in the binding schema to capture remote-wakeup and connect/
> disconnect event in the hibernation state.
>
> Xilinx dwc3-core uses "host" and "otg" interrupts interrupt-names DT
> properties from dwc3-core.
>
> Signed-off-by: Piyush Mehta <[email protected]>
> ---
> Note:
> - Xilinx uses dwc3-cores interrupt-names DT property.
> Link:
> Xilinx-dwc3 core: https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml#L129
> dwc3-core: https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/usb/snps%2Cdwc3.yaml#L42
> ---
> Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/project/devicetree-bindings/patch/[email protected]
usb@ff9d0000: 'clock-names' is a required property
arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dtb
usb@ff9d0000: 'clocks' is a required property
arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dtb
usb@ff9d0000: usb@fe200000:interrupt-names: 'oneOf' conditional failed, one must be fixed:
arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dtb
usb@ff9d0000: usb@fe200000: Unevaluated properties are not allowed ('interrupt-names' was unexpected)
arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dtb
usb@ff9e0000: 'clock-names' is a required property
arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dtb
usb@ff9e0000: 'clocks' is a required property
arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dtb
usb@ff9e0000: usb@fe300000:interrupt-names: 'oneOf' conditional failed, one must be fixed:
arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dtb
usb@ff9e0000: usb@fe300000: Unevaluated properties are not allowed ('interrupt-names' was unexpected)
arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dtb
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dtb
On Wed, Apr 12, 2023 at 11:38:43AM +0530, Piyush Mehta wrote:
> The hibernation feature enabled for Xilinx Versal NET SoC in DWC3 IP.
> Added host mode interrupts and "usb-wakeup" interrupt-names optional
> property in the binding schema to capture remote-wakeup and connect/
> disconnect event in the hibernation state.
>
> Xilinx dwc3-core uses "host" and "otg" interrupts interrupt-names DT
> properties from dwc3-core.
Is wakeup really not implemented in the DWC3 core, but outside it?
>
> Signed-off-by: Piyush Mehta <[email protected]>
> ---
> Note:
> - Xilinx uses dwc3-cores interrupt-names DT property.
> Link:
> Xilinx-dwc3 core: https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml#L129
> dwc3-core: https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/usb/snps%2Cdwc3.yaml#L42
> ---
> Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
> index 098b73134a1b..abc32db2448a 100644
> --- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
> +++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
> @@ -44,6 +44,15 @@ properties:
> - const: bus_clk
> - const: ref_clk
>
> + interrupts:
> + items:
> + - description: Handle to the line usb-wakeup used to wake
> + up the host processor.
> +
> + interrupt-names:
> + items:
> + - const: usb-wakeup
'wakeup' is the standard name. And you also need 'wakeup-source'
property.
> +
> resets:
> description:
> A list of phandles for resets listed in reset-names.
> --
> 2.25.1
>
Hi
> -----Original Message-----
> From: Rob Herring <[email protected]>
> Sent: Wednesday, April 19, 2023 12:10 AM
> To: Mehta, Piyush <[email protected]>
> Cc: [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]; Simek, Michal
> <[email protected]>; Paladugu, Siva Durga Prasad
> <[email protected]>; linux-arm-
> [email protected]; git (AMD-Xilinx) <[email protected]>
> Subject: Re: [PATCH] dt-bindings: usb: dwc3: xilinx: Add interrupt-names to
> include hibernation interrupt
>
> On Wed, Apr 12, 2023 at 11:38:43AM +0530, Piyush Mehta wrote:
> > The hibernation feature enabled for Xilinx Versal NET SoC in DWC3 IP.
> > Added host mode interrupts and "usb-wakeup" interrupt-names optional
> > property in the binding schema to capture remote-wakeup and connect/
> > disconnect event in the hibernation state.
> >
> > Xilinx dwc3-core uses "host" and "otg" interrupts interrupt-names DT
> > properties from dwc3-core.
>
> Is wakeup really not implemented in the DWC3 core, but outside it?
Wakeup is implemented inside the dwc3-core.
Initially we planned to implement wakeup interrupt name/interrupt optional property in the dwc3-core.
However, looking at other vendor wakeup interrupt implementation (Commit: dd566faebe9f dt-bindings: usb: qcom,dwc3: refine interrupt requirements)
we moved wakeup property to xilinx USB binding.
>
> >
> > Signed-off-by: Piyush Mehta <[email protected]>
> > ---
> > Note:
> > - Xilinx uses dwc3-cores interrupt-names DT property.
> > Link:
> > Xilinx-dwc3 core:
> https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bi
> ndings/usb/dwc3-xilinx.yaml#L129
> > dwc3-core:
> > https://github.com/torvalds/linux/blob/master/Documentation/devicetree
> > /bindings/usb/snps%2Cdwc3.yaml#L42
> > ---
> > Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
> > b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
> > index 098b73134a1b..abc32db2448a 100644
> > --- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
> > +++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
> > @@ -44,6 +44,15 @@ properties:
> > - const: bus_clk
> > - const: ref_clk
> >
> > + interrupts:
> > + items:
> > + - description: Handle to the line usb-wakeup used to wake
> > + up the host processor.
> > +
> > + interrupt-names:
> > + items:
> > + - const: usb-wakeup
>
> 'wakeup' is the standard name. And you also need 'wakeup-source'
> property.
>
> > +
> > resets:
> > description:
> > A list of phandles for resets listed in reset-names.
> > --
> > 2.25.1
> >
On Fri, Apr 21, 2023 at 8:28 AM Mehta, Piyush <[email protected]> wrote:
>
> Hi
>
> > -----Original Message-----
> > From: Rob Herring <[email protected]>
> > Sent: Wednesday, April 19, 2023 12:10 AM
> > To: Mehta, Piyush <[email protected]>
> > Cc: [email protected]; [email protected];
> > [email protected]; [email protected];
> > [email protected]; [email protected]; Simek, Michal
> > <[email protected]>; Paladugu, Siva Durga Prasad
> > <[email protected]>; linux-arm-
> > [email protected]; git (AMD-Xilinx) <[email protected]>
> > Subject: Re: [PATCH] dt-bindings: usb: dwc3: xilinx: Add interrupt-names to
> > include hibernation interrupt
> >
> > On Wed, Apr 12, 2023 at 11:38:43AM +0530, Piyush Mehta wrote:
> > > The hibernation feature enabled for Xilinx Versal NET SoC in DWC3 IP.
> > > Added host mode interrupts and "usb-wakeup" interrupt-names optional
> > > property in the binding schema to capture remote-wakeup and connect/
> > > disconnect event in the hibernation state.
> > >
> > > Xilinx dwc3-core uses "host" and "otg" interrupts interrupt-names DT
> > > properties from dwc3-core.
> >
> > Is wakeup really not implemented in the DWC3 core, but outside it?
>
> Wakeup is implemented inside the dwc3-core.
Then it goes in the dwc3 node.
> Initially we planned to implement wakeup interrupt name/interrupt optional property in the dwc3-core.
> However, looking at other vendor wakeup interrupt implementation (Commit: dd566faebe9f dt-bindings: usb: qcom,dwc3: refine interrupt requirements)
> we moved wakeup property to xilinx USB binding.
That one looks like the phy implements wake-up? I don't know really,
but doesn't seem like one to copy.
Rob