2022-03-21 06:16:10

by Mike Travis

[permalink] [raw]
Subject: [PATCH v3 0/3] x86/platform/uv: UV Kernel support for UV5

v2: Delete patch to remove SCRATCH 5 NMI support check mainly for
UV2 and UV3k systems with old NMI support function.

v3: Fix check BIOS NMI support mistake in Patch 1.

Update NMI setup for UV5
Update NMI handler to interface with UV5 hardware. This involves
changing the EVENT_OCCURRED MMR used by the hardware and removes
the check for which NMI function is supported by UV BIOS. The
newer NMI function is assumed supported on UV5 and above.

Update TSC sync check for UV5
Update TSC to not check TSC sync state for uv5+ as it is not
available. It is assumed that TSC will always be in sync for
multiple chassis and will pass the tests for the kernel to
accept it as the clocksource. To disable this check use the
kernel start options tsc=reliable clocksource=tsc.

Log gap hole end size
Show value of gap end in the kernel log which equates to number
of physical address bits used by system. The end address of
the gap holds PA bits 56:26 which gives the range up to 64PB
max size with 64MB of granularity.

Mike Travis (3):
x86/platform/uv: Update NMI Handler for UV5
x86/platform/uv: Update TSC sync state for UV5
x86/platform/uv: Log gap hole end size

arch/x86/kernel/apic/x2apic_uv_x.c | 20 +++++++++++++++-----
arch/x86/platform/uv/uv_nmi.c | 21 +++++++++++----------
2 files changed, 26 insertions(+), 15 deletions(-)

--
2.26.2


2022-03-21 12:36:30

by Mike Travis

[permalink] [raw]
Subject: [PATCH v3 3/3] x86/platform/uv: Log gap hole end size

Show value of gap end in the kernel log which equates to number of physical
address bits used by system. The end address of the gap holds PA bits 56:26
which gives the range up to 64PB max size with 64MB of granularity.

Signed-off-by: Mike Travis <[email protected]>
Reviewed-by: Steve Wahl <[email protected]>
---
v2: Update patch description to be more explanatory.
---
arch/x86/kernel/apic/x2apic_uv_x.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 387d6533549a..146f0f63a43b 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1346,7 +1346,7 @@ static void __init decode_gam_params(unsigned long ptr)
static void __init decode_gam_rng_tbl(unsigned long ptr)
{
struct uv_gam_range_entry *gre = (struct uv_gam_range_entry *)ptr;
- unsigned long lgre = 0;
+ unsigned long lgre = 0, gend = 0;
int index = 0;
int sock_min = 999999, pnode_min = 99999;
int sock_max = -1, pnode_max = -1;
@@ -1380,6 +1380,9 @@ static void __init decode_gam_rng_tbl(unsigned long ptr)
flag, size, suffix[order],
gre->type, gre->nasid, gre->sockid, gre->pnode);

+ if (gre->type == UV_GAM_RANGE_TYPE_HOLE)
+ gend = (unsigned long)gre->limit << UV_GAM_RANGE_SHFT;
+
/* update to next range start */
lgre = gre->limit;
if (sock_min > gre->sockid)
@@ -1397,7 +1400,8 @@ static void __init decode_gam_rng_tbl(unsigned long ptr)
_max_pnode = pnode_max;
_gr_table_len = index;

- pr_info("UV: GRT: %d entries, sockets(min:%x,max:%x) pnodes(min:%x,max:%x)\n", index, _min_socket, _max_socket, _min_pnode, _max_pnode);
+ pr_info("UV: GRT: %d entries, sockets(min:%x,max:%x), pnodes(min:%x,max:%x), gap_end(%d)\n",
+ index, _min_socket, _max_socket, _min_pnode, _max_pnode, fls64(gend));
}

/* Walk through UVsystab decoding the fields */
--
2.26.2

2022-04-04 23:48:57

by Mike Travis

[permalink] [raw]
Subject: Re: [PATCH v3 0/3] x86/platform/uv: UV Kernel support for UV5

No it's not. We got acceptance about 2 weeks ago on something else so I thought maybe there was some mistake in sending version 3?

________________________________________
From: Borislav Petkov <[email protected]>
Sent: Monday, April 4, 2022 10:48 AM
To: Travis, Mike
Cc: Ingo Molnar; Thomas Gleixner; Wahl, Steve; [email protected]; Andy Shevchenko; Darren Hart; Sivanich, Dimitri; H. Peter Anvin; Anderson, Russ; [email protected]; [email protected]
Subject: Re: [PATCH v3 0/3] x86/platform/uv: UV Kernel support for UV5

On Mon, Apr 04, 2022 at 12:41:08PM -0500, Mike Travis wrote:
> Send a second time on 04/04/22, sent first time on 03/18/22.

Is this one any different from your submission on 3/18?

--
Regards/Gruss,
Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Subject: [tip: x86/platform] x86/platform/uv: Log gap hole end size

The following commit has been merged into the x86/platform branch of tip:

Commit-ID: f93ba85de0d1ce1924b0752b6a7a784c11c36414
Gitweb: https://git.kernel.org/tip/f93ba85de0d1ce1924b0752b6a7a784c11c36414
Author: Mike Travis <[email protected]>
AuthorDate: Fri, 18 Mar 2022 17:43:04 -05:00
Committer: Borislav Petkov <[email protected]>
CommitterDate: Mon, 04 Apr 2022 20:21:47 +02:00

x86/platform/uv: Log gap hole end size

Show value of gap end in the kernel log which equates to number of physical
address bits used by system. The end address of the gap holds PA bits 56:26
which gives the range up to 64PB max size with 64MB of granularity.

Signed-off-by: Mike Travis <[email protected]>
Signed-off-by: Borislav Petkov <[email protected]>
Reviewed-by: Steve Wahl <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
arch/x86/kernel/apic/x2apic_uv_x.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 387d653..146f0f6 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -1346,7 +1346,7 @@ static void __init decode_gam_params(unsigned long ptr)
static void __init decode_gam_rng_tbl(unsigned long ptr)
{
struct uv_gam_range_entry *gre = (struct uv_gam_range_entry *)ptr;
- unsigned long lgre = 0;
+ unsigned long lgre = 0, gend = 0;
int index = 0;
int sock_min = 999999, pnode_min = 99999;
int sock_max = -1, pnode_max = -1;
@@ -1380,6 +1380,9 @@ static void __init decode_gam_rng_tbl(unsigned long ptr)
flag, size, suffix[order],
gre->type, gre->nasid, gre->sockid, gre->pnode);

+ if (gre->type == UV_GAM_RANGE_TYPE_HOLE)
+ gend = (unsigned long)gre->limit << UV_GAM_RANGE_SHFT;
+
/* update to next range start */
lgre = gre->limit;
if (sock_min > gre->sockid)
@@ -1397,7 +1400,8 @@ static void __init decode_gam_rng_tbl(unsigned long ptr)
_max_pnode = pnode_max;
_gr_table_len = index;

- pr_info("UV: GRT: %d entries, sockets(min:%x,max:%x) pnodes(min:%x,max:%x)\n", index, _min_socket, _max_socket, _min_pnode, _max_pnode);
+ pr_info("UV: GRT: %d entries, sockets(min:%x,max:%x), pnodes(min:%x,max:%x), gap_end(%d)\n",
+ index, _min_socket, _max_socket, _min_pnode, _max_pnode, fls64(gend));
}

/* Walk through UVsystab decoding the fields */

2022-04-05 21:32:36

by Borislav Petkov

[permalink] [raw]
Subject: Re: [PATCH v3 0/3] x86/platform/uv: UV Kernel support for UV5

On Fri, Mar 18, 2022 at 05:43:01PM -0500, Mike Travis wrote:
> Mike Travis (3):
> x86/platform/uv: Update NMI Handler for UV5
> x86/platform/uv: Update TSC sync state for UV5
> x86/platform/uv: Log gap hole end size
>
> arch/x86/kernel/apic/x2apic_uv_x.c | 20 +++++++++++++++-----
> arch/x86/platform/uv/uv_nmi.c | 21 +++++++++++----------
> 2 files changed, 26 insertions(+), 15 deletions(-)

All three zapped from tip until

https://lore.kernel.org/r/87zgl02w6v.ffs@tglx

is resolved.

Thx.

--
Regards/Gruss,
Boris.

https://people.kernel.org/tglx/notes-about-netiquette